From 55f5af1871d07d62def7bafa20b4761cc8b66e7d Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Fri, 27 Mar 2015 17:27:14 +0000 Subject: MdePkg: fix ARM version of InternalMathSwapBytes64 () The ARM asm implementation of InternalMathSwapBytes64 () does interesting things if bit 7 of operand r1 (upper 32 bits of the input value) is set. After the recursive swap, bit 7 ends up in the sign bit position, after which it is right shifted with sign extension, and or'ed with the upper half of the output value. This means SwapBytes64 (0x00000080_00000000) returns an incorrect value of 0xFFFFFFFF_80000000. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Ronald Cron git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17077 6f19259b-4bc3-4df7-8a09-765794883524 --- MdePkg/Library/BaseLib/Arm/Math64.S | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/MdePkg/Library/BaseLib/Arm/Math64.S b/MdePkg/Library/BaseLib/Arm/Math64.S index 4d97573920..e2512621fe 100755 --- a/MdePkg/Library/BaseLib/Arm/Math64.S +++ b/MdePkg/Library/BaseLib/Arm/Math64.S @@ -256,22 +256,14 @@ L30: GCC_ASM_EXPORT(InternalMathSwapBytes64) ASM_PFX(InternalMathSwapBytes64): - @ args = 0, pretend = 0, frame = 0 - @ frame_needed = 1, uses_anonymous_args = 0 - stmfd sp!, {r4, r5, r6, r7, lr} - add r7, sp, #12 + stmfd sp!, {r4, r5, r7, lr} mov r5, r1 bl ASM_PFX(SwapBytes32) - mov r6, r0 + mov r4, r0 mov r0, r5 bl ASM_PFX(SwapBytes32) - mov r4, r6 - mov r5, r4, asr #31 - mov r2, #0 - mov r1, r0, asr #31 - orr r0, r0, r2 - orr r1, r1, r4 - ldmfd sp!, {r4, r5, r6, r7, pc} + mov r1, r4 + ldmfd sp!, {r4, r5, r7, pc} ASM_FUNCTION_REMOVE_IF_UNREFERENCED \ No newline at end of file -- cgit v1.2.3