From 829ea9b2dd8795da26729b4cd192e3e907725809 Mon Sep 17 00:00:00 2001 From: Heyi Guo Date: Wed, 27 May 2015 15:10:10 +0000 Subject: ArmPkg: Expand AArch64 address width to 48 bits The VA address space has a maximum address width of 48 bits in AArch64 state; 48 bits address width limit will provide better compatibility than 40 bits for future CPU. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Heyi Guo Reviewed-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17526 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Include/Chipset/AArch64Mmu.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h index 77a96ec637..2398ba2539 100644 --- a/ArmPkg/Include/Chipset/AArch64Mmu.h +++ b/ArmPkg/Include/Chipset/AArch64Mmu.h @@ -51,8 +51,8 @@ #define TT_ALIGNMENT_BLOCK_ENTRY BIT12 #define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12 -#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFULL << 12) -#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFULL << 12) +#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12) +#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12) #define TT_TYPE_MASK 0x3 #define TT_TYPE_TABLE_ENTRY 0x3 -- cgit v1.2.3