From a0f3b02894c140e11238c06ab17f898b199c4384 Mon Sep 17 00:00:00 2001 From: "Lu, ShifeiX A" Date: Tue, 21 Jun 2016 11:05:30 +0800 Subject: Vlv2DeviceRefCodePkg&Vlv2TbltDevicePkg:Convert Mix to DOS. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex Reviewed-by: David Wei --- Vlv2DeviceRefCodePkg/AcpiTablesPCAT/GloblNvs.asl | 2 +- Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Pch.asl | 1 + Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c | 24 +- Vlv2TbltDevicePkg/Include/Guid/SetupVariable.h | 2703 ++++++++++---------- Vlv2TbltDevicePkg/Include/Protocol/GlobalNvsArea.h | 971 +++---- .../PlatformSetupDxe/SouthClusterConfig.vfi | 98 +- Vlv2TbltDevicePkg/PlatformSetupDxe/UqiList.uni | 31 +- Vlv2TbltDevicePkg/PlatformSetupDxe/VfrStrings.uni | 23 +- 8 files changed, 1934 insertions(+), 1919 deletions(-) diff --git a/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/GloblNvs.asl b/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/GloblNvs.asl index 21e526c505..8702110d02 100644 --- a/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/GloblNvs.asl +++ b/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/GloblNvs.asl @@ -348,6 +348,6 @@ Field(GNVS,AnyAcc,Lock,Preserve) EDPV, 8, //(792) Check for eDP display device DIDX, 32, //(793) Device ID for eDP device IOT, 8, //(794) MinnowBoard Max JP1 is configured for MSFT IOT project. - BATT, 8, //(795) The Flag of RTC Battery Prensent. + BATT, 8, //(795) The Flag of RTC Battery Prensent. } diff --git a/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Pch.asl b/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Pch.asl index 38dac87bcd..506b1710a2 100644 --- a/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Pch.asl +++ b/Vlv2DeviceRefCodePkg/AcpiTablesPCAT/Pch.asl @@ -683,3 +683,4 @@ scope (\_SB.PCI0) } // Device(SEC0) } // End scope (\_SB.PCI0) + diff --git a/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c b/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c index 2ff14ec6bb..0f536de7f7 100644 --- a/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c +++ b/Vlv2TbltDevicePkg/AcpiPlatform/AcpiPlatform.c @@ -1,23 +1,23 @@ /** @file Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
- + This program and the accompanying materials are licensed and made available under - the terms and conditions of the BSD License that accompanies this distribution. + the terms and conditions of the BSD License that accompanies this distribution. + + The full text of the license may be found at - The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. - http://opensource.org/licenses/bsd-license.php. - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - @@ -31,7 +31,7 @@ Abstract: ACPI Platform Driver ---*/ +**/ #include #include @@ -708,7 +708,7 @@ OnReadyToBoot ( &SetupVarBuffer ); ASSERT_EFI_ERROR (Status); - } + } // // Find the AcpiSupport protocol. @@ -1130,7 +1130,7 @@ AcpiPlatformEntryPoint ( } mGlobalNvsArea.Area->SdCardRemovable = mSystemConfiguration.SdCardRemovable; - + // // Microsoft IOT // @@ -1143,7 +1143,7 @@ AcpiPlatformEntryPoint ( mGlobalNvsArea.Area->MicrosoftIoT = GLOBAL_NVS_DEVICE_DISABLE; DEBUG ((EFI_D_ERROR, "JP1 is not set to be MSFT IOT configuration.\n")); } - + // // SIO related option. // diff --git a/Vlv2TbltDevicePkg/Include/Guid/SetupVariable.h b/Vlv2TbltDevicePkg/Include/Guid/SetupVariable.h index 5168bd51f9..e2a88758f2 100644 --- a/Vlv2TbltDevicePkg/Include/Guid/SetupVariable.h +++ b/Vlv2TbltDevicePkg/Include/Guid/SetupVariable.h @@ -1,1351 +1,1352 @@ -/*++ - - Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
- - - This program and the accompanying materials are licensed and made available under - - the terms and conditions of the BSD License that accompanies this distribution. - - The full text of the license may be found at - - http://opensource.org/licenses/bsd-license.php. - - - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - - - -Module Name: - - SetupVariable.h - -Abstract: - - Driver configuration include file - - ---*/ - -#ifndef _SETUP_VARIABLE_H -#define _SETUP_VARIABLE_H - -// -// --------------------------------------------------------------------------- -// -// Driver Configuration -// -// --------------------------------------------------------------------------- -// - -// -// {EC87D643-EBA4-4bb5-A1E5-3F3E36B20DA9} -// -#define SYSTEM_CONFIGURATION_GUID\ - { \ - 0xec87d643, 0xeba4, 0x4bb5, 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0xa9 \ - } - -#define ROOT_SECURITY_GUID\ - { \ - 0xd387d688, 0xeba4, 0x45b5, 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0x37 \ - } - -// -// {6936B3BD-4350-46d9-8940-1FA20961AEB1} -// -#define SYSTEM_ROOT_MAIN_GUID\ - { \ - 0x6936b3bd, 0x4350, 0x46d9, 0x89, 0x40, 0x1f, 0xa2, 0x9, 0x61, 0xae, 0xb1 \ - } - -// -// {21FEE8DB-0D29-477e-B5A9-96EB343BA99C} -// -#define ADDITIONAL_SYSTEM_INFO_GUID\ - { \ - 0x21fee8db, 0xd29, 0x477e, 0xb5, 0xa9, 0x96, 0xeb, 0x34, 0x3b, 0xa9, 0x9c \ - } - -#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 } - -// {1B838190-4625-4ead-ABC9-CD5E6AF18FE0} -#define EFI_HII_EXPORT_DATABASE_GUID { 0x1b838190, 0x4625, 0x4ead, 0xab, 0xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0 } - -#define PASSWORD_MAX_SIZE 20 - -#define MAX_CUSTOM_VID_TABLE_STATES 6 -// -// Overclocking Source Defines -// -#define OVERCLOCK_SOURCE_BIOS 0 -#define OVERCLOCK_SOURCE_OS 1 - -#define PCH_PCIE_MAX_ROOT_PORTS 4 - -#pragma pack(1) - -// NOTE: When you add anything to this structure, -// you MUST add it to the very bottom!!!! -// You must make sure the structure size is able to divide by 32! -typedef struct { - - // - // Floppy - // - UINT8 Floppy; - UINT8 FloppyLockHide; - - UINT8 FloppyWriteProtect; - UINT8 FloppyWriteProtectLockHide; - - // - // System ports - // - UINT8 Serial; - UINT8 SerialLockHide; - - UINT8 Serial2; - UINT8 Serial2LockHide; - - UINT8 Parallel; - UINT8 ParallelLockHide; - - UINT8 ParallelMode; - UINT8 ParallelModeLockHide; - - UINT8 AllUsb; - UINT8 UsbPortsLockHide; - - UINT8 Usb2; - UINT8 Usb2LockHide; - - UINT8 UsbLegacy; - UINT8 UsbLegacyLockHide; - - UINT8 Audio; - UINT8 AudioLockHide; - - UINT8 Lan; - UINT8 LanLockHide; - - // - // Keyboard - // - UINT8 Numlock; - UINT8 NumlockLockHide; - - // - // ECIR - // - UINT8 ECIR; - UINT8 ECIRLockHide; - - // - // Power State - // - UINT8 PowerState; - UINT8 PowerStateLockHide; - - // - // Wake on RTC variables - // - UINT8 WakeOnRtcS5; - UINT8 WakeOnRtcS5LockHide; - UINT8 RTCWakeupDate; - UINT8 RTCWakeupDateLockHide; - UINT8 RTCWakeupTimeHour; - UINT8 RTCWakeupHourLockHide; - UINT8 RTCWakeupTimeMinute; - UINT8 RTCWakeupMinuteLockHide; - UINT8 RTCWakeupTimeSecond; - UINT8 RTCWakeupSecondLockHide; - - // - // Wake On Lan - // - UINT8 WakeOnLanS5; - UINT8 WakeOnLanS5LockHide; - - //Spread spectrum - UINT8 SpreadSpectrum; - - // - // Boot Order - // - UINT8 BootOrder[8]; - UINT8 BootOrderLockHide; - - // - // Hard Drive Boot Order - // - UINT8 HardDriveBootOrder[8]; - UINT8 HardDriveBootOrderLockHide; - - // - // CD Drive Boot Order - // - UINT8 CdDriveBootOrder[4]; - UINT8 CdDriveBootOrderLockHide; - - // - // FDD Drive Boot Order - // - UINT8 FddDriveBootOrder[4]; - UINT8 FddDriveBootOrderLockHide; - - // - // Drive Boot Order - // - UINT8 DriveBootOrder[16]; - UINT8 DriveBootOrderLockHide; - - // - // Boot Menu Type - // - UINT8 BootMenuType; - UINT8 BootMenuTypeLockHide; - - // - // Boot from Removable Devices - // - UINT8 BootFloppy; - UINT8 BootFloppyLockHide; - - // - // Boot from Optical Devices - // - UINT8 BootCd; - UINT8 BootCdLockHide; - - // - // Boot from Network - // - UINT8 BootNetwork; - UINT8 BootNetworkLockHide; - - // - // Boot USB - // - UINT8 BootUsb; - UINT8 BootUsbLockHide; - - // - // USB Zip Emulation Type - // - UINT8 UsbZipEmulation; - UINT8 UsbZipEmulationLockHide; - - // - // USB Devices Boot First in Boot Order - // - UINT8 UsbDevicesBootFirst; - UINT8 UsbDevicesBootFirstLockHide; - - // - // USB Boot Device SETUP Emulation - // - UINT8 UsbSetupDeviceEmulation; - UINT8 UsbSetupDeviceEmulationLockHide; - - // - // BIOS INT13 Emulation for USB Mass Devices - // - UINT8 UsbBIOSINT13DeviceEmulation; - UINT8 UsbBIOSINT13DeviceEmulationLockHide; - - // - // BIOS INT13 Emulation Size for USB Mass Devices - // - UINT16 UsbBIOSINT13DeviceEmulationSize; - UINT8 UsbBIOSINT13DeviceEmulationSizeLockHide; - - // - // Dummy place holder to prevent VFR compiler problem. - // - UINT16 DummyDataForVfrBug; // Don't change or use. - - // - // Language Select - // - UINT8 LanguageSelect; - - // - // SATA Type (Ide, Ahci, Raid) - // - UINT8 SataType; - UINT8 SataTypeLockHide; - UINT8 SataTestMode; - - // - // Fixed Disk Boot Sector (Fdbs) - // - UINT8 Fdbs; - UINT8 FdbsLockHide; - - // - // DisplaySetupPrompt - // - UINT8 DisplaySetupPrompt; - UINT8 DisplaySetupPromptLockHide; - - // - // ASF - // - UINT8 Asf; - UINT8 AsfLockHide; - - // - // Event Logging - // - UINT8 EventLogging; - UINT8 EventLoggingLockHide; - - // - // Clear Event Log - // - UINT8 ClearEvents; - UINT8 ClearEventsLockHide; - - // - // Expansion Card Text - // - UINT8 ExpansionCardText; - UINT8 ExpansionCardTextLockHide; - - // - // Video Adaptor - // - UINT8 PrimaryVideoAdaptor; - UINT8 PrimaryVideoAdaptorLockHide; - - // - // Chassis intrusion - // - UINT8 IntruderDetection; - UINT8 IntruderDetectionLockHide; - - // - // User Access Level - // - UINT8 UserPasswordLevel; - UINT8 UserPasswordLevelLockHide; - - // - // Maximum FSB Automatic/Disable - // - UINT8 MaxFsb; - UINT8 MaxFsbLockHide; - - // - // Hard Disk Pre-delay - // - UINT8 HddPredelay; - UINT8 HddPredelayLockHide; - - // - // S.M.A.R.T. Mode - // - UINT8 SmartMode; - UINT8 SmartModeLockHide; - - // - // ACPI Suspend State - // - UINT8 AcpiSuspendState; - UINT8 AcpiSuspendStateLockHide; - - // - // PCI Latency Timer - // - UINT8 PciLatency; - UINT8 PciLatencyLockHide; - - // - // Fan Control - // - UINT8 FanControl; - UINT8 FanControlLockHide; - - // - // CPU Fan Control - // - UINT8 CpuFanControl; - UINT8 CpuFanControlLockHide; - - // - // Lowest Fan Speed - // - UINT8 LowestFanSpeed; - UINT8 LowestFanSpeedLockHide; - - // - // Processor (CPU) - // - UINT8 CpuFlavor; - - UINT8 CpuidMaxValue; - UINT8 CpuidMaxValueLockHide; - - UINT8 ExecuteDisableBit; - UINT8 ExecuteDisableBitLockHide; - - // - // EIST or GV3 setup option - // - UINT8 ProcessorEistEnable; - UINT8 ProcessorEistEnableLockHide; - - // - // C1E Enable - // - UINT8 ProcessorC1eEnable; - UINT8 ProcessorC1eEnableLockHide; - - // - // Enabling CPU C-States of processor - // - UINT8 ProcessorCcxEnable; - UINT8 ProcessorCcxEnableLockHide; - - // - // Package C-State Limit - // - UINT8 PackageCState; - UINT8 PackageCStateLockHide; - - // - // Enable/Disable NHM C3(ACPI C2) report to OS - // - UINT8 OSC2Report; - UINT8 OSC2ReportLockHide; - - // - // Enable/Disable NHM C6(ACPI C3) report to OS - // - UINT8 C6Enable; - UINT8 C6EnableLockHide; - - // - // Enable/Disable NHM C7(ACPI C3) report to OS - // - UINT8 C7Enable; - UINT8 C7EnableLockHide; - - // - // EIST/PSD Function select option - // - UINT8 ProcessorEistPsdFunc; - UINT8 ProcessorEistPsdFuncLockHide; - - // - // - // - UINT8 CPU00; - UINT8 CPU01; - - // - // - // - UINT8 CPU02; - UINT8 CPU03; - - // - // - // - UINT8 CPU04; - UINT8 CPU05; - - // - // - // - UINT8 CPU06; - UINT8 CPU07; - - // - // - // - UINT8 CPU08; - UINT8 CPU09; - - // - // - // - UINT8 CPU10; - UINT8 CPU11; - - // - // - // - UINT8 CPU12; - UINT8 CPU13; - - // - // - // - UINT8 CPU14; - UINT8 CPU15; - - // - // - // - UINT8 CPU16; - UINT8 CPU17; - - // - // - // - UINT8 CPU18; - UINT8 CPU19; - - // - // - // - UINT8 CPU20; - UINT8 CPU21; - - // - // - // - UINT8 CPU22; - UINT8 CPU23; - - // - // - // - UINT8 CPU24; - UINT8 CPU25; - - // - // - // - UINT8 CPU26; - UINT8 CPU27; - - // - // - // - UINT8 CPU28; - UINT8 CPU29; - - // - // - // - UINT8 CPU30; - UINT8 CPU31; - - // - // - // - UINT8 CPU32; - UINT8 CPU33; - - // - // - // - UINT8 CPU34; - UINT8 CPU35; - - // - // - // - UINT8 CPU36; - UINT8 CPU37; - - // - // - // - UINT8 CPU38; - UINT8 CPU39; - - // - // - // - UINT16 CPU40; - UINT8 CPU41; - - // - // - // - UINT8 CPU42; - UINT8 CPU43; - - // - // - // - UINT16 CPU44; - UINT8 CPU45; - - // - // - // - UINT8 CPU46; - UINT8 CPU47; - - // - // - // - UINT8 CPU48; - UINT8 CPU49; - - // - // - // - UINT8 CPU50; - UINT8 CPU51; - - // - // - // - UINT8 CPU52; - UINT8 CPU53; - - // - // - // - UINT8 CPU54; - UINT8 CPU55; - - // - // - // - UINT8 CPU56; - UINT8 CPU57; - - // - // - // - UINT8 CPU58; - UINT8 CPU59; - - // - // - // - UINT8 CPU60; - UINT8 CPU61; - - // - // - // - UINT8 CPU62; - UINT8 CPU63; - - // - // - // - UINT8 CPU64; - UINT8 CPU65; - - // - // - // - UINT8 CPU66; - UINT8 CPU67; - - // - // - // - UINT16 CPU68; - UINT8 CPU69; - - // - // - // - UINT16 CPU70; - - // - // - // - UINT8 CPU71; - - // - // - // - UINT8 MEM00; - UINT8 MEM01; - - // - // - // - UINT8 MEM02; - UINT8 MEM03; - - UINT16 MEM04; - UINT8 MEM05; - - UINT8 MEM06; - UINT8 MEM07; - - UINT8 MEM08; - UINT8 MEM09; - - UINT8 MEM10; - UINT8 MEM11; - - UINT8 MEM12; - UINT8 MEM13; - - UINT8 MEM14; - UINT8 MEM15; - - UINT8 MEM16; - UINT8 MEM17; - - UINT16 MEM18; - UINT8 MEM19; - - UINT8 MEM20; - UINT8 MEM21; - - UINT8 MEM22; - UINT8 MEM23; - - UINT8 MEM24; - UINT8 MEM25; - - UINT8 MEM26; - UINT8 MEM27; - - UINT8 MEM28; - UINT8 MEM29; - - UINT8 MEM30; - UINT8 MEM31; - - UINT8 MEM32; - UINT8 MEM33; - - UINT8 MEM34; - UINT8 MEM35; - - // - // - // - UINT8 MEM36; - UINT8 MEM37; - UINT8 MEM38; - UINT8 MEM39; - - // - // - // - UINT8 MEM40; - UINT8 MEM41; - UINT8 MEM42; - UINT8 MEM43; - UINT8 MEM44; - UINT8 MEM45; - UINT8 MEM46; - UINT8 MEM47; - - - // - // Port 80 decode 0/1 - PCI/LPC - UINT8 Port80Route; - UINT8 Port80RouteLockHide; - - // - // ECC Event Logging - // - UINT8 EccEventLogging; - UINT8 EccEventLoggingLockHide; - - // - // TPM Enable/Disable - // - UINT8 ETpm; - - // - // TPM question 0 = Disabled, 1 = Enabled - // - UINT8 ETpmClear; - - // - // Secondary SATA Controller question 0 = Disabled, 1 = Enabled - // - UINT8 ExtSata; - UINT8 ExtSataLockHide; - - // - // Mode selection for Secondary SATA Controller (0=IDE, 1=RAID) - // - UINT8 ExtSataMode; - UINT8 ExtSataModeLockHide; - - // - // LT Technology 0/1 -> Disable/Enable - // - UINT8 LtTechnology; - UINT8 LtTechnologyLockHide; - - // - // HPET Support 0/1 -> Disable/Enable - // - UINT8 Hpet; - UINT8 HpetLockHide; - - // - // ICH Function Level Reset enable/disable - // - UINT8 FlrCapability; - UINT8 FlrCapabilityLockHide; - - // VT-d Option - UINT8 VTdSupport; - UINT8 VTdSupportLockHide; - - UINT8 InterruptRemap; - UINT8 InterruptRemapLockHide; - - UINT8 Isoc; - UINT8 IsocLockHide; - - UINT8 CoherencySupport; - UINT8 CoherencySupportLockHide; - - UINT8 ATS; - UINT8 ATSLockHide; - - UINT8 PassThroughDma; - UINT8 PassThroughDmaLockHide; - - // - // IGD option - // - UINT8 GraphicsDriverMemorySize; - UINT8 GraphicsDriverMemorySizeLockHide; - - - // - // Discrete SATA Type (Ide, Raid, Ahci) - // - UINT8 ExtSataMode2; - UINT8 ExtSataMode2LockHide; - - UINT8 ProcessorReserve00; - UINT8 ProcessorReserve01; - - // - // IGD Aperture Size question - // - UINT8 IgdApertureSize; - UINT8 IgdApertureSizeLockHide; - - // - // Boot Display Device - // - UINT8 BootDisplayDevice; - UINT8 BootDisplayDeviceLockHide; - - - // - // System fan speed duty cycle - // - UINT8 SystemFanDuty; - UINT8 SystemFanDutyLockHide; - - - // - // S3 state LED indicator - // - UINT8 S3StateIndicator; - UINT8 S3StateIndicatorLockHide; - - // - // S1 state LED indicator - // - UINT8 S1StateIndicator; - UINT8 S1StateIndicatorLockHide; - - // - // PS/2 Wake from S5 - // - UINT8 WakeOnS5Keyboard; - UINT8 WakeOnS5KeyboardLockHide; - - - // - // SATA Controller question 0 = Disabled, 1 = Enabled - // - UINT8 Sata; - UINT8 SataLockHide; - - // - // PS2 port - // - UINT8 PS2; - - // - // No VideoBeep - // - UINT8 NoVideoBeepEnable; - - // - // Integrated Graphics Device - // - UINT8 Igd; - - // - // Video Device select order - // - UINT8 VideoSelectOrder[8]; - - // Flash update sleep delay - UINT8 FlashSleepDelay; - UINT8 FlashSleepDelayLockHide; - - // - // Boot Display Device2 - // - UINT8 BootDisplayDevice2; - UINT8 BootDisplayDevice2LockHide; - - // - // Flat Panel - // - UINT8 EdpInterfaceType; - UINT8 EdpInterfaceTypeLockHide; - - UINT8 LvdsInterfaceType; - UINT8 LvdsInterfaceTypeLockHide; - - UINT8 ColorDepth; - UINT8 ColorDepthLockHide; - - UINT8 EdidConfiguration; - UINT8 EdidConfigurationLockHide; - - UINT8 PwmReserved; - UINT8 MaxInverterPWMLockHide; - - UINT8 PreDefinedEdidConfiguration; - UINT8 PreDefinedEdidConfigurationLockHide; - - UINT16 ScreenBrightnessResponseTime; - UINT8 ScreenBrightnessResponseTimeLockHide; - - UINT8 Serial3; - UINT8 Serial3LockHide; - - UINT8 Serial4; - UINT8 Serial4LockHide; - - UINT8 CurrentSetupProfile; - UINT8 CurrentSetupProfileLockHide; - - // - // FSC system Variable - // - UINT8 CPUFanUsage; - UINT8 CPUFanUsageLockHide; - UINT16 CPUUnderSpeedthreshold; - UINT8 CPUUnderSpeedthresholdLockHide; - UINT8 CPUFanControlMode; - UINT8 CPUFanControlModeLockHide; - UINT16 Voltage12UnderVolts; - UINT8 Voltage12UnderVoltsLockHide; - UINT16 Voltage12OverVolts; - UINT8 Voltage12OverVoltsLockHide; - UINT16 Voltage5UnderVolts; - UINT8 Voltage5UnderVoltsLockHide; - UINT16 Voltage5OverVolts; - UINT8 Voltage5OverVoltsLockHide; - UINT16 Voltage3p3UnderVolts; - UINT8 Voltage3p3UnderVoltsLockHide; - UINT16 Voltage3p3OverVolts; - UINT8 Voltage3p3OverVoltsLockHide; - UINT16 Voltage2p5UnderVolts; - UINT8 Voltage2p5UnderVoltsLockHide; - UINT16 Voltage2p5OverVolts; - UINT8 Voltage2p5OverVoltsLockHide; - UINT16 VoltageVccpUnderVolts; - UINT8 VoltageVccpUnderVoltsLockHide; - UINT16 VoltageVccpOverVolts; - UINT8 VoltageVccpOverVoltsLockHide; - UINT16 Voltage5BackupUnderVolts; - UINT8 Voltage5BackupUnderVoltsLockHide; - UINT16 Voltage5BackupOverVolts; - UINT8 Voltage5BackupOverVoltsLockHide; - UINT16 VS3p3StbyUnderVolt; - UINT8 VS3p3StbyUnderVoltLockHide; - UINT16 VS3p3StbyOverVolt; - UINT8 VS3p3StbyOverVoltLockHide; - UINT8 CPUFanMinDutyCycle; - UINT8 CPUFanMinDutyCycleLockHide; - UINT8 CPUFanMaxDutyCycle; - UINT8 CPUFanMaxDutyCycleLockHide; - UINT8 CPUFanOnDutyCycle; - UINT8 CPUFanOnDutyCycleLockHide; - UINT16 CpuOverTemp; - UINT8 CpuOverTempLockHide; - UINT16 CpuControlTemp; - UINT8 CpuControlTempLockHide; - UINT16 CpuAllOnTemp; - UINT8 CpuAllOnTempLockHide; - UINT8 CpuResponsiveness; - UINT8 CpuResponsivenessLockHide; - UINT8 CpuDamping; - UINT8 CpuDampingLockHide; - UINT16 PchOverTemp; - UINT8 PchOverTempLockHide; - UINT16 PchControlTemp; - UINT8 PchControlTempLockHide; - UINT16 PchAllOnTemp; - UINT8 PchAllOnTempLockHide; - UINT8 PchResponsiveness; - UINT8 PchResponsivenessLockHide; - UINT8 PchDamping; - UINT8 PchDampingLockHide; - UINT16 MemoryOverTemp; - UINT8 MemoryOverTempLockHide; - UINT16 MemoryControlTemp; - UINT8 MemoryControlTempLockHide; - UINT16 MemoryAllOnTemp; - UINT8 MemoryAllOnTempLockHide; - UINT8 MemoryResponsiveness; - UINT8 MemoryResponsivenessLockHide; - UINT8 MemoryDamping; - UINT8 MemoryDampingLockHide; - UINT16 VROverTemp; - UINT8 VROverTempLockHide; - UINT16 VRControlTemp; - UINT8 VRControlTempLockHide; - UINT16 VRAllOnTemp; - UINT8 VRAllOnTempLockHide; - UINT8 VRResponsiveness; - UINT8 VRResponsivenessLockHide; - UINT8 VRDamping; - UINT8 VRDampingLockHide; - - UINT8 LvdsBrightnessSteps; - UINT8 LvdsBrightnessStepsLockHide; - UINT8 EdpDataRate; - UINT8 EdpDataRateLockHide; - UINT16 LvdsPowerOnToBacklightEnableDelayTime; - UINT8 LvdsPowerOnToBacklightEnableDelayTimeLockHide; - UINT16 LvdsPowerOnDelayTime; - UINT8 LvdsPowerOnDelayTimeLockHide; - UINT16 LvdsBacklightOffToPowerDownDelayTime; - UINT8 LvdsBacklightOffToPowerDownDelayTimeLockHide; - UINT16 LvdsPowerDownDelayTime; - UINT8 LvdsPowerDownDelayTimeLockHide; - UINT16 LvdsPowerCycleDelayTime; - UINT8 LvdsPowerCycleDelayTimeLockHide; - - UINT8 IgdFlatPanel; - UINT8 IgdFlatPanelLockHide; - UINT8 Lan2; - UINT8 Lan2LockHide; - - UINT8 SwapMode; - UINT8 SwapModeLockHide; - - UINT8 Sata0HotPlugCap; - UINT8 Sata0HotPlugCapLockHide; - UINT8 Sata1HotPlugCap; - UINT8 Sata1HotPlugCapLockHide; - - UINT8 UsbCharging; - UINT8 UsbChargingLockHide; - - UINT8 Cstates; - UINT8 EnableC4; - UINT8 EnableC6; - - UINT8 FastBoot; - UINT8 EfiNetworkSupport; - UINT8 PxeRom; - - //Add for PpmPlatformPlicy - UINT8 PPM00; - UINT8 PPM01; - UINT8 PPM02; - UINT8 PPM03; - UINT8 PPM04; - UINT8 PPM05; - UINT8 PPM06; - UINT8 PPM07; - UINT8 PPM08; - UINT8 PPM09; - UINT8 PPM10; - UINT8 QuietBoot; - UINT8 LegacyUSBBooting; - - UINT8 PwmReserved02; - // - // Thermal Policy Values - // - UINT8 EnableDigitalThermalSensor; - UINT8 PassiveThermalTripPoint; - UINT8 PassiveTc1Value; - UINT8 PassiveTc2Value; - UINT8 PassiveTspValue; - UINT8 DisableActiveTripPoints; - UINT8 CriticalThermalTripPoint; - UINT8 IchPciExp[4]; - UINT8 DeepStandby; - UINT8 AlsEnable; - UINT8 IgdLcdIBia; - UINT8 LogBootTime; - - - UINT8 PcieRootPortIOApic[4]; - UINT8 IffsEnable; - UINT8 IffsOnS3RtcWake; - UINT8 IffsS3WakeTimerMin; - UINT8 IffsOnS3CritBattWake; - UINT8 IffsCritBattWakeThreshold; - UINT8 ScramblerSupport; - UINT8 SecureBoot; - UINT8 SecureBootCustomMode; - UINT8 SecureBootUserPhysicalPresent; - UINT8 CoreFreMultipSelect; - UINT8 MaxCState; - UINT8 PanelScaling; - UINT8 IgdLcdIGmchBlc; - UINT8 GfxBoost; - UINT8 IgdThermal; - UINT8 SEC00; - UINT8 fTPM; - UINT8 SEC02; - UINT8 SEC03; - UINT8 MeasuredBootEnable; - UINT8 UseProductKey; - //Image Signal Processor PCI Device Configuration - // - UINT8 ISPDevSel; - UINT8 ISPEn; - // Passwords - UINT16 UserPassword[PASSWORD_MAX_SIZE]; - UINT16 AdminPassword[PASSWORD_MAX_SIZE]; - UINT8 Tdt; - UINT8 Recovery; - UINT8 Suspend; - UINT8 TdtState; - UINT8 TdtEnrolled; - UINT8 PBAEnable; - - UINT8 HpetBootTime; - UINT8 UsbDebug; - UINT8 Lpe; - // - // LPSS Configuration - // - UINT8 LpssPciModeEnabled; - //Scc - UINT8 LpsseMMCEnabled; - UINT8 LpssSdioEnabled; - UINT8 LpssSdcardEnabled; - UINT8 LpssSdCardSDR25Enabled; - UINT8 LpssSdCardDDR50Enabled; - UINT8 LpssMipiHsi; - UINT8 LpsseMMC45Enabled; - UINT8 LpsseMMC45DDR50Enabled; - UINT8 LpsseMMC45HS200Enabled; - UINT8 LpsseMMC45RetuneTimerValue; - UINT8 eMMCBootMode; - - //LPSS2 - UINT8 LpssDma1Enabled; - UINT8 LpssI2C0Enabled; - UINT8 LpssI2C1Enabled; - UINT8 LpssI2C2Enabled; - UINT8 LpssI2C3Enabled; - UINT8 LpssI2C4Enabled; - UINT8 LpssI2C5Enabled; - UINT8 LpssI2C6Enabled; - //LPSS1 - UINT8 LpssDma0Enabled; - UINT8 LpssPwm0Enabled; - UINT8 LpssPwm1Enabled; - UINT8 LpssHsuart0Enabled; - UINT8 LpssHsuart1Enabled; - UINT8 LpssSpiEnabled; - UINT8 I2CTouchAd; - - UINT8 GTTSize; - // - // DVMT5.0 Graphic memory setting - // - UINT8 IgdDvmt50PreAlloc; - UINT8 IgdDvmt50TotalAlloc; - UINT8 IgdTurboEnabled; - - // - // Usb Config - // - UINT8 UsbAutoMode; // PCH controller Auto mode - UINT8 UsbXhciSupport; - UINT8 Hsic0; - UINT8 PchUsb30Mode; - UINT8 PchUsb30Streams; - UINT8 PchUsb20; - UINT8 PchUsbPerPortCtl; - UINT8 PchUsbPort[8]; - UINT8 PchUsbRmh; - UINT8 PchUsbOtg; - UINT8 PchUsbVbusOn; //OTG VBUS control - UINT8 PchFSAOn; //FSA control - UINT8 EhciPllCfgEnable; - - - //Gbe - UINT8 PcieRootPortSpeed[PCH_PCIE_MAX_ROOT_PORTS]; - UINT8 SlpLanLowDc; - - UINT8 ISCT00; - UINT8 ISCT01; - UINT8 ISCT02; - UINT8 ISCT03; - UINT8 ISCT04; - UINT8 ISCT05; - UINT8 ISCT06; - UINT8 ISCT07; - // - // Azalia Configuration - // - UINT8 PchAzalia; - UINT8 AzaliaVCiEnable; - UINT8 AzaliaDs; - UINT8 AzaliaPme; - UINT8 HdmiCodec; - - UINT8 UartInterface; - UINT8 PcuUart1; - //UINT8 PcuUart2;//for A0 - UINT8 StateAfterG3; - UINT8 EnableClockSpreadSpec; - UINT8 GraphicReserve00; - UINT8 GOPEnable; - UINT8 GOPBrightnessLevel; //Gop Brightness level - UINT8 PavpMode; - UINT8 SEC04; - UINT8 SEC05; - UINT8 SEC06; - UINT8 SEC07; - - UINT8 HdmiCodecPortB; - UINT8 HdmiCodecPortC; - UINT8 HdmiCodecPortD; - UINT8 LidStatus; - UINT8 Reserved00; - UINT8 Reserved01; - UINT16 Reserved02; - UINT16 Reserved03; - UINT16 Reserved04; - UINT16 Reserved05; - UINT16 Reserved06; - UINT16 Reserved07; - UINT16 Reserved08; - UINT16 Reserved09; - UINT16 Reserved0A; - UINT16 Reserved0B; - UINT16 Reserved0C; - UINT16 Reserved0D; - UINT8 Reserved0E; - UINT8 Reserved0F; - UINT32 Reserved10; - UINT32 Reserved11; - UINT32 Reserved12; - UINT32 Reserved13; - UINT32 Reserved14; - UINT8 Reserved15; - UINT8 Reserved16; - UINT8 Reserved17; - UINT8 Reserved18; - UINT8 Reserved19; - UINT8 Reserved1A; - UINT8 Reserved1B; - UINT8 Reserved1C; - UINT8 Reserved1D; - UINT8 Reserved1E; - UINT8 Reserved1F; - UINT8 Reserved20; - UINT8 PmicEnable; - UINT8 IdleReserve; - UINT8 TSEGSizeSel; - UINT8 ACPIMemDbg; - UINT8 ExISupport; - UINT8 BatteryChargingSolution; //0-non ULPMC 1-ULPMC - UINT8 PnpSettings; - UINT8 CfioPnpSettings; - UINT8 PchEhciDebug; - UINT8 CRIDSettings; - UINT8 ULPMCFWLock; - UINT8 SpiRwProtect; - UINT8 GraphicReserve02; - UINT8 PDMConfig; - UINT16 LmMemSize; - UINT8 PunitBIOSConfig; - UINT8 LpssSdioMode; - UINT8 ENDBG2; - UINT8 WittEnable; - UINT8 UtsEnable; - UINT8 TristateLpc; - UINT8 GraphicReserve05; - UINT8 UsbXhciLpmSupport; - UINT8 EnableAESNI; - UINT8 SecureErase; - - UINT8 MmioSize; - - - UINT8 SAR1; - - UINT8 DisableCodec262; - UINT8 ReservedO; - UINT8 PcieDynamicGating; // Need PMC enable it first from PMC 0x3_12 MCU 318. - - UINT8 MipiDsi; - - //Added flow control item for UART1 and UART2 - UINT8 LpssHsuart0FlowControlEnabled; - UINT8 LpssHsuart1FlowControlEnabled; - - UINT8 SdCardRemovable; // ACPI reporting MMC/SD media as: removable/non-removable - UINT8 GpioWakeCapability; - UINT8 RtcBattery; - -} SYSTEM_CONFIGURATION; -#pragma pack() - -#ifndef PLATFORM_SETUP_VARIABLE_NAME -#define PLATFORM_SETUP_VARIABLE_NAME L"Setup" -#endif - -#pragma pack(1) -typedef struct{ - // Passwords - UINT16 UserPassword[PASSWORD_MAX_SIZE]; - UINT16 AdminPassword[PASSWORD_MAX_SIZE]; - UINT16 DummyDataForVfrBug; // Don't change or use - -} SYSTEM_PASSWORDS; -#pragma pack() - -// -// #defines for Drive Presence -// -#define EFI_HDD_PRESENT 0x01 -#define EFI_HDD_NOT_PRESENT 0x00 -#define EFI_CD_PRESENT 0x02 -#define EFI_CD_NOT_PRESENT 0x00 - -#define EFI_HDD_WARNING_ON 0x01 -#define EFI_CD_WARNING_ON 0x02 -#define EFI_SMART_WARNING_ON 0x04 -#define EFI_HDD_WARNING_OFF 0x00 -#define EFI_CD_WARNING_OFF 0x00 -#define EFI_SMART_WARNING_OFF 0x00 - -#ifndef VFRCOMPILE -extern EFI_GUID gEfiSetupVariableGuid; -#endif - -#define SETUP_DATA SYSTEM_CONFIGURATION - -#endif // #ifndef _SETUP_VARIABLE +/** @file + + Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
+ + + This program and the accompanying materials are licensed and made available under + + the terms and conditions of the BSD License that accompanies this distribution. + + The full text of the license may be found at + + http://opensource.org/licenses/bsd-license.php. + + + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + + + +Module Name: + + SetupVariable.h + +Abstract: + + Driver configuration include file + + +**/ + +#ifndef _SETUP_VARIABLE_H +#define _SETUP_VARIABLE_H + +// +// --------------------------------------------------------------------------- +// +// Driver Configuration +// +// --------------------------------------------------------------------------- +// + +// +// {EC87D643-EBA4-4bb5-A1E5-3F3E36B20DA9} +// +#define SYSTEM_CONFIGURATION_GUID\ + { \ + 0xec87d643, 0xeba4, 0x4bb5, 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0xa9 \ + } + +#define ROOT_SECURITY_GUID\ + { \ + 0xd387d688, 0xeba4, 0x45b5, 0xa1, 0xe5, 0x3f, 0x3e, 0x36, 0xb2, 0xd, 0x37 \ + } + +// +// {6936B3BD-4350-46d9-8940-1FA20961AEB1} +// +#define SYSTEM_ROOT_MAIN_GUID\ + { \ + 0x6936b3bd, 0x4350, 0x46d9, 0x89, 0x40, 0x1f, 0xa2, 0x9, 0x61, 0xae, 0xb1 \ + } + +// +// {21FEE8DB-0D29-477e-B5A9-96EB343BA99C} +// +#define ADDITIONAL_SYSTEM_INFO_GUID\ + { \ + 0x21fee8db, 0xd29, 0x477e, 0xb5, 0xa9, 0x96, 0xeb, 0x34, 0x3b, 0xa9, 0x9c \ + } + +#define SETUP_GUID { 0xEC87D643, 0xEBA4, 0x4BB5, 0xA1, 0xE5, 0x3F, 0x3E, 0x36, 0xB2, 0x0D, 0xA9 } + +// {1B838190-4625-4ead-ABC9-CD5E6AF18FE0} +#define EFI_HII_EXPORT_DATABASE_GUID { 0x1b838190, 0x4625, 0x4ead, 0xab, 0xc9, 0xcd, 0x5e, 0x6a, 0xf1, 0x8f, 0xe0 } + +#define PASSWORD_MAX_SIZE 20 + +#define MAX_CUSTOM_VID_TABLE_STATES 6 +// +// Overclocking Source Defines +// +#define OVERCLOCK_SOURCE_BIOS 0 +#define OVERCLOCK_SOURCE_OS 1 + +#define PCH_PCIE_MAX_ROOT_PORTS 4 + +#pragma pack(1) + +// NOTE: When you add anything to this structure, +// you MUST add it to the very bottom!!!! +// You must make sure the structure size is able to divide by 32! +typedef struct { + + // + // Floppy + // + UINT8 Floppy; + UINT8 FloppyLockHide; + + UINT8 FloppyWriteProtect; + UINT8 FloppyWriteProtectLockHide; + + // + // System ports + // + UINT8 Serial; + UINT8 SerialLockHide; + + UINT8 Serial2; + UINT8 Serial2LockHide; + + UINT8 Parallel; + UINT8 ParallelLockHide; + + UINT8 ParallelMode; + UINT8 ParallelModeLockHide; + + UINT8 AllUsb; + UINT8 UsbPortsLockHide; + + UINT8 Usb2; + UINT8 Usb2LockHide; + + UINT8 UsbLegacy; + UINT8 UsbLegacyLockHide; + + UINT8 Audio; + UINT8 AudioLockHide; + + UINT8 Lan; + UINT8 LanLockHide; + + // + // Keyboard + // + UINT8 Numlock; + UINT8 NumlockLockHide; + + // + // ECIR + // + UINT8 ECIR; + UINT8 ECIRLockHide; + + // + // Power State + // + UINT8 PowerState; + UINT8 PowerStateLockHide; + + // + // Wake on RTC variables + // + UINT8 WakeOnRtcS5; + UINT8 WakeOnRtcS5LockHide; + UINT8 RTCWakeupDate; + UINT8 RTCWakeupDateLockHide; + UINT8 RTCWakeupTimeHour; + UINT8 RTCWakeupHourLockHide; + UINT8 RTCWakeupTimeMinute; + UINT8 RTCWakeupMinuteLockHide; + UINT8 RTCWakeupTimeSecond; + UINT8 RTCWakeupSecondLockHide; + + // + // Wake On Lan + // + UINT8 WakeOnLanS5; + UINT8 WakeOnLanS5LockHide; + + //Spread spectrum + UINT8 SpreadSpectrum; + + // + // Boot Order + // + UINT8 BootOrder[8]; + UINT8 BootOrderLockHide; + + // + // Hard Drive Boot Order + // + UINT8 HardDriveBootOrder[8]; + UINT8 HardDriveBootOrderLockHide; + + // + // CD Drive Boot Order + // + UINT8 CdDriveBootOrder[4]; + UINT8 CdDriveBootOrderLockHide; + + // + // FDD Drive Boot Order + // + UINT8 FddDriveBootOrder[4]; + UINT8 FddDriveBootOrderLockHide; + + // + // Drive Boot Order + // + UINT8 DriveBootOrder[16]; + UINT8 DriveBootOrderLockHide; + + // + // Boot Menu Type + // + UINT8 BootMenuType; + UINT8 BootMenuTypeLockHide; + + // + // Boot from Removable Devices + // + UINT8 BootFloppy; + UINT8 BootFloppyLockHide; + + // + // Boot from Optical Devices + // + UINT8 BootCd; + UINT8 BootCdLockHide; + + // + // Boot from Network + // + UINT8 BootNetwork; + UINT8 BootNetworkLockHide; + + // + // Boot USB + // + UINT8 BootUsb; + UINT8 BootUsbLockHide; + + // + // USB Zip Emulation Type + // + UINT8 UsbZipEmulation; + UINT8 UsbZipEmulationLockHide; + + // + // USB Devices Boot First in Boot Order + // + UINT8 UsbDevicesBootFirst; + UINT8 UsbDevicesBootFirstLockHide; + + // + // USB Boot Device SETUP Emulation + // + UINT8 UsbSetupDeviceEmulation; + UINT8 UsbSetupDeviceEmulationLockHide; + + // + // BIOS INT13 Emulation for USB Mass Devices + // + UINT8 UsbBIOSINT13DeviceEmulation; + UINT8 UsbBIOSINT13DeviceEmulationLockHide; + + // + // BIOS INT13 Emulation Size for USB Mass Devices + // + UINT16 UsbBIOSINT13DeviceEmulationSize; + UINT8 UsbBIOSINT13DeviceEmulationSizeLockHide; + + // + // Dummy place holder to prevent VFR compiler problem. + // + UINT16 DummyDataForVfrBug; // Don't change or use. + + // + // Language Select + // + UINT8 LanguageSelect; + + // + // SATA Type (Ide, Ahci, Raid) + // + UINT8 SataType; + UINT8 SataTypeLockHide; + UINT8 SataTestMode; + + // + // Fixed Disk Boot Sector (Fdbs) + // + UINT8 Fdbs; + UINT8 FdbsLockHide; + + // + // DisplaySetupPrompt + // + UINT8 DisplaySetupPrompt; + UINT8 DisplaySetupPromptLockHide; + + // + // ASF + // + UINT8 Asf; + UINT8 AsfLockHide; + + // + // Event Logging + // + UINT8 EventLogging; + UINT8 EventLoggingLockHide; + + // + // Clear Event Log + // + UINT8 ClearEvents; + UINT8 ClearEventsLockHide; + + // + // Expansion Card Text + // + UINT8 ExpansionCardText; + UINT8 ExpansionCardTextLockHide; + + // + // Video Adaptor + // + UINT8 PrimaryVideoAdaptor; + UINT8 PrimaryVideoAdaptorLockHide; + + // + // Chassis intrusion + // + UINT8 IntruderDetection; + UINT8 IntruderDetectionLockHide; + + // + // User Access Level + // + UINT8 UserPasswordLevel; + UINT8 UserPasswordLevelLockHide; + + // + // Maximum FSB Automatic/Disable + // + UINT8 MaxFsb; + UINT8 MaxFsbLockHide; + + // + // Hard Disk Pre-delay + // + UINT8 HddPredelay; + UINT8 HddPredelayLockHide; + + // + // S.M.A.R.T. Mode + // + UINT8 SmartMode; + UINT8 SmartModeLockHide; + + // + // ACPI Suspend State + // + UINT8 AcpiSuspendState; + UINT8 AcpiSuspendStateLockHide; + + // + // PCI Latency Timer + // + UINT8 PciLatency; + UINT8 PciLatencyLockHide; + + // + // Fan Control + // + UINT8 FanControl; + UINT8 FanControlLockHide; + + // + // CPU Fan Control + // + UINT8 CpuFanControl; + UINT8 CpuFanControlLockHide; + + // + // Lowest Fan Speed + // + UINT8 LowestFanSpeed; + UINT8 LowestFanSpeedLockHide; + + // + // Processor (CPU) + // + UINT8 CpuFlavor; + + UINT8 CpuidMaxValue; + UINT8 CpuidMaxValueLockHide; + + UINT8 ExecuteDisableBit; + UINT8 ExecuteDisableBitLockHide; + + // + // EIST or GV3 setup option + // + UINT8 ProcessorEistEnable; + UINT8 ProcessorEistEnableLockHide; + + // + // C1E Enable + // + UINT8 ProcessorC1eEnable; + UINT8 ProcessorC1eEnableLockHide; + + // + // Enabling CPU C-States of processor + // + UINT8 ProcessorCcxEnable; + UINT8 ProcessorCcxEnableLockHide; + + // + // Package C-State Limit + // + UINT8 PackageCState; + UINT8 PackageCStateLockHide; + + // + // Enable/Disable NHM C3(ACPI C2) report to OS + // + UINT8 OSC2Report; + UINT8 OSC2ReportLockHide; + + // + // Enable/Disable NHM C6(ACPI C3) report to OS + // + UINT8 C6Enable; + UINT8 C6EnableLockHide; + + // + // Enable/Disable NHM C7(ACPI C3) report to OS + // + UINT8 C7Enable; + UINT8 C7EnableLockHide; + + // + // EIST/PSD Function select option + // + UINT8 ProcessorEistPsdFunc; + UINT8 ProcessorEistPsdFuncLockHide; + + // + // + // + UINT8 CPU00; + UINT8 CPU01; + + // + // + // + UINT8 CPU02; + UINT8 CPU03; + + // + // + // + UINT8 CPU04; + UINT8 CPU05; + + // + // + // + UINT8 CPU06; + UINT8 CPU07; + + // + // + // + UINT8 CPU08; + UINT8 CPU09; + + // + // + // + UINT8 CPU10; + UINT8 CPU11; + + // + // + // + UINT8 CPU12; + UINT8 CPU13; + + // + // + // + UINT8 CPU14; + UINT8 CPU15; + + // + // + // + UINT8 CPU16; + UINT8 CPU17; + + // + // + // + UINT8 CPU18; + UINT8 CPU19; + + // + // + // + UINT8 CPU20; + UINT8 CPU21; + + // + // + // + UINT8 CPU22; + UINT8 CPU23; + + // + // + // + UINT8 CPU24; + UINT8 CPU25; + + // + // + // + UINT8 CPU26; + UINT8 CPU27; + + // + // + // + UINT8 CPU28; + UINT8 CPU29; + + // + // + // + UINT8 CPU30; + UINT8 CPU31; + + // + // + // + UINT8 CPU32; + UINT8 CPU33; + + // + // + // + UINT8 CPU34; + UINT8 CPU35; + + // + // + // + UINT8 CPU36; + UINT8 CPU37; + + // + // + // + UINT8 CPU38; + UINT8 CPU39; + + // + // + // + UINT16 CPU40; + UINT8 CPU41; + + // + // + // + UINT8 CPU42; + UINT8 CPU43; + + // + // + // + UINT16 CPU44; + UINT8 CPU45; + + // + // + // + UINT8 CPU46; + UINT8 CPU47; + + // + // + // + UINT8 CPU48; + UINT8 CPU49; + + // + // + // + UINT8 CPU50; + UINT8 CPU51; + + // + // + // + UINT8 CPU52; + UINT8 CPU53; + + // + // + // + UINT8 CPU54; + UINT8 CPU55; + + // + // + // + UINT8 CPU56; + UINT8 CPU57; + + // + // + // + UINT8 CPU58; + UINT8 CPU59; + + // + // + // + UINT8 CPU60; + UINT8 CPU61; + + // + // + // + UINT8 CPU62; + UINT8 CPU63; + + // + // + // + UINT8 CPU64; + UINT8 CPU65; + + // + // + // + UINT8 CPU66; + UINT8 CPU67; + + // + // + // + UINT16 CPU68; + UINT8 CPU69; + + // + // + // + UINT16 CPU70; + + // + // + // + UINT8 CPU71; + + // + // + // + UINT8 MEM00; + UINT8 MEM01; + + // + // + // + UINT8 MEM02; + UINT8 MEM03; + + UINT16 MEM04; + UINT8 MEM05; + + UINT8 MEM06; + UINT8 MEM07; + + UINT8 MEM08; + UINT8 MEM09; + + UINT8 MEM10; + UINT8 MEM11; + + UINT8 MEM12; + UINT8 MEM13; + + UINT8 MEM14; + UINT8 MEM15; + + UINT8 MEM16; + UINT8 MEM17; + + UINT16 MEM18; + UINT8 MEM19; + + UINT8 MEM20; + UINT8 MEM21; + + UINT8 MEM22; + UINT8 MEM23; + + UINT8 MEM24; + UINT8 MEM25; + + UINT8 MEM26; + UINT8 MEM27; + + UINT8 MEM28; + UINT8 MEM29; + + UINT8 MEM30; + UINT8 MEM31; + + UINT8 MEM32; + UINT8 MEM33; + + UINT8 MEM34; + UINT8 MEM35; + + // + // + // + UINT8 MEM36; + UINT8 MEM37; + UINT8 MEM38; + UINT8 MEM39; + + // + // + // + UINT8 MEM40; + UINT8 MEM41; + UINT8 MEM42; + UINT8 MEM43; + UINT8 MEM44; + UINT8 MEM45; + UINT8 MEM46; + UINT8 MEM47; + + + // + // Port 80 decode 0/1 - PCI/LPC + UINT8 Port80Route; + UINT8 Port80RouteLockHide; + + // + // ECC Event Logging + // + UINT8 EccEventLogging; + UINT8 EccEventLoggingLockHide; + + // + // TPM Enable/Disable + // + UINT8 ETpm; + + // + // TPM question 0 = Disabled, 1 = Enabled + // + UINT8 ETpmClear; + + // + // Secondary SATA Controller question 0 = Disabled, 1 = Enabled + // + UINT8 ExtSata; + UINT8 ExtSataLockHide; + + // + // Mode selection for Secondary SATA Controller (0=IDE, 1=RAID) + // + UINT8 ExtSataMode; + UINT8 ExtSataModeLockHide; + + // + // LT Technology 0/1 -> Disable/Enable + // + UINT8 LtTechnology; + UINT8 LtTechnologyLockHide; + + // + // HPET Support 0/1 -> Disable/Enable + // + UINT8 Hpet; + UINT8 HpetLockHide; + + // + // ICH Function Level Reset enable/disable + // + UINT8 FlrCapability; + UINT8 FlrCapabilityLockHide; + + // VT-d Option + UINT8 VTdSupport; + UINT8 VTdSupportLockHide; + + UINT8 InterruptRemap; + UINT8 InterruptRemapLockHide; + + UINT8 Isoc; + UINT8 IsocLockHide; + + UINT8 CoherencySupport; + UINT8 CoherencySupportLockHide; + + UINT8 ATS; + UINT8 ATSLockHide; + + UINT8 PassThroughDma; + UINT8 PassThroughDmaLockHide; + + // + // IGD option + // + UINT8 GraphicsDriverMemorySize; + UINT8 GraphicsDriverMemorySizeLockHide; + + + // + // Discrete SATA Type (Ide, Raid, Ahci) + // + UINT8 ExtSataMode2; + UINT8 ExtSataMode2LockHide; + + UINT8 ProcessorReserve00; + UINT8 ProcessorReserve01; + + // + // IGD Aperture Size question + // + UINT8 IgdApertureSize; + UINT8 IgdApertureSizeLockHide; + + // + // Boot Display Device + // + UINT8 BootDisplayDevice; + UINT8 BootDisplayDeviceLockHide; + + + // + // System fan speed duty cycle + // + UINT8 SystemFanDuty; + UINT8 SystemFanDutyLockHide; + + + // + // S3 state LED indicator + // + UINT8 S3StateIndicator; + UINT8 S3StateIndicatorLockHide; + + // + // S1 state LED indicator + // + UINT8 S1StateIndicator; + UINT8 S1StateIndicatorLockHide; + + // + // PS/2 Wake from S5 + // + UINT8 WakeOnS5Keyboard; + UINT8 WakeOnS5KeyboardLockHide; + + + // + // SATA Controller question 0 = Disabled, 1 = Enabled + // + UINT8 Sata; + UINT8 SataLockHide; + + // + // PS2 port + // + UINT8 PS2; + + // + // No VideoBeep + // + UINT8 NoVideoBeepEnable; + + // + // Integrated Graphics Device + // + UINT8 Igd; + + // + // Video Device select order + // + UINT8 VideoSelectOrder[8]; + + // Flash update sleep delay + UINT8 FlashSleepDelay; + UINT8 FlashSleepDelayLockHide; + + // + // Boot Display Device2 + // + UINT8 BootDisplayDevice2; + UINT8 BootDisplayDevice2LockHide; + + // + // Flat Panel + // + UINT8 EdpInterfaceType; + UINT8 EdpInterfaceTypeLockHide; + + UINT8 LvdsInterfaceType; + UINT8 LvdsInterfaceTypeLockHide; + + UINT8 ColorDepth; + UINT8 ColorDepthLockHide; + + UINT8 EdidConfiguration; + UINT8 EdidConfigurationLockHide; + + UINT8 PwmReserved; + UINT8 MaxInverterPWMLockHide; + + UINT8 PreDefinedEdidConfiguration; + UINT8 PreDefinedEdidConfigurationLockHide; + + UINT16 ScreenBrightnessResponseTime; + UINT8 ScreenBrightnessResponseTimeLockHide; + + UINT8 Serial3; + UINT8 Serial3LockHide; + + UINT8 Serial4; + UINT8 Serial4LockHide; + + UINT8 CurrentSetupProfile; + UINT8 CurrentSetupProfileLockHide; + + // + // FSC system Variable + // + UINT8 CPUFanUsage; + UINT8 CPUFanUsageLockHide; + UINT16 CPUUnderSpeedthreshold; + UINT8 CPUUnderSpeedthresholdLockHide; + UINT8 CPUFanControlMode; + UINT8 CPUFanControlModeLockHide; + UINT16 Voltage12UnderVolts; + UINT8 Voltage12UnderVoltsLockHide; + UINT16 Voltage12OverVolts; + UINT8 Voltage12OverVoltsLockHide; + UINT16 Voltage5UnderVolts; + UINT8 Voltage5UnderVoltsLockHide; + UINT16 Voltage5OverVolts; + UINT8 Voltage5OverVoltsLockHide; + UINT16 Voltage3p3UnderVolts; + UINT8 Voltage3p3UnderVoltsLockHide; + UINT16 Voltage3p3OverVolts; + UINT8 Voltage3p3OverVoltsLockHide; + UINT16 Voltage2p5UnderVolts; + UINT8 Voltage2p5UnderVoltsLockHide; + UINT16 Voltage2p5OverVolts; + UINT8 Voltage2p5OverVoltsLockHide; + UINT16 VoltageVccpUnderVolts; + UINT8 VoltageVccpUnderVoltsLockHide; + UINT16 VoltageVccpOverVolts; + UINT8 VoltageVccpOverVoltsLockHide; + UINT16 Voltage5BackupUnderVolts; + UINT8 Voltage5BackupUnderVoltsLockHide; + UINT16 Voltage5BackupOverVolts; + UINT8 Voltage5BackupOverVoltsLockHide; + UINT16 VS3p3StbyUnderVolt; + UINT8 VS3p3StbyUnderVoltLockHide; + UINT16 VS3p3StbyOverVolt; + UINT8 VS3p3StbyOverVoltLockHide; + UINT8 CPUFanMinDutyCycle; + UINT8 CPUFanMinDutyCycleLockHide; + UINT8 CPUFanMaxDutyCycle; + UINT8 CPUFanMaxDutyCycleLockHide; + UINT8 CPUFanOnDutyCycle; + UINT8 CPUFanOnDutyCycleLockHide; + UINT16 CpuOverTemp; + UINT8 CpuOverTempLockHide; + UINT16 CpuControlTemp; + UINT8 CpuControlTempLockHide; + UINT16 CpuAllOnTemp; + UINT8 CpuAllOnTempLockHide; + UINT8 CpuResponsiveness; + UINT8 CpuResponsivenessLockHide; + UINT8 CpuDamping; + UINT8 CpuDampingLockHide; + UINT16 PchOverTemp; + UINT8 PchOverTempLockHide; + UINT16 PchControlTemp; + UINT8 PchControlTempLockHide; + UINT16 PchAllOnTemp; + UINT8 PchAllOnTempLockHide; + UINT8 PchResponsiveness; + UINT8 PchResponsivenessLockHide; + UINT8 PchDamping; + UINT8 PchDampingLockHide; + UINT16 MemoryOverTemp; + UINT8 MemoryOverTempLockHide; + UINT16 MemoryControlTemp; + UINT8 MemoryControlTempLockHide; + UINT16 MemoryAllOnTemp; + UINT8 MemoryAllOnTempLockHide; + UINT8 MemoryResponsiveness; + UINT8 MemoryResponsivenessLockHide; + UINT8 MemoryDamping; + UINT8 MemoryDampingLockHide; + UINT16 VROverTemp; + UINT8 VROverTempLockHide; + UINT16 VRControlTemp; + UINT8 VRControlTempLockHide; + UINT16 VRAllOnTemp; + UINT8 VRAllOnTempLockHide; + UINT8 VRResponsiveness; + UINT8 VRResponsivenessLockHide; + UINT8 VRDamping; + UINT8 VRDampingLockHide; + + UINT8 LvdsBrightnessSteps; + UINT8 LvdsBrightnessStepsLockHide; + UINT8 EdpDataRate; + UINT8 EdpDataRateLockHide; + UINT16 LvdsPowerOnToBacklightEnableDelayTime; + UINT8 LvdsPowerOnToBacklightEnableDelayTimeLockHide; + UINT16 LvdsPowerOnDelayTime; + UINT8 LvdsPowerOnDelayTimeLockHide; + UINT16 LvdsBacklightOffToPowerDownDelayTime; + UINT8 LvdsBacklightOffToPowerDownDelayTimeLockHide; + UINT16 LvdsPowerDownDelayTime; + UINT8 LvdsPowerDownDelayTimeLockHide; + UINT16 LvdsPowerCycleDelayTime; + UINT8 LvdsPowerCycleDelayTimeLockHide; + + UINT8 IgdFlatPanel; + UINT8 IgdFlatPanelLockHide; + UINT8 Lan2; + UINT8 Lan2LockHide; + + UINT8 SwapMode; + UINT8 SwapModeLockHide; + + UINT8 Sata0HotPlugCap; + UINT8 Sata0HotPlugCapLockHide; + UINT8 Sata1HotPlugCap; + UINT8 Sata1HotPlugCapLockHide; + + UINT8 UsbCharging; + UINT8 UsbChargingLockHide; + + UINT8 Cstates; + UINT8 EnableC4; + UINT8 EnableC6; + + UINT8 FastBoot; + UINT8 EfiNetworkSupport; + UINT8 PxeRom; + + //Add for PpmPlatformPlicy + UINT8 PPM00; + UINT8 PPM01; + UINT8 PPM02; + UINT8 PPM03; + UINT8 PPM04; + UINT8 PPM05; + UINT8 PPM06; + UINT8 PPM07; + UINT8 PPM08; + UINT8 PPM09; + UINT8 PPM10; + UINT8 QuietBoot; + UINT8 LegacyUSBBooting; + + UINT8 PwmReserved02; + // + // Thermal Policy Values + // + UINT8 EnableDigitalThermalSensor; + UINT8 PassiveThermalTripPoint; + UINT8 PassiveTc1Value; + UINT8 PassiveTc2Value; + UINT8 PassiveTspValue; + UINT8 DisableActiveTripPoints; + UINT8 CriticalThermalTripPoint; + UINT8 IchPciExp[4]; + UINT8 DeepStandby; + UINT8 AlsEnable; + UINT8 IgdLcdIBia; + UINT8 LogBootTime; + + + UINT8 PcieRootPortIOApic[4]; + UINT8 IffsEnable; + UINT8 IffsOnS3RtcWake; + UINT8 IffsS3WakeTimerMin; + UINT8 IffsOnS3CritBattWake; + UINT8 IffsCritBattWakeThreshold; + UINT8 ScramblerSupport; + UINT8 SecureBoot; + UINT8 SecureBootCustomMode; + UINT8 SecureBootUserPhysicalPresent; + UINT8 CoreFreMultipSelect; + UINT8 MaxCState; + UINT8 PanelScaling; + UINT8 IgdLcdIGmchBlc; + UINT8 GfxBoost; + UINT8 IgdThermal; + UINT8 SEC00; + UINT8 fTPM; + UINT8 SEC02; + UINT8 SEC03; + UINT8 MeasuredBootEnable; + UINT8 UseProductKey; + //Image Signal Processor PCI Device Configuration + // + UINT8 ISPDevSel; + UINT8 ISPEn; + // Passwords + UINT16 UserPassword[PASSWORD_MAX_SIZE]; + UINT16 AdminPassword[PASSWORD_MAX_SIZE]; + UINT8 Tdt; + UINT8 Recovery; + UINT8 Suspend; + UINT8 TdtState; + UINT8 TdtEnrolled; + UINT8 PBAEnable; + + UINT8 HpetBootTime; + UINT8 UsbDebug; + UINT8 Lpe; + // + // LPSS Configuration + // + UINT8 LpssPciModeEnabled; + //Scc + UINT8 LpsseMMCEnabled; + UINT8 LpssSdioEnabled; + UINT8 LpssSdcardEnabled; + UINT8 LpssSdCardSDR25Enabled; + UINT8 LpssSdCardDDR50Enabled; + UINT8 LpssMipiHsi; + UINT8 LpsseMMC45Enabled; + UINT8 LpsseMMC45DDR50Enabled; + UINT8 LpsseMMC45HS200Enabled; + UINT8 LpsseMMC45RetuneTimerValue; + UINT8 eMMCBootMode; + + //LPSS2 + UINT8 LpssDma1Enabled; + UINT8 LpssI2C0Enabled; + UINT8 LpssI2C1Enabled; + UINT8 LpssI2C2Enabled; + UINT8 LpssI2C3Enabled; + UINT8 LpssI2C4Enabled; + UINT8 LpssI2C5Enabled; + UINT8 LpssI2C6Enabled; + //LPSS1 + UINT8 LpssDma0Enabled; + UINT8 LpssPwm0Enabled; + UINT8 LpssPwm1Enabled; + UINT8 LpssHsuart0Enabled; + UINT8 LpssHsuart1Enabled; + UINT8 LpssSpiEnabled; + UINT8 I2CTouchAd; + + UINT8 GTTSize; + // + // DVMT5.0 Graphic memory setting + // + UINT8 IgdDvmt50PreAlloc; + UINT8 IgdDvmt50TotalAlloc; + UINT8 IgdTurboEnabled; + + // + // Usb Config + // + UINT8 UsbAutoMode; // PCH controller Auto mode + UINT8 UsbXhciSupport; + UINT8 Hsic0; + UINT8 PchUsb30Mode; + UINT8 PchUsb30Streams; + UINT8 PchUsb20; + UINT8 PchUsbPerPortCtl; + UINT8 PchUsbPort[8]; + UINT8 PchUsbRmh; + UINT8 PchUsbOtg; + UINT8 PchUsbVbusOn; //OTG VBUS control + UINT8 PchFSAOn; //FSA control + UINT8 EhciPllCfgEnable; + + + //Gbe + UINT8 PcieRootPortSpeed[PCH_PCIE_MAX_ROOT_PORTS]; + UINT8 SlpLanLowDc; + + UINT8 ISCT00; + UINT8 ISCT01; + UINT8 ISCT02; + UINT8 ISCT03; + UINT8 ISCT04; + UINT8 ISCT05; + UINT8 ISCT06; + UINT8 ISCT07; + // + // Azalia Configuration + // + UINT8 PchAzalia; + UINT8 AzaliaVCiEnable; + UINT8 AzaliaDs; + UINT8 AzaliaPme; + UINT8 HdmiCodec; + + UINT8 UartInterface; + UINT8 PcuUart1; + //UINT8 PcuUart2;//for A0 + UINT8 StateAfterG3; + UINT8 EnableClockSpreadSpec; + UINT8 GraphicReserve00; + UINT8 GOPEnable; + UINT8 GOPBrightnessLevel; //Gop Brightness level + UINT8 PavpMode; + UINT8 SEC04; + UINT8 SEC05; + UINT8 SEC06; + UINT8 SEC07; + + UINT8 HdmiCodecPortB; + UINT8 HdmiCodecPortC; + UINT8 HdmiCodecPortD; + UINT8 LidStatus; + UINT8 Reserved00; + UINT8 Reserved01; + UINT16 Reserved02; + UINT16 Reserved03; + UINT16 Reserved04; + UINT16 Reserved05; + UINT16 Reserved06; + UINT16 Reserved07; + UINT16 Reserved08; + UINT16 Reserved09; + UINT16 Reserved0A; + UINT16 Reserved0B; + UINT16 Reserved0C; + UINT16 Reserved0D; + UINT8 Reserved0E; + UINT8 Reserved0F; + UINT32 Reserved10; + UINT32 Reserved11; + UINT32 Reserved12; + UINT32 Reserved13; + UINT32 Reserved14; + UINT8 Reserved15; + UINT8 Reserved16; + UINT8 Reserved17; + UINT8 Reserved18; + UINT8 Reserved19; + UINT8 Reserved1A; + UINT8 Reserved1B; + UINT8 Reserved1C; + UINT8 Reserved1D; + UINT8 Reserved1E; + UINT8 Reserved1F; + UINT8 Reserved20; + UINT8 PmicEnable; + UINT8 IdleReserve; + UINT8 TSEGSizeSel; + UINT8 ACPIMemDbg; + UINT8 ExISupport; + UINT8 BatteryChargingSolution; //0-non ULPMC 1-ULPMC + UINT8 PnpSettings; + UINT8 CfioPnpSettings; + UINT8 PchEhciDebug; + UINT8 CRIDSettings; + UINT8 ULPMCFWLock; + UINT8 SpiRwProtect; + UINT8 GraphicReserve02; + UINT8 PDMConfig; + UINT16 LmMemSize; + UINT8 PunitBIOSConfig; + UINT8 LpssSdioMode; + UINT8 ENDBG2; + UINT8 WittEnable; + UINT8 UtsEnable; + UINT8 TristateLpc; + UINT8 GraphicReserve05; + UINT8 UsbXhciLpmSupport; + UINT8 EnableAESNI; + UINT8 SecureErase; + + UINT8 MmioSize; + + + UINT8 SAR1; + + UINT8 DisableCodec262; + UINT8 ReservedO; + UINT8 PcieDynamicGating; // Need PMC enable it first from PMC 0x3_12 MCU 318. + + UINT8 MipiDsi; + + //Added flow control item for UART1 and UART2 + UINT8 LpssHsuart0FlowControlEnabled; + UINT8 LpssHsuart1FlowControlEnabled; + + UINT8 SdCardRemovable; // ACPI reporting MMC/SD media as: removable/non-removable + UINT8 GpioWakeCapability; + UINT8 RtcBattery; + +} SYSTEM_CONFIGURATION; +#pragma pack() + +#ifndef PLATFORM_SETUP_VARIABLE_NAME +#define PLATFORM_SETUP_VARIABLE_NAME L"Setup" +#endif + +#pragma pack(1) +typedef struct{ + // Passwords + UINT16 UserPassword[PASSWORD_MAX_SIZE]; + UINT16 AdminPassword[PASSWORD_MAX_SIZE]; + UINT16 DummyDataForVfrBug; // Don't change or use + +} SYSTEM_PASSWORDS; +#pragma pack() + +// +// #defines for Drive Presence +// +#define EFI_HDD_PRESENT 0x01 +#define EFI_HDD_NOT_PRESENT 0x00 +#define EFI_CD_PRESENT 0x02 +#define EFI_CD_NOT_PRESENT 0x00 + +#define EFI_HDD_WARNING_ON 0x01 +#define EFI_CD_WARNING_ON 0x02 +#define EFI_SMART_WARNING_ON 0x04 +#define EFI_HDD_WARNING_OFF 0x00 +#define EFI_CD_WARNING_OFF 0x00 +#define EFI_SMART_WARNING_OFF 0x00 + +#ifndef VFRCOMPILE +extern EFI_GUID gEfiSetupVariableGuid; +#endif + +#define SETUP_DATA SYSTEM_CONFIGURATION + +#endif // #ifndef _SETUP_VARIABLE + diff --git a/Vlv2TbltDevicePkg/Include/Protocol/GlobalNvsArea.h b/Vlv2TbltDevicePkg/Include/Protocol/GlobalNvsArea.h index 5e650b69a2..b7fb022118 100644 --- a/Vlv2TbltDevicePkg/Include/Protocol/GlobalNvsArea.h +++ b/Vlv2TbltDevicePkg/Include/Protocol/GlobalNvsArea.h @@ -1,485 +1,486 @@ -/*++ - - Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
- - - This program and the accompanying materials are licensed and made available under - - the terms and conditions of the BSD License that accompanies this distribution. - - The full text of the license may be found at - - http://opensource.org/licenses/bsd-license.php. - - - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - - - - -Module Name: - - GlobalNvsArea.h - -Abstract: - - Definition of the global NVS area protocol. This protocol - publishes the address and format of a global ACPI NVS buffer used as a communications - buffer between SMM code and ASL code. - The format is derived from the ACPI reference code, version 0.95. - - Note: Data structures defined in this protocol are not naturally aligned. - -**/ - - -#ifndef _GLOBAL_NVS_AREA_H_ -#define _GLOBAL_NVS_AREA_H_ - -// -// Includes -// -#define GLOBAL_NVS_DEVICE_ENABLE 1 -#define GLOBAL_NVS_DEVICE_DISABLE 0 - -// -// Forward reference for pure ANSI compatibility -// - -//EFI_FORWARD_DECLARATION (EFI_GLOBAL_NVS_AREA_PROTOCOL); - -// -// Global NVS Area Protocol GUID -// -#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \ -{ 0x74e1e48, 0x8132, 0x47a1, 0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc } - -// -// Revision id - Added TPM related fields -// -#define GLOBAL_NVS_AREA_RIVISION_1 1 - -// -// Extern the GUID for protocol users. -// -extern EFI_GUID gEfiGlobalNvsAreaProtocolGuid; - -// -// Global NVS Area definition -// -#pragma pack (1) -typedef struct { - // - // Miscellaneous Dynamic Values, the definitions below need to be matched - // GNVS definitions in Platform.ASL - // - UINT16 OperatingSystem; // 00 - UINT8 SmiFunction; // 02 SMI function call via IO Trap - UINT8 SmiParameter0; // 03 - UINT8 SmiParameter1; // 04 - UINT8 SciFunction; // 05 SCI function call via _L00 - UINT8 SciParameter0; // 06 - UINT8 SciParameter1; // 07 - UINT8 GlobalLock; // 08 Global lock function call - UINT8 LockParameter0; // 09 - UINT8 LockParameter1; // 10 - UINT32 Port80DebugValue; // 11 - UINT8 LidState; // 15 Open = 1 - UINT8 PowerState; // 16 AC = 1 - UINT8 DebugState; // 17 - - - // - // Thermal Policy Values - // - UINT8 EnableThermalOffset; // 18 ThermalOffset for KSC - UINT8 Reserved1; // 19 - UINT8 Reserved2; // 20 - UINT8 PassiveThermalTripPoint; // 21 - UINT8 PassiveTc1Value; // 22 - UINT8 PassiveTc2Value; // 23 - UINT8 PassiveTspValue; // 24 - UINT8 CriticalThermalTripPoint; // 25 - UINT8 EnableDigitalThermalSensor; // 26 - UINT8 BspDigitalThermalSensorTemperature; // 27 Temperature of BSP - UINT8 ApDigitalThermalSensorTemperature; // 28 Temperature of AP - UINT8 DigitalThermalSensorSmiFunction; // 29 SMI function call via DTS IO Trap - - // - // Battery Support Values - // - UINT8 NumberOfBatteries; // 30 - UINT8 BatteryCapacity0; // 31 Battery 0 Stored Capacity - UINT8 BatteryCapacity1; // 32 Battery 1 Stored Capacity - UINT8 BatteryCapacity2; // 33 Battery 2 Stored Capacity - UINT8 BatteryStatus0; // 34 Battery 0 Stored Status - UINT8 BatteryStatus1; // 35 Battery 1 Stored Status - UINT8 BatteryStatus2; // 36 Battery 2 Stored Status - - // NOTE: Do NOT Change the Offset of Revision Field - UINT8 Revision; // 37 Revision of the structure EFI_GLOBAL_NVS_AREA - UINT8 Reserved3[2]; // 38:39 - - // - // Processor Configuration Values - // - UINT8 ApicEnable; // 40 APIC Enabled by SBIOS (APIC Enabled = 1) - UINT8 LogicalProcessorCount; // 41 Processor Count Enabled (MP Enabled != 0) - UINT8 CurentPdcState0; // 42 PDC settings, Processor 0 - UINT8 CurentPdcState1; // 43 PDC settings, Processor 1 - UINT8 MaximumPpcState; // 44 Maximum PPC state - UINT32 PpmFlags; // 45:48 PPM configuration flags, same as CFGD - UINT8 Reserved4[1]; // 49 - - // - // SIO Configuration Values - // - UINT8 DockedSioPresent; // 50 Dock SIO Present - UINT8 DockComA; // 51 COM A Port - UINT8 DockComB; // 52 COM B Port - UINT8 LptP; // 53 LPT Port - UINT8 DockFdc; // 54 FDC Port - UINT8 OnboardCom; // 55 Onboard COM Port - UINT8 OnboardComCir; // 56 Onboard COM CIR Port - - UINT8 WPCN381U; // 57 - UINT8 NPCE791x; // 58 - UINT8 Reserved5[1]; // 59 - - // - // Internal Graphics Device Values - // - UINT8 IgdState; // 60 IGD State (Primary Display = 1) - UINT8 DisplayToggleList; // 61 Display Toggle List Selection - UINT8 CurrentDeviceList; // 62 Current Attached Device List - UINT8 PreviousDeviceList; // 63 Previous Attached Device List - UINT16 CurrentDisplayState; // 64 Current Display State - UINT16 NextDisplayState; // 66 Next Display State - UINT16 SetDisplayState; // 68 Set Display State - UINT8 NumberOfValidDeviceId; // 70 Number of Valid Device IDs - UINT32 DeviceId1; // 71 Device ID 1 - UINT32 DeviceId2; // 75 Device ID 2 - UINT32 DeviceId3; // 79 Device ID 3 - UINT32 DeviceId4; // 83 Device ID 4 - UINT32 DeviceId5; // 87 Device ID 5 - - UINT32 AKsv0; // 91:94 First four bytes of AKSV (manufacturing mode) - UINT8 AKsv1; // 95 Fifth byte of AKSV (manufacturing mode - - UINT8 Reserved6[7]; // 96:102 - - // - // Backlight Control Values - // - UINT8 BacklightControlSupport; // 103 Backlight Control Support - UINT8 BrightnessPercentage; // 104 Brightness Level Percentage - - // - // Ambient Light Sensor Values - // - UINT8 AlsEnable; // 105 Ambient Light Sensor Enable - UINT8 AlsAdjustmentFactor; // 106 Ambient Light Adjusment Factor - UINT8 LuxLowValue; // 107 LUX Low Value - UINT8 LuxHighValue; // 108 LUX High Value - - UINT8 Reserved7[1]; // 109 - - // - // Extended Mobile Access Values - // - UINT8 EmaEnable; // 110 EMA Enable - UINT16 EmaPointer; // 111 EMA Pointer - UINT16 EmaLength; // 113 EMA Length - - UINT8 Reserved8[1]; // 115 - - // - // Mobile East Fork Values - // - UINT8 MefEnable; // 116 Mobile East Fork Enable - - // - // PCIe Dock Status - // - UINT8 PcieDockStatus; // 117 PCIe Dock Status - - UINT8 Reserved9[2]; // 118:119 - - // - // TPM Registers - // - UINT8 TpmPresent; // 120 TPM Present - UINT8 TpmEnable; // 121 TPM Enable - - UINT8 MorData; // 122 Memory Overwrite Request Data - UINT8 TcgParamter; // 123 Used for save the Mor and/or physical presence paramter - UINT32 PPResponse; // 124 Physical Presence request operation response - UINT8 PPRequest; // 128 Physical Presence request operation - UINT8 LastPPRequest; // 129 Last Physical Presence request operation - - // - // SATA Values - // - UINT8 GtfTaskFileBufferPort0[7]; // 130 GTF Task File Buffer for Port 0 - UINT8 GtfTaskFileBufferPort2[7]; // 137 GTF Task File Buffer for Port 2 - UINT8 IdeMode; // 144 IDE Mode (Compatible\Enhanced) - UINT8 GtfTaskFileBufferPort1[7]; // 145:151 GTF Task File Buffer for Port 1 - - UINT8 Reserved111[10]; // 152:161 - UINT64 BootTimeLogAddress; // 162:169 Boot Time Log Table Address - - UINT32 IgdOpRegionAddress; // 170 IGD OpRegion Starting Address - UINT8 IgdBootType; // 174 IGD Boot Type CMOS option - UINT8 IgdPanelType; // 175 IGD Panel Type CMOs option - UINT8 IgdTvFormat; // 176 IGD TV Format CMOS option - UINT8 IgdTvMinor; // 177 IGD TV Minor Format CMOS option - UINT8 IgdPanelScaling; // 178 IGD Panel Scaling - UINT8 IgdBlcConfig; // 179 IGD BLC Configuration - UINT8 IgdBiaConfig; // 180 IGD BIA Configuration - UINT8 IgdSscConfig; // 181 IGD SSC Configuration - UINT8 Igd409; // 182 IGD 0409 Modified Settings Flag - UINT8 Igd509; // 183 IGD 0509 Modified Settings Flag - UINT8 Igd609; // 184 IGD 0609 Modified Settings Flag - UINT8 Igd709; // 185 IGD 0709 Modified Settings Flag - UINT8 IgdPowerConservation; // 186 IGD Power Conservation Feature Flag - UINT8 IgdDvmtMemSize; // 187 IGD DVMT Memory Size - UINT8 IgdFunc1Enable; // 188 IGD Function 1 Enable - UINT8 IgdHpllVco; // 189 HPLL VCO - UINT32 NextStateDid1; // 190 Next state DID1 for _DGS - UINT32 NextStateDid2; // 194 Next state DID2 for _DGS - UINT32 NextStateDid3; // 198 Next state DID3 for _DGS - UINT32 NextStateDid4; // 202 Next state DID4 for _DGS - UINT32 NextStateDid5; // 206 Next state DID5 for _DGS - UINT32 NextStateDid6; // 210 Next state DID6 for _DGS - UINT32 NextStateDid7; // 214 Next state DID7 for _DGS - UINT32 NextStateDid8; // 218 Next state DID8 for _DGS - UINT8 IgdSciSmiMode; // 222 GMCH SMI/SCI mode (0=SCI) - UINT8 IgdPAVP; // 223 IGD PAVP data - UINT8 IgdSelfRefresh; // 224 IGD Self Refresh - UINT8 PcieOSCControl; // 225 PCIE OSC Control - UINT8 NativePCIESupport; // 226 Native PCI Express Support - - // - // USB Sideband Deferring Support - // - UINT8 HostAlertVector; // 227 GPE vector used for HOST_ALERT - UINT8 HostAlertPio; // 228 PIO of USB device used for HOST_ALERT - - UINT8 Reserved112[27]; // 229 - UINT32 NvIgOpRegionAddress; // 256 NVIG support - UINT32 NvHmOpRegionAddress; // 260 NVHM support - UINT32 ApXmOpRegionAddress; // 264 AMDA support - UINT32 DeviceId6; // 268 Device ID 6 - UINT32 DeviceId7; // 272 Device ID 7 - UINT32 DeviceId8; // 276 Device ID 8 - UINT32 EndpointBaseAddress; // 280 PEG Endpoint PCIe Base Address - UINT32 CapStrPresence; // 284 PEG Endpoint Capability Structure Presence - UINT32 EndpointPcieCapBaseAddress; // 288 PEG Endpoint PCIe Capability Structure Base Address - UINT32 EndpointVcCapBaseAddress; // 292 PEG Endpoint Virtual Channel Capability Structure Base Address - UINT32 XPcieCfgBaseAddress; // 296 Any Device's PCIe Config Space Base Address - UINT32 OccupiedBuses1; // 300 Occupied Buses from 0 to 31 - UINT32 OccupiedBuses2; // 304 Occupied Buses from 32 to 63 - UINT32 OccupiedBuses3; // 308 Occupied Buses from 64 to 95 - UINT32 OccupiedBuses4; // 312 Occupied Buses from 96 to 127 - UINT32 OccupiedBuses5; // 316 Occupied Buses from 128 to 159 - UINT32 OccupiedBuses6; // 320 Occupied Buses from 160 to 191 - UINT32 OccupiedBuses7; // 324 Occupied Buses from 192 to 223 - UINT32 OccupiedBuses8; // 328 Occupied Buses from 224 to 255 - UINT8 UartSelection; // 332 UART Interface Selection 0: Internal; 1: SIO - UINT8 PcuUart1Enable; // 333 PCU UART 1 Enabled - UINT8 PcuUart2Enable; // 334 PCU UART 2 Enabled - - UINT32 LPEBar0; // 335~338 LPE Bar0 - UINT32 LPEBar1; // 339~342 LPE Bar1 - - UINT32 LPEBar2; // 343~346 LPE Bar2 - UINT8 AcSetup; // 347 For Ac Powered Config option - IST applet - UINT8 BatterySetup; // 348 For Battery Powered Config option - IST applet - UINT8 PlatformFlavor; // 349 0:unknown 1: Mobile; 2: desktop - UINT8 Reserved113[1]; // 350 - - UINT8 IsctReserve; // 351 ISCT / AOAC Configuration - UINT8 XhciMode; // 352 xHCI mode - UINT8 PmicEnable; // 353 PMIC enable - - UINT8 LpeEnable; // 354 LPE enable - UINT32 ISPAddr; // 355 ISP Base address - UINT8 ISPDevSel; // 359 ISP device enabled selection 0: Disabled; 1: PCI Device 2; 2: PCI Device 3 - - // - // Lpss controllers - // - UINT32 PCIBottomAddress; //360 ((4+8+6)*4+2)*4=296 - UINT32 PCITopAddress; //364 - - UINT32 LDMA1Addr; // 368 - UINT32 LDMA1Len; // 372 - UINT32 LDMA11Addr; // 376 - UINT32 LDMA11Len; // 380 - UINT32 PWM1Addr; // 384 PWM1 - UINT32 PWM1Len; // 388 - UINT32 PWM11Addr; // 392 - UINT32 PWM11Len; // 396 - UINT32 PWM2Addr; // 400 PWM2 - UINT32 PWM2Len; // 404 - UINT32 PWM21Addr; // 408 - UINT32 PWM21Len; // 412 - UINT32 UART1Addr; // 416 UART1 - UINT32 UART1Len; // 420 - UINT32 UART11Addr; // 424 UART1 - UINT32 UART11Len; // 428 - UINT32 UART2Addr; // 432 UART2 - UINT32 UART2Len; // 436 - UINT32 UART21Addr; // 440 UART2 - UINT32 UART21Len; // 444 - UINT32 SPIAddr; // 448 SPI - UINT32 SPILen; // 452 - UINT32 SPI1Addr; // 456 - UINT32 SPI1Len; // 460 - - UINT32 LDMA2Addr; // 464 - UINT32 LDMA2Len; // 468 - UINT32 LDMA21Addr; // 472 - UINT32 LDMA21Len; // 476 - UINT32 I2C1Addr; // 480 I2C1 - UINT32 I2C1Len; // 484 - UINT32 I2C11Addr; // 488 I2C1 - UINT32 I2C11Len; // 492 - UINT32 I2C2Addr; // 496 I2C2 - UINT32 I2C2Len; // 500 - UINT32 I2C21Addr; // 504 I2C2 - UINT32 I2C21Len; // 508 - UINT32 I2C3Addr; // 512 I2C3 - UINT32 I2C3Len; // 516 - UINT32 I2C31Addr; // 520 I2C3 - UINT32 I2C31Len; // 524 - UINT32 I2C4Addr; // 528 I2C4 - UINT32 I2C4Len; // 532 - UINT32 I2C41Addr; // 536 I2C4 - UINT32 I2C41Len; // 540 - UINT32 I2C5Addr; // 544 I2C5 - UINT32 I2C5Len; // 548 - UINT32 I2C51Addr; // 552 I2C5 - UINT32 I2C51Len; // 556 - UINT32 I2C6Addr; // 560 I2C6 - UINT32 I2C6Len; // 564 - UINT32 I2C61Addr; // 566 I2C6 - UINT32 I2C61Len; // 570 - UINT32 I2C7Addr; // 574 I2C7 - UINT32 I2C7Len; // 578 - UINT32 I2C71Addr; // 582 I2C7 - UINT32 I2C71Len; // 586 - - // - // Scc controllers - // - UINT32 eMMCAddr; // 590 EMMC - UINT32 eMMCLen; // 594 - UINT32 eMMC1Addr; // 598 - UINT32 eMMC1Len; // 602 - UINT32 SDIOAddr; // 606 SDIO - UINT32 SDIOLen; // 610 - UINT32 SDIO1Addr; // 614 - UINT32 SDIO1Len; // 618 - UINT32 SDCardAddr; // 622 SDCard - UINT32 SDCardLen; // 626 - UINT32 SDCard1Addr; // 630 - UINT32 SDCard1Len; // 636 - UINT32 MipiHsiAddr; // 640 MIPI-HSI - UINT32 MipiHsiLen; // 644 - UINT32 MipiHsi1Addr; // 648 - UINT32 MipiHsi1Len; // 652 - - UINT8 SdCardRemovable; // 656 reserve offset upto 658 - UINT8 HideLPSSDevices; // 657 Hide unsupported LPSS devices when in ACPI mode - UINT8 ReservedO; // 658 OS Selection - UINT8 Reserved00; // 659 - UINT8 Reserved01; // 660 - UINT8 Reserved02; // 661 - UINT8 Reserved03; // 662 - UINT8 Reserved04; // 663 - UINT8 Reserved05; // 664 - UINT8 Reserved06; // 665 - UINT8 Reserved07; // 666 - UINT8 Reserved08; // 667 - UINT8 Reserved09; // 668 - UINT8 Reserved0A; // 669 - UINT32 Reserved0B; // 670 - UINT32 Reserved0C; // 674 - UINT32 Reserved0D; // 678 - UINT32 Reserved0E; // 682 - UINT32 Reserved0F; // 686 - UINT32 Reserved10; // 690 - UINT32 Reserved11; // 694 - UINT32 Reserved12; // 698 - UINT32 Reserved13; // 702 - UINT32 Reserved14; // 706 - UINT32 Reserved15; // 710 - UINT32 Reserved16; // 714 - UINT8 Reserved17; - UINT32 Reserved18; - UINT32 Reserved19; - UINT32 Reserved1A; - UINT32 Reserved1B; - UINT32 Reserved1C; - UINT8 Reserved1D; - UINT32 Reserved1E; - UINT32 Reserved1F; - UINT32 Reserved20; - UINT32 Reserved21; - UINT32 Reserved22; - UINT8 Reserved23; - UINT8 BatteryChargingSolution; // 761 0-non ULPMC 1-ULPMC - - // - //101 bytes - // - UINT8 NFCnSelect; // 762 NFCx Select 1: NFC1 2:NFC2 - UINT8 LpssSccMode; // 763 EMMC device 0-ACPI mode, 1-PCI mode - - UINT32 TPMAddress; // 764 - UINT32 TPMLength; // 768 - - UINT8 I2CTouchAddress; // 772 I2C touch address, 0x4B:RVP 0x4A:FFRD - UINT8 IdleReserve; // 773 0 - disabled 1 - enabled - UINT8 SDIOMode; // 774 3 - Default 2 - DDR50 - UINT8 emmcVersion; // 775 0 - 4.41 1 - 4.5 - UINT32 BmBound; // 776 BM Bound - UINT8 FsaStatus; // 780 0 - Fsa is off, 1- Fsa is on - - // - // Board Id - // This field is for the ASL code to know whether this board is Baylake or Bayley Bay etc - // - UINT8 BoardID; // 781 - UINT8 FabID; // 782 - UINT8 OtgMode; // 783 0- OTG disable 1- OTG PCI mode - UINT8 Stepping; // 784 Stepping - UINT8 WittEnable; // 785 WITT eanble 0 - disable 1 - enable - - UINT8 SocStepping; // 786 Soc Stepping infomation - UINT8 AmbientTripPointChange; // 787 DPTF: Controls whether _ATI changes other participant's trip point(enabled/disabled) - UINT8 UtsEnable; // 788 Uart Test eanble 0 - disable 1 - enable - UINT8 DptfReserve; // 789 - - UINT8 SarEnable; // 790 - UINT8 PssDeveice; // 791 PSS Deveice: 0 - None, 1 - Monzax 2K, 2 - Monzax 8K - UINT8 EDPV; // 792 Check for eDP display device - UINT32 DIDX; // 793 Device ID for eDP device - UINT8 MicrosoftIoT; // (794)JP1 pins are for Microsoft IoT project. - UINT8 RtcBattery; // (795) The Flag of RTC Battery Present. -} EFI_GLOBAL_NVS_AREA; -#pragma pack () - -// -// Global NVS Area Protocol -// -typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL { - EFI_GLOBAL_NVS_AREA *Area; -} EFI_GLOBAL_NVS_AREA_PROTOCOL; - -#endif +/** @file + + Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
+ + + This program and the accompanying materials are licensed and made available under + + the terms and conditions of the BSD License that accompanies this distribution. + + The full text of the license may be found at + + http://opensource.org/licenses/bsd-license.php. + + + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + + + + + +Module Name: + + GlobalNvsArea.h + +Abstract: + + Definition of the global NVS area protocol. This protocol + publishes the address and format of a global ACPI NVS buffer used as a communications + buffer between SMM code and ASL code. + The format is derived from the ACPI reference code, version 0.95. + + Note: Data structures defined in this protocol are not naturally aligned. + +**/ + + +#ifndef _GLOBAL_NVS_AREA_H_ +#define _GLOBAL_NVS_AREA_H_ + +// +// Includes +// +#define GLOBAL_NVS_DEVICE_ENABLE 1 +#define GLOBAL_NVS_DEVICE_DISABLE 0 + +// +// Forward reference for pure ANSI compatibility +// + +//EFI_FORWARD_DECLARATION (EFI_GLOBAL_NVS_AREA_PROTOCOL); + +// +// Global NVS Area Protocol GUID +// +#define EFI_GLOBAL_NVS_AREA_PROTOCOL_GUID \ +{ 0x74e1e48, 0x8132, 0x47a1, 0x8c, 0x2c, 0x3f, 0x14, 0xad, 0x9a, 0x66, 0xdc } + +// +// Revision id - Added TPM related fields +// +#define GLOBAL_NVS_AREA_RIVISION_1 1 + +// +// Extern the GUID for protocol users. +// +extern EFI_GUID gEfiGlobalNvsAreaProtocolGuid; + +// +// Global NVS Area definition +// +#pragma pack (1) +typedef struct { + // + // Miscellaneous Dynamic Values, the definitions below need to be matched + // GNVS definitions in Platform.ASL + // + UINT16 OperatingSystem; // 00 + UINT8 SmiFunction; // 02 SMI function call via IO Trap + UINT8 SmiParameter0; // 03 + UINT8 SmiParameter1; // 04 + UINT8 SciFunction; // 05 SCI function call via _L00 + UINT8 SciParameter0; // 06 + UINT8 SciParameter1; // 07 + UINT8 GlobalLock; // 08 Global lock function call + UINT8 LockParameter0; // 09 + UINT8 LockParameter1; // 10 + UINT32 Port80DebugValue; // 11 + UINT8 LidState; // 15 Open = 1 + UINT8 PowerState; // 16 AC = 1 + UINT8 DebugState; // 17 + + + // + // Thermal Policy Values + // + UINT8 EnableThermalOffset; // 18 ThermalOffset for KSC + UINT8 Reserved1; // 19 + UINT8 Reserved2; // 20 + UINT8 PassiveThermalTripPoint; // 21 + UINT8 PassiveTc1Value; // 22 + UINT8 PassiveTc2Value; // 23 + UINT8 PassiveTspValue; // 24 + UINT8 CriticalThermalTripPoint; // 25 + UINT8 EnableDigitalThermalSensor; // 26 + UINT8 BspDigitalThermalSensorTemperature; // 27 Temperature of BSP + UINT8 ApDigitalThermalSensorTemperature; // 28 Temperature of AP + UINT8 DigitalThermalSensorSmiFunction; // 29 SMI function call via DTS IO Trap + + // + // Battery Support Values + // + UINT8 NumberOfBatteries; // 30 + UINT8 BatteryCapacity0; // 31 Battery 0 Stored Capacity + UINT8 BatteryCapacity1; // 32 Battery 1 Stored Capacity + UINT8 BatteryCapacity2; // 33 Battery 2 Stored Capacity + UINT8 BatteryStatus0; // 34 Battery 0 Stored Status + UINT8 BatteryStatus1; // 35 Battery 1 Stored Status + UINT8 BatteryStatus2; // 36 Battery 2 Stored Status + + // NOTE: Do NOT Change the Offset of Revision Field + UINT8 Revision; // 37 Revision of the structure EFI_GLOBAL_NVS_AREA + UINT8 Reserved3[2]; // 38:39 + + // + // Processor Configuration Values + // + UINT8 ApicEnable; // 40 APIC Enabled by SBIOS (APIC Enabled = 1) + UINT8 LogicalProcessorCount; // 41 Processor Count Enabled (MP Enabled != 0) + UINT8 CurentPdcState0; // 42 PDC settings, Processor 0 + UINT8 CurentPdcState1; // 43 PDC settings, Processor 1 + UINT8 MaximumPpcState; // 44 Maximum PPC state + UINT32 PpmFlags; // 45:48 PPM configuration flags, same as CFGD + UINT8 Reserved4[1]; // 49 + + // + // SIO Configuration Values + // + UINT8 DockedSioPresent; // 50 Dock SIO Present + UINT8 DockComA; // 51 COM A Port + UINT8 DockComB; // 52 COM B Port + UINT8 LptP; // 53 LPT Port + UINT8 DockFdc; // 54 FDC Port + UINT8 OnboardCom; // 55 Onboard COM Port + UINT8 OnboardComCir; // 56 Onboard COM CIR Port + + UINT8 WPCN381U; // 57 + UINT8 NPCE791x; // 58 + UINT8 Reserved5[1]; // 59 + + // + // Internal Graphics Device Values + // + UINT8 IgdState; // 60 IGD State (Primary Display = 1) + UINT8 DisplayToggleList; // 61 Display Toggle List Selection + UINT8 CurrentDeviceList; // 62 Current Attached Device List + UINT8 PreviousDeviceList; // 63 Previous Attached Device List + UINT16 CurrentDisplayState; // 64 Current Display State + UINT16 NextDisplayState; // 66 Next Display State + UINT16 SetDisplayState; // 68 Set Display State + UINT8 NumberOfValidDeviceId; // 70 Number of Valid Device IDs + UINT32 DeviceId1; // 71 Device ID 1 + UINT32 DeviceId2; // 75 Device ID 2 + UINT32 DeviceId3; // 79 Device ID 3 + UINT32 DeviceId4; // 83 Device ID 4 + UINT32 DeviceId5; // 87 Device ID 5 + + UINT32 AKsv0; // 91:94 First four bytes of AKSV (manufacturing mode) + UINT8 AKsv1; // 95 Fifth byte of AKSV (manufacturing mode + + UINT8 Reserved6[7]; // 96:102 + + // + // Backlight Control Values + // + UINT8 BacklightControlSupport; // 103 Backlight Control Support + UINT8 BrightnessPercentage; // 104 Brightness Level Percentage + + // + // Ambient Light Sensor Values + // + UINT8 AlsEnable; // 105 Ambient Light Sensor Enable + UINT8 AlsAdjustmentFactor; // 106 Ambient Light Adjusment Factor + UINT8 LuxLowValue; // 107 LUX Low Value + UINT8 LuxHighValue; // 108 LUX High Value + + UINT8 Reserved7[1]; // 109 + + // + // Extended Mobile Access Values + // + UINT8 EmaEnable; // 110 EMA Enable + UINT16 EmaPointer; // 111 EMA Pointer + UINT16 EmaLength; // 113 EMA Length + + UINT8 Reserved8[1]; // 115 + + // + // Mobile East Fork Values + // + UINT8 MefEnable; // 116 Mobile East Fork Enable + + // + // PCIe Dock Status + // + UINT8 PcieDockStatus; // 117 PCIe Dock Status + + UINT8 Reserved9[2]; // 118:119 + + // + // TPM Registers + // + UINT8 TpmPresent; // 120 TPM Present + UINT8 TpmEnable; // 121 TPM Enable + + UINT8 MorData; // 122 Memory Overwrite Request Data + UINT8 TcgParamter; // 123 Used for save the Mor and/or physical presence paramter + UINT32 PPResponse; // 124 Physical Presence request operation response + UINT8 PPRequest; // 128 Physical Presence request operation + UINT8 LastPPRequest; // 129 Last Physical Presence request operation + + // + // SATA Values + // + UINT8 GtfTaskFileBufferPort0[7]; // 130 GTF Task File Buffer for Port 0 + UINT8 GtfTaskFileBufferPort2[7]; // 137 GTF Task File Buffer for Port 2 + UINT8 IdeMode; // 144 IDE Mode (Compatible\Enhanced) + UINT8 GtfTaskFileBufferPort1[7]; // 145:151 GTF Task File Buffer for Port 1 + + UINT8 Reserved111[10]; // 152:161 + UINT64 BootTimeLogAddress; // 162:169 Boot Time Log Table Address + + UINT32 IgdOpRegionAddress; // 170 IGD OpRegion Starting Address + UINT8 IgdBootType; // 174 IGD Boot Type CMOS option + UINT8 IgdPanelType; // 175 IGD Panel Type CMOs option + UINT8 IgdTvFormat; // 176 IGD TV Format CMOS option + UINT8 IgdTvMinor; // 177 IGD TV Minor Format CMOS option + UINT8 IgdPanelScaling; // 178 IGD Panel Scaling + UINT8 IgdBlcConfig; // 179 IGD BLC Configuration + UINT8 IgdBiaConfig; // 180 IGD BIA Configuration + UINT8 IgdSscConfig; // 181 IGD SSC Configuration + UINT8 Igd409; // 182 IGD 0409 Modified Settings Flag + UINT8 Igd509; // 183 IGD 0509 Modified Settings Flag + UINT8 Igd609; // 184 IGD 0609 Modified Settings Flag + UINT8 Igd709; // 185 IGD 0709 Modified Settings Flag + UINT8 IgdPowerConservation; // 186 IGD Power Conservation Feature Flag + UINT8 IgdDvmtMemSize; // 187 IGD DVMT Memory Size + UINT8 IgdFunc1Enable; // 188 IGD Function 1 Enable + UINT8 IgdHpllVco; // 189 HPLL VCO + UINT32 NextStateDid1; // 190 Next state DID1 for _DGS + UINT32 NextStateDid2; // 194 Next state DID2 for _DGS + UINT32 NextStateDid3; // 198 Next state DID3 for _DGS + UINT32 NextStateDid4; // 202 Next state DID4 for _DGS + UINT32 NextStateDid5; // 206 Next state DID5 for _DGS + UINT32 NextStateDid6; // 210 Next state DID6 for _DGS + UINT32 NextStateDid7; // 214 Next state DID7 for _DGS + UINT32 NextStateDid8; // 218 Next state DID8 for _DGS + UINT8 IgdSciSmiMode; // 222 GMCH SMI/SCI mode (0=SCI) + UINT8 IgdPAVP; // 223 IGD PAVP data + UINT8 IgdSelfRefresh; // 224 IGD Self Refresh + UINT8 PcieOSCControl; // 225 PCIE OSC Control + UINT8 NativePCIESupport; // 226 Native PCI Express Support + + // + // USB Sideband Deferring Support + // + UINT8 HostAlertVector; // 227 GPE vector used for HOST_ALERT + UINT8 HostAlertPio; // 228 PIO of USB device used for HOST_ALERT + + UINT8 Reserved112[27]; // 229 + UINT32 NvIgOpRegionAddress; // 256 NVIG support + UINT32 NvHmOpRegionAddress; // 260 NVHM support + UINT32 ApXmOpRegionAddress; // 264 AMDA support + UINT32 DeviceId6; // 268 Device ID 6 + UINT32 DeviceId7; // 272 Device ID 7 + UINT32 DeviceId8; // 276 Device ID 8 + UINT32 EndpointBaseAddress; // 280 PEG Endpoint PCIe Base Address + UINT32 CapStrPresence; // 284 PEG Endpoint Capability Structure Presence + UINT32 EndpointPcieCapBaseAddress; // 288 PEG Endpoint PCIe Capability Structure Base Address + UINT32 EndpointVcCapBaseAddress; // 292 PEG Endpoint Virtual Channel Capability Structure Base Address + UINT32 XPcieCfgBaseAddress; // 296 Any Device's PCIe Config Space Base Address + UINT32 OccupiedBuses1; // 300 Occupied Buses from 0 to 31 + UINT32 OccupiedBuses2; // 304 Occupied Buses from 32 to 63 + UINT32 OccupiedBuses3; // 308 Occupied Buses from 64 to 95 + UINT32 OccupiedBuses4; // 312 Occupied Buses from 96 to 127 + UINT32 OccupiedBuses5; // 316 Occupied Buses from 128 to 159 + UINT32 OccupiedBuses6; // 320 Occupied Buses from 160 to 191 + UINT32 OccupiedBuses7; // 324 Occupied Buses from 192 to 223 + UINT32 OccupiedBuses8; // 328 Occupied Buses from 224 to 255 + UINT8 UartSelection; // 332 UART Interface Selection 0: Internal; 1: SIO + UINT8 PcuUart1Enable; // 333 PCU UART 1 Enabled + UINT8 PcuUart2Enable; // 334 PCU UART 2 Enabled + + UINT32 LPEBar0; // 335~338 LPE Bar0 + UINT32 LPEBar1; // 339~342 LPE Bar1 + + UINT32 LPEBar2; // 343~346 LPE Bar2 + UINT8 AcSetup; // 347 For Ac Powered Config option - IST applet + UINT8 BatterySetup; // 348 For Battery Powered Config option - IST applet + UINT8 PlatformFlavor; // 349 0:unknown 1: Mobile; 2: desktop + UINT8 Reserved113[1]; // 350 + + UINT8 IsctReserve; // 351 ISCT / AOAC Configuration + UINT8 XhciMode; // 352 xHCI mode + UINT8 PmicEnable; // 353 PMIC enable + + UINT8 LpeEnable; // 354 LPE enable + UINT32 ISPAddr; // 355 ISP Base address + UINT8 ISPDevSel; // 359 ISP device enabled selection 0: Disabled; 1: PCI Device 2; 2: PCI Device 3 + + // + // Lpss controllers + // + UINT32 PCIBottomAddress; //360 ((4+8+6)*4+2)*4=296 + UINT32 PCITopAddress; //364 + + UINT32 LDMA1Addr; // 368 + UINT32 LDMA1Len; // 372 + UINT32 LDMA11Addr; // 376 + UINT32 LDMA11Len; // 380 + UINT32 PWM1Addr; // 384 PWM1 + UINT32 PWM1Len; // 388 + UINT32 PWM11Addr; // 392 + UINT32 PWM11Len; // 396 + UINT32 PWM2Addr; // 400 PWM2 + UINT32 PWM2Len; // 404 + UINT32 PWM21Addr; // 408 + UINT32 PWM21Len; // 412 + UINT32 UART1Addr; // 416 UART1 + UINT32 UART1Len; // 420 + UINT32 UART11Addr; // 424 UART1 + UINT32 UART11Len; // 428 + UINT32 UART2Addr; // 432 UART2 + UINT32 UART2Len; // 436 + UINT32 UART21Addr; // 440 UART2 + UINT32 UART21Len; // 444 + UINT32 SPIAddr; // 448 SPI + UINT32 SPILen; // 452 + UINT32 SPI1Addr; // 456 + UINT32 SPI1Len; // 460 + + UINT32 LDMA2Addr; // 464 + UINT32 LDMA2Len; // 468 + UINT32 LDMA21Addr; // 472 + UINT32 LDMA21Len; // 476 + UINT32 I2C1Addr; // 480 I2C1 + UINT32 I2C1Len; // 484 + UINT32 I2C11Addr; // 488 I2C1 + UINT32 I2C11Len; // 492 + UINT32 I2C2Addr; // 496 I2C2 + UINT32 I2C2Len; // 500 + UINT32 I2C21Addr; // 504 I2C2 + UINT32 I2C21Len; // 508 + UINT32 I2C3Addr; // 512 I2C3 + UINT32 I2C3Len; // 516 + UINT32 I2C31Addr; // 520 I2C3 + UINT32 I2C31Len; // 524 + UINT32 I2C4Addr; // 528 I2C4 + UINT32 I2C4Len; // 532 + UINT32 I2C41Addr; // 536 I2C4 + UINT32 I2C41Len; // 540 + UINT32 I2C5Addr; // 544 I2C5 + UINT32 I2C5Len; // 548 + UINT32 I2C51Addr; // 552 I2C5 + UINT32 I2C51Len; // 556 + UINT32 I2C6Addr; // 560 I2C6 + UINT32 I2C6Len; // 564 + UINT32 I2C61Addr; // 566 I2C6 + UINT32 I2C61Len; // 570 + UINT32 I2C7Addr; // 574 I2C7 + UINT32 I2C7Len; // 578 + UINT32 I2C71Addr; // 582 I2C7 + UINT32 I2C71Len; // 586 + + // + // Scc controllers + // + UINT32 eMMCAddr; // 590 EMMC + UINT32 eMMCLen; // 594 + UINT32 eMMC1Addr; // 598 + UINT32 eMMC1Len; // 602 + UINT32 SDIOAddr; // 606 SDIO + UINT32 SDIOLen; // 610 + UINT32 SDIO1Addr; // 614 + UINT32 SDIO1Len; // 618 + UINT32 SDCardAddr; // 622 SDCard + UINT32 SDCardLen; // 626 + UINT32 SDCard1Addr; // 630 + UINT32 SDCard1Len; // 636 + UINT32 MipiHsiAddr; // 640 MIPI-HSI + UINT32 MipiHsiLen; // 644 + UINT32 MipiHsi1Addr; // 648 + UINT32 MipiHsi1Len; // 652 + + UINT8 SdCardRemovable; // 656 reserve offset upto 658 + UINT8 HideLPSSDevices; // 657 Hide unsupported LPSS devices when in ACPI mode + UINT8 ReservedO; // 658 OS Selection + UINT8 Reserved00; // 659 + UINT8 Reserved01; // 660 + UINT8 Reserved02; // 661 + UINT8 Reserved03; // 662 + UINT8 Reserved04; // 663 + UINT8 Reserved05; // 664 + UINT8 Reserved06; // 665 + UINT8 Reserved07; // 666 + UINT8 Reserved08; // 667 + UINT8 Reserved09; // 668 + UINT8 Reserved0A; // 669 + UINT32 Reserved0B; // 670 + UINT32 Reserved0C; // 674 + UINT32 Reserved0D; // 678 + UINT32 Reserved0E; // 682 + UINT32 Reserved0F; // 686 + UINT32 Reserved10; // 690 + UINT32 Reserved11; // 694 + UINT32 Reserved12; // 698 + UINT32 Reserved13; // 702 + UINT32 Reserved14; // 706 + UINT32 Reserved15; // 710 + UINT32 Reserved16; // 714 + UINT8 Reserved17; + UINT32 Reserved18; + UINT32 Reserved19; + UINT32 Reserved1A; + UINT32 Reserved1B; + UINT32 Reserved1C; + UINT8 Reserved1D; + UINT32 Reserved1E; + UINT32 Reserved1F; + UINT32 Reserved20; + UINT32 Reserved21; + UINT32 Reserved22; + UINT8 Reserved23; + UINT8 BatteryChargingSolution; // 761 0-non ULPMC 1-ULPMC + + // + //101 bytes + // + UINT8 NFCnSelect; // 762 NFCx Select 1: NFC1 2:NFC2 + UINT8 LpssSccMode; // 763 EMMC device 0-ACPI mode, 1-PCI mode + + UINT32 TPMAddress; // 764 + UINT32 TPMLength; // 768 + + UINT8 I2CTouchAddress; // 772 I2C touch address, 0x4B:RVP 0x4A:FFRD + UINT8 IdleReserve; // 773 0 - disabled 1 - enabled + UINT8 SDIOMode; // 774 3 - Default 2 - DDR50 + UINT8 emmcVersion; // 775 0 - 4.41 1 - 4.5 + UINT32 BmBound; // 776 BM Bound + UINT8 FsaStatus; // 780 0 - Fsa is off, 1- Fsa is on + + // + // Board Id + // This field is for the ASL code to know whether this board is Baylake or Bayley Bay etc + // + UINT8 BoardID; // 781 + UINT8 FabID; // 782 + UINT8 OtgMode; // 783 0- OTG disable 1- OTG PCI mode + UINT8 Stepping; // 784 Stepping + UINT8 WittEnable; // 785 WITT eanble 0 - disable 1 - enable + + UINT8 SocStepping; // 786 Soc Stepping infomation + UINT8 AmbientTripPointChange; // 787 DPTF: Controls whether _ATI changes other participant's trip point(enabled/disabled) + UINT8 UtsEnable; // 788 Uart Test eanble 0 - disable 1 - enable + UINT8 DptfReserve; // 789 + + UINT8 SarEnable; // 790 + UINT8 PssDeveice; // 791 PSS Deveice: 0 - None, 1 - Monzax 2K, 2 - Monzax 8K + UINT8 EDPV; // 792 Check for eDP display device + UINT32 DIDX; // 793 Device ID for eDP device + UINT8 MicrosoftIoT; // (794)JP1 pins are for Microsoft IoT project. + UINT8 RtcBattery; // (795) The Flag of RTC Battery Present. +} EFI_GLOBAL_NVS_AREA; +#pragma pack () + +// +// Global NVS Area Protocol +// +typedef struct _EFI_GLOBAL_NVS_AREA_PROTOCOL { + EFI_GLOBAL_NVS_AREA *Area; +} EFI_GLOBAL_NVS_AREA_PROTOCOL; + +#endif + diff --git a/Vlv2TbltDevicePkg/PlatformSetupDxe/SouthClusterConfig.vfi b/Vlv2TbltDevicePkg/PlatformSetupDxe/SouthClusterConfig.vfi index 58e2676c44..a6a99be2b2 100644 --- a/Vlv2TbltDevicePkg/PlatformSetupDxe/SouthClusterConfig.vfi +++ b/Vlv2TbltDevicePkg/PlatformSetupDxe/SouthClusterConfig.vfi @@ -1,15 +1,24 @@ -// +// /** @file // // Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
-// -// This program and the accompanying materials are licensed and made available under -// the terms and conditions of the BSD License that accompanies this distribution. -// The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php. -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// +// + +// This program and the accompanying materials are licensed and made available under + +// the terms and conditions of the BSD License that accompanies this distribution. + +// The full text of the license may be found at + +// http://opensource.org/licenses/bsd-license.php. + +// + +// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + +// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +// + // // // @@ -26,7 +35,7 @@ // Rev Date Name Description // ------------------------------------------------------------------------------ -// --*/ +// **/ // // South Cluster Configuration Form @@ -203,41 +212,41 @@ form formid = USB_OPTIONS_FORM_ID, //XHCI support // grayoutif ideqval Setup.UsbAutoMode == 0x1; - grayoutif ideqval Setup.PchUsb20 == 0x1; - oneof varid = Setup.UsbXhciSupport, - questionid = 0x123B, - prompt = STRING_TOKEN(STR_USB_XHCI_SUPPORT_PROMPT), - help = STRING_TOKEN(STR_USB_XHCI_SUPPORT_HELP), - flags = INTERACTIVE, - option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; - option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED; - endoneof; + grayoutif ideqval Setup.PchUsb20 == 0x1; + oneof varid = Setup.UsbXhciSupport, + questionid = 0x123B, + prompt = STRING_TOKEN(STR_USB_XHCI_SUPPORT_PROMPT), + help = STRING_TOKEN(STR_USB_XHCI_SUPPORT_HELP), + flags = INTERACTIVE, + option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED; + endoneof; suppressif ideqval Setup.UsbXhciSupport == 0x0; - oneof varid = Setup.Hsic0, - prompt = STRING_TOKEN(STR_USB_HSIC_0_PROMPT), - help = STRING_TOKEN(STR_USB_HSIC_0_HELP), - option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = RESET_REQUIRED; - option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; - endoneof; - endif; - - oneof varid = Setup.PchUsb30Mode, - prompt = STRING_TOKEN(STR_PCH_USB30_MODE_PROMPT), - help = STRING_TOKEN(STR_PCH_USB30_MODE_HELP), - option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = DEFAULT | MANUFACTURING |RESET_REQUIRED; - option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED; - endoneof; - - oneof varid = Setup.UsbXhciLpmSupport, - prompt = STRING_TOKEN(STR_USB_XHCI_LPM_SUPPORT_PROMPT), - help = STRING_TOKEN(STR_USB_XHCI_LPM_SUPPORT_HELP), - - option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; - option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED; - - endoneof; - endif; + oneof varid = Setup.Hsic0, + prompt = STRING_TOKEN(STR_USB_HSIC_0_PROMPT), + help = STRING_TOKEN(STR_USB_HSIC_0_HELP), + option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = RESET_REQUIRED; + option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + endoneof; + endif; + + oneof varid = Setup.PchUsb30Mode, + prompt = STRING_TOKEN(STR_PCH_USB30_MODE_PROMPT), + help = STRING_TOKEN(STR_PCH_USB30_MODE_HELP), + option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = DEFAULT | MANUFACTURING |RESET_REQUIRED; + option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED; + endoneof; + + oneof varid = Setup.UsbXhciLpmSupport, + prompt = STRING_TOKEN(STR_USB_XHCI_LPM_SUPPORT_PROMPT), + help = STRING_TOKEN(STR_USB_XHCI_LPM_SUPPORT_HELP), + + option text = STRING_TOKEN(STR_ENABLE), value = 1, flags = DEFAULT | MANUFACTURING | RESET_REQUIRED; + option text = STRING_TOKEN(STR_DISABLE), value = 0, flags = RESET_REQUIRED; + + endoneof; + endif; endif; subtitle text = STRING_TOKEN(STR_NULL_STRING); @@ -924,3 +933,4 @@ form formid = MISC_OPTIONS_FORM_ID, endoneof; endform; + diff --git a/Vlv2TbltDevicePkg/PlatformSetupDxe/UqiList.uni b/Vlv2TbltDevicePkg/PlatformSetupDxe/UqiList.uni index 5a888ff9cf..fb521e331a 100644 --- a/Vlv2TbltDevicePkg/PlatformSetupDxe/UqiList.uni +++ b/Vlv2TbltDevicePkg/PlatformSetupDxe/UqiList.uni @@ -1,26 +1,26 @@ -// *++ +// /** @file // // Copyright (c) 2013 - 2015 Intel Corporation. All rights reserved // This program and the accompanying materials // are licensed and made available under the terms and conditions of the BSD License // which accompanies this distribution. The full text of the license may be found at // http://opensource.org/licenses/bsd-license.php -// +// // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // -// +// // Module Name: // // UqiList.uni -// +// // Abstract: // // UQI (Universal Question Identifier) allocation for setup options. // // This file should define UQIs in the following range only: [0x0000...0x7FFF] // -// --*/ +// **/ /=# @@ -363,7 +363,7 @@ #string STR_MEASURED_BOOT_ENABLE_HELP #language uqi "\x012F" #string STR_PTT_PROMPT #language uqi "\x0130" #string STR_CHECK_SHA256_HASH_MASTER_BOOT_CODES #language uqi "\x0131" -#string STR_USB_XHCI_LPM_SUPPORT_PROMPT #language uqi "\x0132" +#string STR_USB_XHCI_LPM_SUPPORT_PROMPT #language uqi "\x0132" #string STR_VIRTUAL_KB_PROMPT #language uqi "\x0135" #string STR_VIRTUAL_KB_HELP #language uqi "\x0136" @@ -388,7 +388,7 @@ #string STR_CODEC262_DISABLED_PROMPT #language uqi "\x0149" #string STR_CODEC262_DISABLED_HELP #language uqi "\x014A" -//SD CARD SDR25 and DDR50 +//SD CARD SDR25 and DDR50 #string STR_SCC_SD_SDR25_PROMPT #language uqi "\x014B" #string STR_SCC_SD_SDR25_HELP #language uqi "\x014C" #string STR_SCC_SD_DDR50_PROMPT #language uqi "\x014D" @@ -412,7 +412,7 @@ #string STR_LPSS_HSUART1_HELP_ENBDT_DEV_LIST #language uqi "\x015D" #string STR_LPSS_HSUART2_HELP_ENBDT_DEV_LIST #language uqi "\x015E" -#string STR_SECURE_ERASE_PROMPT #language uqi "\x015F" +#string STR_SECURE_ERASE_PROMPT #language uqi "\x015F" #string STR_SEC_FIRMWARE_WRITE_PROMPT #language uqi "\x0160" #string STR_BOOT_DISPLAY_MIPIDSI_PROMPT #language uqi "\x0161" @@ -424,10 +424,10 @@ #string STR_DROIDBOOT_PROMPT #language uqi "\x0167" #string STR_ANDROIDBOOT_PROMPT #language uqi "\x0168" -#string STR_CRITICAL_BATTERY_LIMIT_PROMPT #language uqi "\x0169" -#string STR_CRITICAL_BATTERY_LIMIT_HELP #language uqi "\x016A" -#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_PROMPT #language uqi "\x016B" -#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_HELP #language uqi "\x016C" +#string STR_CRITICAL_BATTERY_LIMIT_PROMPT #language uqi "\x0169" +#string STR_CRITICAL_BATTERY_LIMIT_HELP #language uqi "\x016A" +#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_PROMPT #language uqi "\x016B" +#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_HELP #language uqi "\x016C" #string STR_WINDOWS7 #language uqi "\x016D" #string STR_LPSSDEVHIDE_PROMPT #language uqi "\x016E" #string STR_EM1_IAAPPSRUN_PROMPT #language uqi "\x016F" @@ -439,9 +439,9 @@ #string STR_USB_HSIC_0_HELP #language uqi "\x0174" #string STR_LEGACYUSBBOOTING_PROMPT #language uqi "\x0175" #string STR_STR_LEGACYUSBBOOTING_HELP #language uqi "\x0176" -#string STR_LWINDOWS7 #language uqi "\x0177" -#string STR_WEC7 #language uqi "\x0178" -#string STR_LINUX #language uqi "\x0179" +#string STR_LWINDOWS7 #language uqi "\x0177" +#string STR_WEC7 #language uqi "\x0178" +#string STR_LINUX #language uqi "\x0179" #string STR_WARNING_POPUP #language uqi "\x017A" #string STR_LPSS_HSUART1_FLOWCONTROL_PROMPT #language uqi "\x017B" #string STR_LPSS_HSUART2_FLOWCONTROL_PROMPT #language uqi "\x017C" @@ -453,3 +453,4 @@ #string STR_RTC_BATTERY_NOT_PRESENT #language uqi "\x0182" #string STR_RTC_BATTERY_PRESENT #language uqi "\x0183" #string STR_RTC_BATTERY_HELP #language uqi "\x0184" + diff --git a/Vlv2TbltDevicePkg/PlatformSetupDxe/VfrStrings.uni b/Vlv2TbltDevicePkg/PlatformSetupDxe/VfrStrings.uni index 1d981dfa61..da01ecbcec 100644 --- a/Vlv2TbltDevicePkg/PlatformSetupDxe/VfrStrings.uni +++ b/Vlv2TbltDevicePkg/PlatformSetupDxe/VfrStrings.uni @@ -1,10 +1,10 @@ -// +// /** @file // Copyright (c) 2004 - 2015, Intel Corporation. All rights reserved.
// This program and the accompanying materials // are licensed and made available under the terms and conditions of the BSD License // which accompanies this distribution. The full text of the license may be found at // http://opensource.org/licenses/bsd-license.php -// +// // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. // @@ -19,7 +19,7 @@ // // Revision History: // -// --*/ +// **/ // // NOTE: for SETUP engine spacing, the following character spaces denote how much room in each section you have. @@ -227,9 +227,9 @@ #string STR_PROCESSOR_VERSION_STRING #language en-US "Type" #string STR_PROCESSOR_VERSION_VALUE #language en-US "N/A" -#string STR_PROCESSOR_SKU_HELP #language en-US "Displays the Processor SKU Type." -#string STR_PROCESSOR_SKU_STRING #language en-US "SKU Type" -#string STR_PROCESSOR_SKU_VALUE #language en-US "N/A" +#string STR_PROCESSOR_SKU_HELP #language en-US "Displays the Processor SKU Type." +#string STR_PROCESSOR_SKU_STRING #language en-US "SKU Type" +#string STR_PROCESSOR_SKU_VALUE #language en-US "N/A" #string STR_PROCESSOR_SPEED_STRING #language en-US "Speed" #string STR_PROCESSOR_SPEED_VALUE #language en-US "N/A" @@ -910,8 +910,8 @@ #string STR_RF_KILL_PHYSICAL #language en-US "Physical Switch" #string STR_WLAN_PRESENCE_FORM_TITLE #language en-US "WLAN Card Presence" -#string STR_WLAN_NGFF_CARD #language en-US "NGFF Card Inserted" -#string STR_WLAN_NGFF_HELP #language en-US "Set 'YES' If NGFF Card is Inserted" +#string STR_WLAN_NGFF_CARD #language en-US "NGFF Card Inserted" +#string STR_WLAN_NGFF_HELP #language en-US "Set 'YES' If NGFF Card is Inserted" #string STR_WLAN_UHPAM_CARD #language en-US "UHPAM Card Inserted" #string STR_WLAN_UHPAM_HELP #language en-US "Set 'YES' If UHPAM Card is Inserted" @@ -1256,8 +1256,8 @@ #string STR_CRITICAL_BATTERY_LIMIT_PROMPT #language en-US "Critical Battery Limit" #string STR_CRITICAL_BATTERY_LIMIT_HELP #language en-US "Limit in percentage below which the system is not allowed to boot. -#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_PROMPT #language en-US "Critical Battery Limit Feature" -#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_HELP #language en-US "Enable or Disable Critical Battery Limit Feature." +#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_PROMPT #language en-US "Critical Battery Limit Feature" +#string STR_CRITICAL_BATTERY_LIMIT_FEATURE_HELP #language en-US "Enable or Disable Critical Battery Limit Feature." #string STR_ULPMC_FW_LOCK_PROMPT #language en-US "ULPMC Firmware Lock" #string STR_ULPMC_FW_LOCK_HELP #language en-US "Enable or Disable Lock ULPMC Firmware Update." @@ -1349,7 +1349,7 @@ // SD card DDR50 and SD25 #string STR_SCC_SD_SDR25_PROMPT #language en-US "SDR25 Capability Support for SDCard" -#string STR_SCC_SD_SDR25_HELP #language en-US "Disable/Enable SDR25 Capability in SD Card controller; +#string STR_SCC_SD_SDR25_HELP #language en-US "Disable/Enable SDR25 Capability in SD Card controller; #string STR_SCC_SD_DDR50_PROMPT #language en-US "DDR50 Capability Support for SDCard" #string STR_SCC_SD_DDR50_HELP #language en-US "Disable/Enable DDR50 Capability in SD Card controller; @@ -1417,3 +1417,4 @@ #string STR_EM1_CAP_OR_VOLTAGE_HELP #language en-US "Use Voltage or Capacity to decide boot flow" #string STR_EM1_BOOT_ON_INVALID_BAT_PROMPT #language en-US "Boot on invalid battery" #string STR_EM1_BOOT_ON_INVALID_BAT_HELP #language en-US "Allow to boot from invalid battery" + -- cgit v1.2.3