From d525ec10235c382581cd937fbb64d5d74c5dcbf7 Mon Sep 17 00:00:00 2001 From: Tian Feng Date: Tue, 9 Jun 2015 03:21:32 +0000 Subject: MdeModulePkg/EhciDxe: Update async polling interval to 1ms. Updating the async polling interval from 50ms to 1ms for better performance. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Tian Feng Reviewed-by: Star Zeng git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17586 6f19259b-4bc3-4df7-8a09-765794883524 --- MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h index 4327f2368a..7177658092 100644 --- a/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h +++ b/MdeModulePkg/Bus/Pci/EhciDxe/Ehci.h @@ -2,7 +2,7 @@ Provides some data struct used by EHCI controller driver. -Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.
+Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -66,10 +66,10 @@ typedef struct _USB2_HC_DEV USB2_HC_DEV; // // Sync and Async transfer polling interval, set by experience, -// and the unit of Async is 100us, means 50ms as interval. +// and the unit of Async is 100us, means 1ms as interval. // #define EHC_SYNC_POLL_INTERVAL (1 * EHC_1_MILLISECOND) -#define EHC_ASYNC_POLL_INTERVAL (50 * 10000U) +#define EHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1) // // EHCI debug port control status register bit definition -- cgit v1.2.3