From d569c5939cf9d150fc9f7825d4d8f9c9ff7787aa Mon Sep 17 00:00:00 2001
From: zwei4 <david.wei@intel.com>
Date: Fri, 23 Feb 2018 14:58:11 +0800
Subject: Add control method power button.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: zwei4 <david.wei@intel.com>
---
 .../Common/Acpi/AcpiTablesPCAT/Platform.asl           | 19 ++++++++++++++++++-
 1 file changed, 18 insertions(+), 1 deletion(-)

diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl
index 4674f70f2c..49ddd10ffd 100644
--- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl
+++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiTablesPCAT/Platform.asl
@@ -1,5 +1,5 @@
 /** @file
-  Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2012 - 2018, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -178,6 +178,8 @@ Method(_WAK,1,Serialized)
 {
   P8XH(1,0xAB) // Beginning of _WAK.
 
+  Notify(\_SB.PWRB,0x02)
+
   If (NEXP) {
     // Reinitialize the Native PCI Express after resume
     If (And(OSCC,0x02)) {
@@ -718,6 +720,21 @@ Scope(\_SB)
     }
   }//end scope
 
+  //
+  // Define a Control Method Power Button.
+  //
+  Device(PWRB)
+  {
+    Name(_HID,EISAID("PNP0C0C"))
+
+    // GPE16 = Waketime SCI.  
+    Name(_PRW, Package() {16,4})
+  }
+
+  Device(SLPB)
+  {
+    Name(_HID, EISAID("PNP0C0E"))
+  }
 } // end Scope(\_SB)
 
 Scope (\)
-- 
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