From 6f050ad6bf16f3f2ae2f0b62e93404230de575cc Mon Sep 17 00:00:00 2001
From: Olivier Martin <olivier.martin@arm.com>
Date: Thu, 27 Jun 2013 18:16:06 +0000
Subject: ArmPkg: Made ArmConfigureMmu() returns a status code

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>



git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14445 6f19259b-4bc3-4df7-8a09-765794883524
---
 ArmPkg/Drivers/CpuPei/CpuPei.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

(limited to 'ArmPkg/Drivers/CpuPei')

diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.c b/ArmPkg/Drivers/CpuPei/CpuPei.c
index f358cb845a..e984f5f1bf 100755
--- a/ArmPkg/Drivers/CpuPei/CpuPei.c
+++ b/ArmPkg/Drivers/CpuPei/CpuPei.c
@@ -2,7 +2,7 @@
 
 Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
 Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
-Copyright (c) 2011, ARM Limited. All rights reserved.<BR>
+Copyright (c) 2011-2013, ARM Limited. All rights reserved.<BR>
 
 This program and the accompanying materials                          
 are licensed and made available under the terms and conditions of the BSD License         
@@ -137,7 +137,10 @@ ConfigureMmu (
     SystemMemoryBase, SystemMemoryLength/1024/1024,
     (CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
 
-  ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+  Status = ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
+  if (EFI_ERROR (Status)) {
+    DEBUG ((EFI_D_ERROR, "Error: Failed to enable MMU (error code: %r)\n", Status));
+  }
   
   BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
 }
-- 
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