From 012737243077fa9a843917878a5a9bdd343f611c Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Mon, 14 Oct 2013 16:32:38 +0000 Subject: ArmPkg/CpuDxe: Fixed confusion in AArch64 Table descriptor types Table Descriptor and Level-3 Block entry descriptors have the same translation table type value (ie: 0x3). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14771 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'ArmPkg/Drivers') diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c index f6bb3fb2c1..95bf10bcb2 100644 --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c +++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c @@ -265,7 +265,7 @@ GetMemoryRegionRec ( BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress); EntryType = *BlockEntry & TT_TYPE_MASK; - if (EntryType == TT_TYPE_TABLE_ENTRY) { + if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) { NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE); // The entry is a page table, so we go to the next level -- cgit v1.2.3