From 5e7731443c6c9214bb012e70f267c3af0aa33258 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Mon, 26 Mar 2012 11:03:36 +0000 Subject: ArmPlatformPkg/Sec: Allowed the Secondary Cores to set the Secure/Non Secure bits to their PPIs The GICD_IGROUPR0 is banked for each connected processor. It means the Non-Secure bits for the PPIs (Private Peripheral Interrupts) must be configured for every processor. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13135 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Include/Library/ArmGicLib.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'ArmPkg/Include') diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h index 66e12dad59..44cc89c353 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -1,6 +1,6 @@ /** @file * -* Copyright (c) 2011, ARM Limited. All rights reserved. +* Copyright (c) 2011-2012, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -77,6 +77,7 @@ VOID EFIAPI ArmGicSetupNonSecure ( + IN UINTN MpId, IN INTN GicDistributorBase, IN INTN GicInterruptInterfaceBase ); -- cgit v1.2.3