From 63adfb112944b5b46653711e7588c5c1163017a3 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Fri, 3 Jun 2011 09:18:48 +0000 Subject: Armkg: Fix EDK2 coding style git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@11734 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S') diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S index 7dbbaf7d0f..5b12d1dee2 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S @@ -295,21 +295,21 @@ ASM_PFX(ArmWriteCPACR): bx lr ASM_PFX(ArmEnableVFP): - // Enable VFP registers + # Enable VFP registers mrc p15, 0, r0, c1, c0, 2 - orr r0, r0, #0x00f00000 // Enable VPF access (V* instructions) + orr r0, r0, #0x00f00000 @ Enable VPF access (V* instructions) mcr p15, 0, r0, c1, c0, 2 - mov r0, #0x40000000 // Set EN bit in FPEXC - mcr p10,#0x7,r0,c8,c0,#0 // msr FPEXC,r0 in ARM assembly + mov r0, #0x40000000 @ Set EN bit in FPEXC + mcr p10,#0x7,r0,c8,c0,#0 @ msr FPEXC,r0 in ARM assembly bx lr ASM_PFX(ArmCallWFI): wfi bx lr -//Note: Return 0 in Uniprocessor implementation +#Note: Return 0 in Uniprocessor implementation ASM_PFX(ArmReadCbar): - mrc p15, 4, r0, c15, c0, 0 //Read Configuration Base Address Register + mrc p15, 4, r0, c15, c0, 0 @ Read Configuration Base Address Register bx lr ASM_PFX(ArmInvalidateInstructionAndDataTlb): -- cgit v1.2.3