From 8dd618d2110bea0d3c3073b66eb51bc622e81c68 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Mon, 27 Oct 2014 15:38:55 +0000 Subject: ArmPkg/ArmLib: Removed duplicated invalidate TLB function ArmInvalidateInstructionAndDataTlb() was doing the same thing as ArmInvalidateTlb(). Both invalidate Data and Instruction TLBs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16253 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S | 6 ------ ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm | 6 ------ 2 files changed, 12 deletions(-) (limited to 'ArmPkg/Library/ArmLib/ArmV7') diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S index c31d49bcfb..af5ec23a1a 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.S @@ -47,7 +47,6 @@ GCC_ASM_EXPORT (ArmWriteVBar) GCC_ASM_EXPORT (ArmEnableVFP) GCC_ASM_EXPORT (ArmCallWFI) GCC_ASM_EXPORT (ArmReadCbar) -GCC_ASM_EXPORT (ArmInvalidateInstructionAndDataTlb) GCC_ASM_EXPORT (ArmReadMpidr) GCC_ASM_EXPORT (ArmReadTpidrurw) GCC_ASM_EXPORT (ArmWriteTpidrurw) @@ -368,11 +367,6 @@ ASM_PFX(ArmReadCbar): mrc p15, 4, r0, c15, c0, 0 @ Read Configuration Base Address Register bx lr -ASM_PFX(ArmInvalidateInstructionAndDataTlb): - mcr p15, 0, r0, c8, c7, 0 @ Invalidate Inst TLB and Data TLB - dsb - bx lr - ASM_PFX(ArmReadMpidr): mrc p15, 0, r0, c0, c0, 5 @ read MPIDR bx lr diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm index 368138933a..2b13811dc6 100644 --- a/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm +++ b/ArmPkg/Library/ArmLib/ArmV7/ArmV7Support.asm @@ -44,7 +44,6 @@ EXPORT ArmEnableVFP EXPORT ArmCallWFI EXPORT ArmReadCbar - EXPORT ArmInvalidateInstructionAndDataTlb EXPORT ArmReadMpidr EXPORT ArmReadTpidrurw EXPORT ArmWriteTpidrurw @@ -362,11 +361,6 @@ ArmReadCbar mrc p15, 4, r0, c15, c0, 0 //Read Configuration Base Address Register bx lr -ArmInvalidateInstructionAndDataTlb - mcr p15, 0, r0, c8, c7, 0 ; Invalidate Inst TLB and Data TLB - dsb - bx lr - ArmReadMpidr mrc p15, 0, r0, c0, c0, 5 ; read MPIDR bx lr -- cgit v1.2.3