From b7dbd9c27abd8691c321cd113178ab02dcb15c08 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Mon, 16 Sep 2013 09:33:55 +0000 Subject: ArmPkg/ArmLib: Fixed field shifting in CLIDR_EL1 (AArch64) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14677 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'ArmPkg/Library') diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S index ad9fdda525..27c1d465fd 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Support.S @@ -320,7 +320,7 @@ ASM_PFX(AArch64AllDataCachesOperation): mov x1, x0 // Save Function call in x1 mrs x6, clidr_el1 // Read EL1 CLIDR and x3, x6, #0x7000000 // Mask out all but Level of Coherency (LoC) - lsr x3, x3, #23 // Left align cache level value + lsr x3, x3, #24 // Left align cache level value cbz x3, L_Finished // No need to clean if LoC is 0 mov x10, #0 // Start clean at cache level 0 b Loop1 @@ -332,7 +332,7 @@ ASM_PFX(AArch64PerformPoUDataCacheOperation): mov x1, x0 // Save Function call in x1 mrs x6, clidr_el1 // Read EL1 CLIDR and x3, x6, #0x38000000 // Mask out all but Point of Unification (PoU) - lsr x3, x3, #26 // Left align cache level value + lsr x3, x3, #27 // Left align cache level value cbz x3, L_Finished // No need to clean if LoC is 0 mov x10, #0 // Start clean at cache level 0 -- cgit v1.2.3