From 671af2a59d05554ca2e49551562773ef914441da Mon Sep 17 00:00:00 2001 From: Guo Mang Date: Thu, 27 Apr 2017 11:26:09 +0800 Subject: ArmPkg: Remove unused Package Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- ArmPkg/ArmPkg.dec | 324 --- ArmPkg/ArmPkg.dsc | 155 -- ArmPkg/Contributions.txt | 218 -- ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c | 141 -- ArmPkg/Drivers/ArmGic/ArmGicDxe.c | 59 - ArmPkg/Drivers/ArmGic/ArmGicDxe.h | 67 - ArmPkg/Drivers/ArmGic/ArmGicDxe.inf | 60 - ArmPkg/Drivers/ArmGic/ArmGicLib.c | 330 --- ArmPkg/Drivers/ArmGic/ArmGicLib.inf | 51 - ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c | 41 - ArmPkg/Drivers/ArmGic/ArmGicSecLib.c | 64 - ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf | 52 - ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 317 --- ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c | 36 - ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c | 42 - ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c | 100 - ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S | 112 - ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 86 - ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm | 88 - ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c | 337 --- ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c | 559 ----- ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf | 53 - ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c | 347 --- ArmPkg/Drivers/CpuDxe/Arm/Mmu.c | 514 ----- ArmPkg/Drivers/CpuDxe/CpuDxe.c | 289 --- ArmPkg/Drivers/CpuDxe/CpuDxe.h | 160 -- ArmPkg/Drivers/CpuDxe/CpuDxe.inf | 79 - ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 217 -- ArmPkg/Drivers/CpuDxe/CpuMpCore.c | 103 - ArmPkg/Drivers/CpuDxe/Exception.c | 104 - ArmPkg/Drivers/CpuPei/CpuPei.c | 91 - ArmPkg/Drivers/CpuPei/CpuPei.inf | 58 - .../Drivers/GenericWatchdogDxe/GenericWatchdog.h | 29 - .../GenericWatchdogDxe/GenericWatchdogDxe.c | 354 --- .../GenericWatchdogDxe/GenericWatchdogDxe.inf | 53 - ArmPkg/Drivers/TimerDxe/TimerDxe.c | 435 ---- ArmPkg/Drivers/TimerDxe/TimerDxe.inf | 60 - ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c | 1209 ---------- ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h | 252 --- ArmPkg/Filesystem/SemihostFs/SemihostFs.inf | 48 - ArmPkg/Include/AsmMacroExport.inc | 29 - ArmPkg/Include/AsmMacroIoLib.h | 45 - ArmPkg/Include/AsmMacroIoLib.inc | 39 - ArmPkg/Include/AsmMacroIoLibV8.h | 63 - ArmPkg/Include/Chipset/AArch64.h | 238 -- ArmPkg/Include/Chipset/AArch64Mmu.h | 204 -- ArmPkg/Include/Chipset/ArmCortexA5x.h | 50 - ArmPkg/Include/Chipset/ArmCortexA9.h | 65 - ArmPkg/Include/Chipset/ArmV7.h | 129 -- ArmPkg/Include/Chipset/ArmV7Mmu.h | 244 -- ArmPkg/Include/Guid/ArmMpCoreInfo.h | 66 - ArmPkg/Include/IndustryStandard/ArmStdSmc.h | 96 - ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h | 161 -- ArmPkg/Include/Library/ArmDisassemblerLib.h | 43 - ArmPkg/Include/Library/ArmGenericTimerCounterLib.h | 85 - ArmPkg/Include/Library/ArmGicArchLib.h | 33 - ArmPkg/Include/Library/ArmGicLib.h | 317 --- ArmPkg/Include/Library/ArmHvcLib.h | 46 - ArmPkg/Include/Library/ArmLib.h | 722 ------ ArmPkg/Include/Library/ArmMmuLib.h | 72 - ArmPkg/Include/Library/ArmSmcLib.h | 46 - ArmPkg/Include/Library/BdsLib.h | 209 -- .../Include/Library/DefaultExceptionHandlerLib.h | 31 - ArmPkg/Include/Library/SemihostLib.h | 138 -- .../Include/Library/UncachedMemoryAllocationLib.h | 665 ------ ArmPkg/Include/Ppi/ArmMpCoreInfo.h | 58 - ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c | 292 --- ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf | 38 - .../ArmCacheMaintenanceLib.c | 131 -- .../ArmCacheMaintenanceLib.inf | 33 - .../ArmDisassemblerLib/Aarch64Disassembler.c | 48 - .../Library/ArmDisassemblerLib/ArmDisassembler.c | 455 ---- .../ArmDisassemblerLib/ArmDisassemblerLib.inf | 40 - .../Library/ArmDisassemblerLib/ThumbDisassembler.c | 1062 --------- ArmPkg/Library/ArmDmaLib/ArmDmaLib.c | 342 --- ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf | 50 - .../ArmExceptionLib/AArch64/AArch64Exception.c | 59 - .../ArmExceptionLib/AArch64/ExceptionSupport.S | 398 ---- ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c | 50 - .../Library/ArmExceptionLib/Arm/ExceptionSupport.S | 305 --- .../ArmExceptionLib/Arm/ExceptionSupport.asm | 302 --- ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c | 322 --- ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf | 64 - .../ArmExceptionLib/ArmRelocateExceptionLib.inf | 65 - .../ArmGenericTimerPhyCounterLib.c | 125 -- .../ArmGenericTimerPhyCounterLib.inf | 33 - .../ArmGenericTimerVirtCounterLib.c | 135 -- .../ArmGenericTimerVirtCounterLib.inf | 33 - .../Library/ArmGicArchLib/AArch64/ArmGicArchLib.c | 66 - ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c | 66 - ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf | 34 - .../ArmGicArchSecLib/AArch64/ArmGicArchLib.c | 51 - .../Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c | 51 - .../Library/ArmGicArchSecLib/ArmGicArchSecLib.inf | 33 - ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S | 39 - ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S | 51 - ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm | 52 - ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf | 32 - .../ArmLib/AArch64/AArch64ArchTimerSupport.S | 119 - ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c | 71 - ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 27 - ArmPkg/Library/ArmLib/AArch64/AArch64Support.S | 483 ---- ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S | 190 -- ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S | 112 - ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S | 166 -- ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm | 169 -- ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S | 95 - ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm | 99 - ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S | 98 - .../Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm | 99 - ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c | 70 - ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h | 40 - ArmPkg/Library/ArmLib/Arm/ArmV7Support.S | 305 --- ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm | 298 --- ArmPkg/Library/ArmLib/ArmBaseLib.inf | 57 - ArmPkg/Library/ArmLib/ArmLib.c | 107 - ArmPkg/Library/ArmLib/ArmLibPrivate.h | 80 - ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 764 ------- .../ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S | 78 - .../ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c | 61 - ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c | 839 ------- ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S | 35 - .../Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm | 32 - ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf | 47 - ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf | 40 - .../ArmPsciResetSystemLib/ArmPsciResetSystemLib.c | 96 - .../ArmPsciResetSystemLib.inf | 37 - ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S | 38 - ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S | 50 - ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm | 51 - ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf | 31 - ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c | 22 - ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf | 30 - .../Library/ArmSoftFloatLib/Arm/__aeabi_cdcmp.asm | 47 - .../Library/ArmSoftFloatLib/Arm/__aeabi_cfcmp.asm | 43 - .../Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c | 34 - .../Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c | 41 - .../Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c | 36 - .../Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c | 41 - ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h | 345 --- ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf | 54 - ArmPkg/Library/ArmSoftFloatLib/arm-gcc.h | 114 - .../ArmSoftFloatLib/bits32/softfloat-macros | 648 ------ ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c | 2354 -------------------- ArmPkg/Library/ArmSoftFloatLib/milieu.h | 38 - ArmPkg/Library/ArmSoftFloatLib/softfloat-for-gcc.h | 242 -- .../Library/ArmSoftFloatLib/softfloat-specialize | 525 ----- ArmPkg/Library/BdsLib/BdsAppLoader.c | 253 --- ArmPkg/Library/BdsLib/BdsFilePath.c | 1414 ------------ ArmPkg/Library/BdsLib/BdsHelper.c | 183 -- ArmPkg/Library/BdsLib/BdsInternal.h | 111 - ArmPkg/Library/BdsLib/BdsLib.inf | 69 - ArmPkg/Library/BdsLib/BdsLoadOption.c | 272 --- .../CompilerIntrinsicsLib/Arm/Llvm_int_lib.h | 99 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S | 33 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.c | 83 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S | 34 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.c | 84 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S | 55 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.c | 96 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S | 47 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.c | 98 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S | 153 -- ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm | 155 -- ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S | 47 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.c | 77 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S | 30 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.c | 78 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm | 40 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S | 56 - .../Library/CompilerIntrinsicsLib/Arm/ldivmod.asm | 57 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S | 37 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm | 42 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S | 36 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm | 43 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S | 33 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.c | 83 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S | 46 - .../Library/CompilerIntrinsicsLib/Arm/memmove.asm | 52 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S | 44 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.c | 77 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S | 25 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.c | 70 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S | 56 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.c | 98 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S | 44 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm | 49 - .../Library/CompilerIntrinsicsLib/Arm/sourcery.S | 55 - .../Library/CompilerIntrinsicsLib/Arm/switch.asm | 28 - .../Library/CompilerIntrinsicsLib/Arm/switch16.S | 30 - .../Library/CompilerIntrinsicsLib/Arm/switch32.S | 29 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S | 27 - .../Library/CompilerIntrinsicsLib/Arm/switchu8.S | 27 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S | 36 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.c | 82 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S | 25 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.c | 71 - .../Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S | 242 -- .../Library/CompilerIntrinsicsLib/Arm/udivmoddi4.c | 287 --- ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S | 57 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.c | 111 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S | 267 --- ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm | 267 --- .../Library/CompilerIntrinsicsLib/Arm/uldivmod.c | 43 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S | 27 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.c | 72 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S | 26 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.c | 68 - ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm | 64 - .../Library/CompilerIntrinsicsLib/Arm/uwrite.asm | 66 - .../CompilerIntrinsicsLib.inf | 103 - ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c | 44 - ArmPkg/Library/CompilerIntrinsicsLib/memset.c | 62 - .../AArch64/DebugAgentException.S | 96 - .../Arm/DebugAgentException.S | 277 --- .../Arm/DebugAgentException.asm | 273 --- .../DebugAgentSymbolsBaseLib.c | 351 --- .../DebugAgentSymbolsBaseLib.inf | 47 - .../DebugPeCoffExtraActionLib.c | 141 -- .../DebugPeCoffExtraActionLib.inf | 39 - .../AArch64/DefaultExceptionHandler.c | 273 --- .../Arm/DefaultExceptionHandler.c | 276 --- .../DefaultExceptionHandlerBase.c | 35 - .../DefaultExceptionHandlerLib.inf | 47 - .../DefaultExceptionHandlerLibBase.inf | 45 - .../DefaultExceptionHandlerUefi.c | 75 - ArmPkg/Library/GccLto/liblto-aarch64.a | Bin 1016 -> 0 bytes ArmPkg/Library/GccLto/liblto-aarch64.s | 27 - ArmPkg/Library/GccLto/liblto-arm.a | Bin 2096 -> 0 bytes ArmPkg/Library/GccLto/liblto-arm.s | 61 - .../PeiServicesTablePointer.c | 85 - .../PeiServicesTablePointerLib.inf | 45 - ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c | 577 ----- ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h | 59 - .../PlatformBootManagerLib.inf | 82 - .../RvdPeCoffExtraActionLib.c | 156 -- .../RvdPeCoffExtraActionLib.inf | 41 - ArmPkg/Library/SemiHostingDebugLib/DebugLib.c | 246 -- .../SemiHostingDebugLib/SemiHostingDebugLib.inf | 47 - .../SemiHostingSerialPortLib.inf | 34 - .../SemiHostingSerialPortLib/SerialPortLib.c | 144 -- ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S | 20 - ArmPkg/Library/SemihostLib/Arm/GccSemihost.S | 37 - ArmPkg/Library/SemihostLib/SemihostLib.c | 313 --- ArmPkg/Library/SemihostLib/SemihostLib.inf | 46 - ArmPkg/Library/SemihostLib/SemihostPrivate.h | 218 -- .../UncachedMemoryAllocationLib.c | 719 ------ .../UncachedMemoryAllocationLib.inf | 50 - ArmPkg/License.txt | 26 - 257 files changed, 37914 deletions(-) delete mode 100644 ArmPkg/ArmPkg.dec delete mode 100644 ArmPkg/ArmPkg.dsc delete mode 100644 ArmPkg/Contributions.txt delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicDxe.c delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicDxe.h delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicDxe.inf delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicLib.c delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicLib.inf delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicSecLib.c delete mode 100644 ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf delete mode 100644 ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c delete mode 100644 ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c delete mode 100644 ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c delete mode 100644 ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c delete mode 100644 ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S delete mode 100644 ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S delete mode 100644 ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm delete mode 100644 ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c delete mode 100644 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c delete mode 100644 ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf delete mode 100644 ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c delete mode 100644 ArmPkg/Drivers/CpuDxe/Arm/Mmu.c delete mode 100644 ArmPkg/Drivers/CpuDxe/CpuDxe.c delete mode 100644 ArmPkg/Drivers/CpuDxe/CpuDxe.h delete mode 100644 ArmPkg/Drivers/CpuDxe/CpuDxe.inf delete mode 100644 ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c delete mode 100644 ArmPkg/Drivers/CpuDxe/CpuMpCore.c delete mode 100644 ArmPkg/Drivers/CpuDxe/Exception.c delete mode 100644 ArmPkg/Drivers/CpuPei/CpuPei.c delete mode 100644 ArmPkg/Drivers/CpuPei/CpuPei.inf delete mode 100644 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h delete mode 100644 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c delete mode 100644 ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf delete mode 100644 ArmPkg/Drivers/TimerDxe/TimerDxe.c delete mode 100644 ArmPkg/Drivers/TimerDxe/TimerDxe.inf delete mode 100644 ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c delete mode 100644 ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h delete mode 100644 ArmPkg/Filesystem/SemihostFs/SemihostFs.inf delete mode 100644 ArmPkg/Include/AsmMacroExport.inc delete mode 100644 ArmPkg/Include/AsmMacroIoLib.h delete mode 100644 ArmPkg/Include/AsmMacroIoLib.inc delete mode 100644 ArmPkg/Include/AsmMacroIoLibV8.h delete mode 100644 ArmPkg/Include/Chipset/AArch64.h delete mode 100644 ArmPkg/Include/Chipset/AArch64Mmu.h delete mode 100644 ArmPkg/Include/Chipset/ArmCortexA5x.h delete mode 100644 ArmPkg/Include/Chipset/ArmCortexA9.h delete mode 100644 ArmPkg/Include/Chipset/ArmV7.h delete mode 100644 ArmPkg/Include/Chipset/ArmV7Mmu.h delete mode 100644 ArmPkg/Include/Guid/ArmMpCoreInfo.h delete mode 100644 ArmPkg/Include/IndustryStandard/ArmStdSmc.h delete mode 100644 ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h delete mode 100644 ArmPkg/Include/Library/ArmDisassemblerLib.h delete mode 100644 ArmPkg/Include/Library/ArmGenericTimerCounterLib.h delete mode 100644 ArmPkg/Include/Library/ArmGicArchLib.h delete mode 100644 ArmPkg/Include/Library/ArmGicLib.h delete mode 100644 ArmPkg/Include/Library/ArmHvcLib.h delete mode 100644 ArmPkg/Include/Library/ArmLib.h delete mode 100644 ArmPkg/Include/Library/ArmMmuLib.h delete mode 100644 ArmPkg/Include/Library/ArmSmcLib.h delete mode 100644 ArmPkg/Include/Library/BdsLib.h delete mode 100644 ArmPkg/Include/Library/DefaultExceptionHandlerLib.h delete mode 100644 ArmPkg/Include/Library/SemihostLib.h delete mode 100644 ArmPkg/Include/Library/UncachedMemoryAllocationLib.h delete mode 100644 ArmPkg/Include/Ppi/ArmMpCoreInfo.h delete mode 100644 ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c delete mode 100644 ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf delete mode 100644 ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c delete mode 100644 ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf delete mode 100644 ArmPkg/Library/ArmDisassemblerLib/ThumbDisassembler.c delete mode 100644 ArmPkg/Library/ArmDmaLib/ArmDmaLib.c delete mode 100644 ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf delete mode 100644 ArmPkg/Library/ArmExceptionLib/AArch64/AArch64Exception.c delete mode 100644 ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S delete mode 100644 ArmPkg/Library/ArmExceptionLib/Arm/ArmException.c delete mode 100644 ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.S delete mode 100644 ArmPkg/Library/ArmExceptionLib/Arm/ExceptionSupport.asm delete mode 100644 ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.c delete mode 100644 ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf delete mode 100644 ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf delete mode 100644 ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.c delete mode 100644 ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf delete mode 100644 ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.c delete mode 100644 ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf delete mode 100644 ArmPkg/Library/ArmGicArchLib/AArch64/ArmGicArchLib.c delete mode 100644 ArmPkg/Library/ArmGicArchLib/Arm/ArmGicArchLib.c delete mode 100644 ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf delete mode 100644 ArmPkg/Library/ArmGicArchSecLib/AArch64/ArmGicArchLib.c delete mode 100644 ArmPkg/Library/ArmGicArchSecLib/Arm/ArmGicArchLib.c delete mode 100644 ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf delete mode 100644 ArmPkg/Library/ArmHvcLib/AArch64/ArmHvc.S delete mode 100644 ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.S delete mode 100644 ArmPkg/Library/ArmHvcLib/Arm/ArmHvc.asm delete mode 100644 ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf delete mode 100644 ArmPkg/Library/ArmLib/AArch64/AArch64ArchTimerSupport.S delete mode 100644 ArmPkg/Library/ArmLib/AArch64/AArch64Lib.c delete mode 100644 ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h delete mode 100644 ArmPkg/Library/ArmLib/AArch64/AArch64Support.S delete mode 100644 ArmPkg/Library/ArmLib/AArch64/ArmLibSupport.S delete mode 100644 ArmPkg/Library/ArmLib/AArch64/ArmLibSupportV8.S delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmLibSupport.S delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmLibSupport.asm delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.asm delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.S delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmV7ArchTimerSupport.asm delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmV7Lib.c delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmV7Lib.h delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmV7Support.S delete mode 100644 ArmPkg/Library/ArmLib/Arm/ArmV7Support.asm delete mode 100644 ArmPkg/Library/ArmLib/ArmBaseLib.inf delete mode 100644 ArmPkg/Library/ArmLib/ArmLib.c delete mode 100644 ArmPkg/Library/ArmLib/ArmLibPrivate.h delete mode 100644 ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c delete mode 100644 ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibReplaceEntry.S delete mode 100644 ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuPeiLibConstructor.c delete mode 100644 ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibCore.c delete mode 100644 ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.S delete mode 100644 ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibV7Support.asm delete mode 100644 ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf delete mode 100644 ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf delete mode 100644 ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.c delete mode 100644 ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf delete mode 100644 ArmPkg/Library/ArmSmcLib/AArch64/ArmSmc.S delete mode 100644 ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.S delete mode 100644 ArmPkg/Library/ArmSmcLib/Arm/ArmSmc.asm delete mode 100644 ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf delete mode 100644 ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.c delete mode 100644 ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cdcmp.asm delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_cfcmp.asm delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpeq.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpge.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpgt.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmple.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmplt.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_dcmpun.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpeq.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpge.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpgt.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmple.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmplt.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/__aeabi_fcmpun.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/Arm/softfloat.h delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/arm-gcc.h delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat-macros delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/bits32/softfloat.c delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/milieu.h delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/softfloat-for-gcc.h delete mode 100644 ArmPkg/Library/ArmSoftFloatLib/softfloat-specialize delete mode 100644 ArmPkg/Library/BdsLib/BdsAppLoader.c delete mode 100644 ArmPkg/Library/BdsLib/BdsFilePath.c delete mode 100644 ArmPkg/Library/BdsLib/BdsHelper.c delete mode 100644 ArmPkg/Library/BdsLib/BdsInternal.h delete mode 100644 ArmPkg/Library/BdsLib/BdsLib.inf delete mode 100644 ArmPkg/Library/BdsLib/BdsLoadOption.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/Llvm_int_lib.h delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashldi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ashrdi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/clzsi2.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ctzsi2.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/divdi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/divsi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/lasr.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ldivmod.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsl.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/llsr.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/lshrdi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/memmove.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/moddi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/modsi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/muldi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/mullu.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/sourcery.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch16.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch32.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/switch8.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/switchu8.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/ucmpdi2.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivdi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivsi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldivmod.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/umoddi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.S delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/umodsi3.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/uread.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/Arm/uwrite.asm delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/memcpy.c delete mode 100644 ArmPkg/Library/CompilerIntrinsicsLib/memset.c delete mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/AArch64/DebugAgentException.S delete mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.S delete mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/Arm/DebugAgentException.asm delete mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.c delete mode 100644 ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf delete mode 100644 ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.c delete mode 100644 ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf delete mode 100644 ArmPkg/Library/DefaultExceptionHandlerLib/AArch64/DefaultExceptionHandler.c delete mode 100644 ArmPkg/Library/DefaultExceptionHandlerLib/Arm/DefaultExceptionHandler.c delete mode 100644 ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerBase.c delete mode 100644 ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf delete mode 100644 ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf delete mode 100644 ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerUefi.c delete mode 100644 ArmPkg/Library/GccLto/liblto-aarch64.a delete mode 100644 ArmPkg/Library/GccLto/liblto-aarch64.s delete mode 100644 ArmPkg/Library/GccLto/liblto-arm.a delete mode 100644 ArmPkg/Library/GccLto/liblto-arm.s delete mode 100644 ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointer.c delete mode 100644 ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf delete mode 100644 ArmPkg/Library/PlatformBootManagerLib/PlatformBm.c delete mode 100644 ArmPkg/Library/PlatformBootManagerLib/PlatformBm.h delete mode 100644 ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf delete mode 100644 ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.c delete mode 100644 ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf delete mode 100644 ArmPkg/Library/SemiHostingDebugLib/DebugLib.c delete mode 100644 ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf delete mode 100644 ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf delete mode 100644 ArmPkg/Library/SemiHostingSerialPortLib/SerialPortLib.c delete mode 100644 ArmPkg/Library/SemihostLib/AArch64/GccSemihost.S delete mode 100644 ArmPkg/Library/SemihostLib/Arm/GccSemihost.S delete mode 100644 ArmPkg/Library/SemihostLib/SemihostLib.c delete mode 100644 ArmPkg/Library/SemihostLib/SemihostLib.inf delete mode 100644 ArmPkg/Library/SemihostLib/SemihostPrivate.h delete mode 100644 ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.c delete mode 100644 ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf delete mode 100644 ArmPkg/License.txt (limited to 'ArmPkg') diff --git a/ArmPkg/ArmPkg.dec b/ArmPkg/ArmPkg.dec deleted file mode 100644 index c4b4da2f95..0000000000 --- a/ArmPkg/ArmPkg.dec +++ /dev/null @@ -1,324 +0,0 @@ -#/** @file -# ARM processor package. -# -# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2017, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - DEC_SPECIFICATION = 0x00010005 - PACKAGE_NAME = ArmPkg - PACKAGE_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F - PACKAGE_VERSION = 0.1 - -################################################################################ -# -# Include Section - list of Include Paths that are provided by this package. -# Comments are used for Keywords and Module Types. -# -# Supported Module Types: -# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION -# -################################################################################ -[Includes.common] - Include # Root include for the package - -[LibraryClasses.common] - ArmLib|Include/Library/ArmLib.h - ArmMmuLib|Include/Library/ArmMmuLib.h - SemihostLib|Include/Library/Semihosting.h - UncachedMemoryAllocationLib|Include/Library/UncachedMemoryAllocationLib.h - DefaultExceptionHandlerLib|Include/Library/DefaultExceptionHandlerLib.h - ArmDisassemblerLib|Include/Library/ArmDisassemblerLib.h - ArmGicArchLib|Include/Library/ArmGicArchLib.h - -[Guids.common] - gArmTokenSpaceGuid = { 0xBB11ECFE, 0x820F, 0x4968, { 0xBB, 0xA6, 0xF7, 0x6A, 0xFE, 0x30, 0x25, 0x96 } } - - ## ARM MPCore table - # Include/Guid/ArmMpCoreInfo.h - gArmMpCoreInfoGuid = { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} } - -[Ppis] - ## Include/Ppi/ArmMpCoreInfo.h - gArmMpCoreInfoPpiGuid = { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} } - -[PcdsFeatureFlag.common] - gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport|FALSE|BOOLEAN|0x00000001 - - # On ARM Architecture with the Security Extension, the address for the - # Vector Table can be mapped anywhere in the memory map. It means we can - # point the Exception Vector Table to its location in CpuDxe. - # By default we copy the Vector Table at PcdGet64(PcdCpuVectorBaseAddress) - gArmTokenSpaceGuid.PcdRelocateVectorTable|TRUE|BOOLEAN|0x00000022 - # Set this PCD to TRUE if the Exception Vector is changed to add debugger support before - # it has been configured by the CPU DXE - gArmTokenSpaceGuid.PcdDebuggerExceptionSupport|FALSE|BOOLEAN|0x00000032 - - # Define if the spin-table mechanism is used by the secondary cores when booting - # Linux (instead of PSCI) - gArmTokenSpaceGuid.PcdArmLinuxSpinTable|FALSE|BOOLEAN|0x00000033 - - # Define if the GICv3 controller should use the GICv2 legacy - gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy|FALSE|BOOLEAN|0x00000042 - -[PcdsFeatureFlag.ARM] - # Whether to map normal memory as non-shareable. FALSE is the safe choice, but - # TRUE may be appropriate to fix performance problems if you don't care about - # hardware coherency (i.e., no virtualization or cache coherent DMA) - gArmTokenSpaceGuid.PcdNormalMemoryNonshareableOverride|FALSE|BOOLEAN|0x00000043 - -[PcdsFixedAtBuild.common] - gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006 - - # This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file. - # Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor. - gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024 - - # This PCD will free the unallocated buffers if their size reach this threshold. - # We set the default value to 512MB. - gArmTokenSpaceGuid.PcdArmFreeUncachedMemorySizeThreshold|0x20000000|UINT64|0x00000003 - gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0xffff0000|UINT64|0x00000004 - gArmTokenSpaceGuid.PcdCpuResetAddress|0x00000000|UINT32|0x00000005 - - # - # ARM Secure Firmware PCDs - # - gArmTokenSpaceGuid.PcdSecureFdBaseAddress|0|UINT64|0x00000015 - gArmTokenSpaceGuid.PcdSecureFdSize|0|UINT32|0x00000016 - gArmTokenSpaceGuid.PcdSecureFvBaseAddress|0x0|UINT64|0x0000002F - gArmTokenSpaceGuid.PcdSecureFvSize|0x0|UINT32|0x00000030 - - # - # ARM Hypervisor Firmware PCDs - # - gArmTokenSpaceGuid.PcdHypFdBaseAddress|0|UINT32|0x0000003A - gArmTokenSpaceGuid.PcdHypFdSize|0|UINT32|0x0000003B - gArmTokenSpaceGuid.PcdHypFvBaseAddress|0|UINT32|0x0000003C - gArmTokenSpaceGuid.PcdHypFvSize|0|UINT32|0x0000003D - - # Use ClusterId + CoreId to identify the PrimaryCore - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask|0xF03|UINT32|0x00000031 - # The Primary Core is ClusterId[0] & CoreId[0] - gArmTokenSpaceGuid.PcdArmPrimaryCore|0|UINT32|0x00000037 - - # - # ARM L2x0 PCDs - # - gArmTokenSpaceGuid.PcdL2x0ControllerBase|0|UINT32|0x0000001B - - # - # BdsLib - # - # The compressed Linux kernel is expected to be under 128MB from the beginning of the System Memory - gArmTokenSpaceGuid.PcdArmLinuxKernelMaxOffset|0x08000000|UINT32|0x0000001F - # Maximum file size for TFTP servers that do not support 'tsize' extension - gArmTokenSpaceGuid.PcdMaxTftpFileSize|0x01000000|UINT32|0x00000000 - - # - # ARM Normal (or Non Secure) Firmware PCDs - # - gArmTokenSpaceGuid.PcdFdSize|0|UINT32|0x0000002C - gArmTokenSpaceGuid.PcdFvSize|0|UINT32|0x0000002E - - # - # Value to add to a host address to obtain a device address, using - # unsigned 64-bit integer arithmetic on both ARM and AArch64. This - # means we can rely on truncation on overflow to specify negative - # offsets. - # - gArmTokenSpaceGuid.PcdArmDmaDeviceOffset|0x0|UINT64|0x0000044 - -[PcdsFixedAtBuild.common, PcdsPatchableInModule.common] - gArmTokenSpaceGuid.PcdFdBaseAddress|0|UINT64|0x0000002B - gArmTokenSpaceGuid.PcdFvBaseAddress|0|UINT64|0x0000002D - -[PcdsFixedAtBuild.ARM] - # - # ARM Security Extension - # - - # Secure Configuration Register - # - BIT0 : NS - Non Secure bit - # - BIT1 : IRQ Handler - # - BIT2 : FIQ Handler - # - BIT3 : EA - External Abort - # - BIT4 : FW - F bit writable - # - BIT5 : AW - A bit writable - # - BIT6 : nET - Not Early Termination - # - BIT7 : SCD - Secure Monitor Call Disable - # - BIT8 : HCE - Hyp Call enable - # - BIT9 : SIF - Secure Instruction Fetch - # 0x31 = NS | EA | FW - gArmTokenSpaceGuid.PcdArmScr|0x31|UINT32|0x00000038 - - # By default we do not do a transition to non-secure mode - gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x0|UINT32|0x0000003E - - # The Linux ATAGs are expected to be under 0x4000 (16KB) from the beginning of the System Memory - gArmTokenSpaceGuid.PcdArmLinuxAtagMaxOffset|0x4000|UINT32|0x00000020 - - # If the fixed FDT address is not available, then it should be loaded below the kernel. - # The recommendation from the Linux kernel is to have the FDT below 16KB. - # (see the kernel doc: Documentation/arm/Booting) - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x4000|UINT32|0x00000023 - # The FDT blob must be loaded at a 64bit aligned address. - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x8|UINT32|0x00000026 - - # Non Secure Access Control Register - # - BIT15 : NSASEDIS - Disable Non-secure Advanced SIMD functionality - # - BIT14 : NSD32DIS - Disable Non-secure use of D16-D31 - # - BIT11 : cp11 - Non-secure access to coprocessor 11 enable - # - BIT10 : cp10 - Non-secure access to coprocessor 10 enable - # 0xC00 = cp10 | cp11 - gArmTokenSpaceGuid.PcdArmNsacr|0xC00|UINT32|0x00000039 - -[PcdsFixedAtBuild.AARCH64] - # - # AArch64 Security Extension - # - - # Secure Configuration Register - # - BIT0 : NS - Non Secure bit - # - BIT1 : IRQ Handler - # - BIT2 : FIQ Handler - # - BIT3 : EA - External Abort - # - BIT4 : FW - F bit writable - # - BIT5 : AW - A bit writable - # - BIT6 : nET - Not Early Termination - # - BIT7 : SCD - Secure Monitor Call Disable - # - BIT8 : HCE - Hyp Call enable - # - BIT9 : SIF - Secure Instruction Fetch - # - BIT10: RW - Register width control for lower exception levels - # - BIT11: SIF - Enables Secure EL1 access to EL1 Architectural Timer - # - BIT12: TWI - Trap WFI - # - BIT13: TWE - Trap WFE - # 0x501 = NS | HCE | RW - gArmTokenSpaceGuid.PcdArmScr|0x501|UINT32|0x00000038 - - # By default we do transition to EL2 non-secure mode with Stack for EL2. - # Mode Description Bits - # NS EL2 SP2 all interrupts disabled = 0x3c9 - # NS EL1 SP1 all interrupts disabled = 0x3c5 - # Other modes include using SP0 or switching to Aarch32, but these are - # not currently supported. - gArmTokenSpaceGuid.PcdArmNonSecModeTransition|0x3c9|UINT32|0x0000003E - # If the fixed FDT address is not available, then it should be loaded above the kernel. - # The recommendation from the AArch64 Linux kernel is to have the FDT below 512MB. - # (see the kernel doc: Documentation/arm64/booting.txt) - gArmTokenSpaceGuid.PcdArmLinuxFdtMaxOffset|0x20000000|UINT32|0x00000023 - # The FDT blob must be loaded at a 2MB aligned address. - gArmTokenSpaceGuid.PcdArmLinuxFdtAlignment|0x00200000|UINT32|0x00000026 - - -# -# These PCDs are also defined as 'PcdsDynamic' or 'PcdsPatchableInModule' to be -# redefined when using UEFI in a context of virtual machine. -# -[PcdsFixedAtBuild.common, PcdsDynamic.common, PcdsPatchableInModule.common] - - # System Memory (DRAM): These PCDs define the region of in-built system memory - # Some platforms can get DRAM extensions, these additional regions will be declared - # to UEFI by ArmPlatformLib - gArmTokenSpaceGuid.PcdSystemMemoryBase|0|UINT64|0x00000029 - gArmTokenSpaceGuid.PcdSystemMemorySize|0|UINT64|0x0000002A - -[PcdsFixedAtBuild.common, PcdsDynamic.common] - # - # ARM Architectural Timer - # - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz|0|UINT32|0x00000034 - - # ARM Architectural Timer Interrupt(GIC PPI) numbers - gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum|29|UINT32|0x00000035 - gArmTokenSpaceGuid.PcdArmArchTimerIntrNum|30|UINT32|0x00000036 - gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum|26|UINT32|0x00000040 - gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum|27|UINT32|0x00000041 - - # - # ARM Generic Watchdog - # - - gArmTokenSpaceGuid.PcdGenericWatchdogControlBase|0x2A440000|UINT64|0x00000007 - gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase|0x2A450000|UINT64|0x00000008 - gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum|93|UINT32|0x00000009 - - # - # ARM Generic Interrupt Controller - # - gArmTokenSpaceGuid.PcdGicDistributorBase|0|UINT64|0x0000000C - # Base address for the GIC Redistributor region that contains the boot CPU - gArmTokenSpaceGuid.PcdGicRedistributorsBase|0|UINT64|0x0000000E - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase|0|UINT64|0x0000000D - gArmTokenSpaceGuid.PcdGicSgiIntId|0|UINT32|0x00000025 - - # - # Bases, sizes and translation offsets of IO and MMIO spaces, respectively. - # Note that "IO" is just another MMIO range that simulates IO space; there - # are no special instructions to access it. - # - # The base addresses PcdPciIoBase, PcdPciMmio32Base and PcdPciMmio64Base are - # specific to their containing address spaces. In order to get the physical - # address for the CPU, for a given access, the respective translation value - # has to be added. - # - # The translations always have to be initialized like this, using UINT64: - # - # UINT64 IoCpuBase; // mapping target in 64-bit cpu-physical space - # UINT64 Mmio32CpuBase; // mapping target in 64-bit cpu-physical space - # UINT64 Mmio64CpuBase; // mapping target in 64-bit cpu-physical space - # - # PcdPciIoTranslation = IoCpuBase - PcdPciIoBase; - # PcdPciMmio32Translation = Mmio32CpuBase - (UINT64)PcdPciMmio32Base; - # PcdPciMmio64Translation = Mmio64CpuBase - PcdPciMmio64Base; - # - # because (a) the target address space (ie. the cpu-physical space) is - # 64-bit, and (b) the translation values are meant as offsets for *modular* - # arithmetic. - # - # Accordingly, the translation itself needs to be implemented as: - # - # UINT64 UntranslatedIoAddress; // input parameter - # UINT32 UntranslatedMmio32Address; // input parameter - # UINT64 UntranslatedMmio64Address; // input parameter - # - # UINT64 TranslatedIoAddress; // output parameter - # UINT64 TranslatedMmio32Address; // output parameter - # UINT64 TranslatedMmio64Address; // output parameter - # - # TranslatedIoAddress = UntranslatedIoAddress + - # PcdPciIoTranslation; - # TranslatedMmio32Address = (UINT64)UntranslatedMmio32Address + - # PcdPciMmio32Translation; - # TranslatedMmio64Address = UntranslatedMmio64Address + - # PcdPciMmio64Translation; - # - # The modular arithmetic performed in UINT64 ensures that the translation - # works correctly regardless of the relation between IoCpuBase and - # PcdPciIoBase, Mmio32CpuBase and PcdPciMmio32Base, and Mmio64CpuBase and - # PcdPciMmio64Base. - # - gArmTokenSpaceGuid.PcdPciIoBase|0x0|UINT64|0x00000050 - gArmTokenSpaceGuid.PcdPciIoSize|0x0|UINT64|0x00000051 - gArmTokenSpaceGuid.PcdPciIoTranslation|0x0|UINT64|0x00000052 - gArmTokenSpaceGuid.PcdPciMmio32Base|0x0|UINT32|0x00000053 - gArmTokenSpaceGuid.PcdPciMmio32Size|0x0|UINT32|0x00000054 - gArmTokenSpaceGuid.PcdPciMmio32Translation|0x0|UINT64|0x00000055 - gArmTokenSpaceGuid.PcdPciMmio64Base|0x0|UINT64|0x00000056 - gArmTokenSpaceGuid.PcdPciMmio64Size|0x0|UINT64|0x00000057 - gArmTokenSpaceGuid.PcdPciMmio64Translation|0x0|UINT64|0x00000058 - - # - # Inclusive range of allowed PCI buses. - # - gArmTokenSpaceGuid.PcdPciBusMin|0x0|UINT32|0x00000059 - gArmTokenSpaceGuid.PcdPciBusMax|0x0|UINT32|0x0000005A diff --git a/ArmPkg/ArmPkg.dsc b/ArmPkg/ArmPkg.dsc deleted file mode 100644 index 9144334cb8..0000000000 --- a/ArmPkg/ArmPkg.dsc +++ /dev/null @@ -1,155 +0,0 @@ -#/** @file -# ARM processor package. -# -# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.
-# Copyright (c) 2016, Linaro Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -################################################################################ -# -# Defines Section - statements that will be processed to create a Makefile. -# -################################################################################ -[Defines] - PLATFORM_NAME = ArmPkg - PLATFORM_GUID = 5CFBD99E-3C43-4E7F-8054-9CDEAFF7710F - PLATFORM_VERSION = 0.1 - DSC_SPECIFICATION = 0x00010005 - OUTPUT_DIRECTORY = Build/Arm - SUPPORTED_ARCHITECTURES = ARM|AARCH64 - BUILD_TARGETS = DEBUG|RELEASE - SKUID_IDENTIFIER = DEFAULT - -[BuildOptions] - XCODE:*_*_ARM_PLATFORM_FLAGS == -arch armv7 - GCC:*_*_ARM_PLATFORM_FLAGS == -march=armv7-a -mfpu=neon - # We use A15 to get the Secure and Virtualization extensions - RVCT:*_*_ARM_PLATFORM_FLAGS == --cpu Cortex-A15 - - RELEASE_*_*_CC_FLAGS = -DMDEPKG_NDEBUG - *_*_*_CC_FLAGS = -DDISABLE_NEW_DEPRECATED_INTERFACES - -[LibraryClasses.common] - BaseLib|MdePkg/Library/BaseLib/BaseLib.inf - BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf - CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf - HobLib|MdePkg/Library/DxeHobLib/DxeHobLib.inf - MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf - PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf - PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf - TimerLib|MdePkg/Library/BaseTimerLibNullTemplate/BaseTimerLibNullTemplate.inf - UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf - UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf - UefiLib|MdePkg/Library/UefiLib/UefiLib.inf - DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf - UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf - PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf - PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf - - NetLib|MdeModulePkg/Library/DxeNetLib/DxeNetLib.inf - UefiHiiServicesLib|MdeModulePkg/Library/UefiHiiServicesLib/UefiHiiServicesLib.inf - HiiLib|MdeModulePkg/Library/UefiHiiLib/UefiHiiLib.inf - - SemihostLib|ArmPkg/Library/SemihostLib/SemihostLib.inf - UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf - DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf - DefaultExceptionHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf - CpuExceptionHandlerLib|ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf - - CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf - ArmGicLib|ArmPkg/Drivers/ArmGic/ArmGicLib.inf - ArmGicArchLib|ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf - ArmGenericTimerCounterLib|ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf - ArmSmcLib|ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf - ArmDisassemblerLib|ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf - DmaLib|ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf - - UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf - PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf - SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf - - BdsLib|ArmPkg/Library/BdsLib/BdsLib.inf - FdtLib|EmbeddedPkg/Library/FdtLib/FdtLib.inf - - ShellLib|ShellPkg/Library/UefiShellLib/UefiShellLib.inf - FileHandleLib|MdePkg/Library/UefiFileHandleLib/UefiFileHandleLib.inf - SortLib|MdeModulePkg/Library/UefiSortLib/UefiSortLib.inf - - IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf - - ArmLib|ArmPkg/Library/ArmLib/ArmBaseLib.inf - ArmMmuLib|ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf - -[LibraryClasses.common.PEIM] - HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf - PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf - MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf - PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf - PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - -[LibraryClasses.ARM, LibraryClasses.AARCH64] - NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf - - # Add support for GCC stack protector - NULL|MdePkg/Library/BaseStackCheckLib/BaseStackCheckLib.inf - -[Components.common] - ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf - ArmPkg/Library/ArmDisassemblerLib/ArmDisassemblerLib.inf - ArmPkg/Library/ArmDmaLib/ArmDmaLib.inf - ArmPkg/Library/BdsLib/BdsLib.inf - ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf - ArmPkg/Library/DebugAgentSymbolsBaseLib/DebugAgentSymbolsBaseLib.inf - ArmPkg/Library/DebugPeCoffExtraActionLib/DebugPeCoffExtraActionLib.inf - ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf - ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf - ArmPkg/Library/SemiHostingDebugLib/SemiHostingDebugLib.inf - ArmPkg/Library/SemiHostingSerialPortLib/SemiHostingSerialPortLib.inf - ArmPkg/Library/SemihostLib/SemihostLib.inf - ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf - ArmPkg/Library/ArmPsciResetSystemLib/ArmPsciResetSystemLib.inf - ArmPkg/Library/ArmExceptionLib/ArmExceptionLib.inf - ArmPkg/Library/ArmExceptionLib/ArmRelocateExceptionLib.inf - - ArmPkg/Drivers/CpuDxe/CpuDxe.inf - ArmPkg/Drivers/CpuPei/CpuPei.inf - ArmPkg/Drivers/ArmGic/ArmGicDxe.inf - ArmPkg/Drivers/ArmGic/ArmGicLib.inf - ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf - ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf - ArmPkg/Drivers/TimerDxe/TimerDxe.inf - - ArmPkg/Library/ArmGenericTimerPhyCounterLib/ArmGenericTimerPhyCounterLib.inf - ArmPkg/Library/ArmGenericTimerVirtCounterLib/ArmGenericTimerVirtCounterLib.inf - - ArmPkg/Library/ArmSmcLib/ArmSmcLib.inf - ArmPkg/Library/ArmSmcLibNull/ArmSmcLibNull.inf - ArmPkg/Library/ArmHvcLib/ArmHvcLib.inf - - ArmPkg/Filesystem/SemihostFs/SemihostFs.inf - - ArmPkg/Library/ArmMmuLib/ArmMmuBaseLib.inf - - ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf - ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf - ArmPkg/Library/ArmGicArchLib/ArmGicArchLib.inf - ArmPkg/Library/ArmGicArchSecLib/ArmGicArchSecLib.inf - ArmPkg/Library/ArmLib/ArmBaseLib.inf - ArmPkg/Library/ArmSoftFloatLib/ArmSoftFloatLib.inf - ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLibBase.inf - ArmPkg/Library/PeiServicesTablePointerLib/PeiServicesTablePointerLib.inf - ArmPkg/Library/PlatformBootManagerLib/PlatformBootManagerLib.inf - -[Components.AARCH64] - ArmPkg/Library/ArmMmuLib/ArmMmuPeiLib.inf diff --git a/ArmPkg/Contributions.txt b/ArmPkg/Contributions.txt deleted file mode 100644 index f87cbd73c6..0000000000 --- a/ArmPkg/Contributions.txt +++ /dev/null @@ -1,218 +0,0 @@ - -====================== -= Code Contributions = -====================== - -To make a contribution to a TianoCore project, follow these steps. -1. Create a change description in the format specified below to - use in the source control commit log. -2. Your commit message must include your "Signed-off-by" signature, - and "Contributed-under" message. -3. Your "Contributed-under" message explicitly states that the - contribution is made under the terms of the specified - contribution agreement. Your "Contributed-under" message - must include the name of contribution agreement and version. - For example: Contributed-under: TianoCore Contribution Agreement 1.0 - The "TianoCore Contribution Agreement" is included below in - this document. -4. Submit your code to the TianoCore project using the process - that the project documents on its web page. If the process is - not documented, then submit the code on development email list - for the project. -5. It is preferred that contributions are submitted using the same - copyright license as the base project. When that is not possible, - then contributions using the following licenses can be accepted: - * BSD (2-clause): http://opensource.org/licenses/BSD-2-Clause - * BSD (3-clause): http://opensource.org/licenses/BSD-3-Clause - * MIT: http://opensource.org/licenses/MIT - * Python-2.0: http://opensource.org/licenses/Python-2.0 - * Zlib: http://opensource.org/licenses/Zlib - - Contributions of code put into the public domain can also be - accepted. - - Contributions using other licenses might be accepted, but further - review will be required. - -===================================================== -= Change Description / Commit Message / Patch Email = -===================================================== - -Your change description should use the standard format for a -commit message, and must include your "Signed-off-by" signature -and the "Contributed-under" message. - -== Sample Change Description / Commit Message = - -=== Start of sample patch email message === - -From: Contributor Name -Subject: [PATCH] CodeModule: Brief-single-line-summary - -Full-commit-message - -Contributed-under: TianoCore Contribution Agreement 1.0 -Signed-off-by: Contributor Name ---- - -An extra message for the patch email which will not be considered part -of the commit message can be added here. - -Patch content inline or attached - -=== End of sample patch email message === - -=== Notes for sample patch email === - -* The first line of commit message is taken from the email's subject - line following [PATCH]. The remaining portion of the commit message - is the email's content until the '---' line. -* git format-patch is one way to create this format - -=== Definitions for sample patch email === - -* "CodeModule" is a short idenfier for the affected code. For - example MdePkg, or MdeModulePkg UsbBusDxe. -* "Brief-single-line-summary" is a short summary of the change. -* The entire first line should be less than ~70 characters. -* "Full-commit-message" a verbose multiple line comment describing - the change. Each line should be less than ~70 characters. -* "Contributed-under" explicitely states that the contribution is - made under the terms of the contribtion agreement. This - agreement is included below in this document. -* "Signed-off-by" is the contributor's signature identifying them - by their real/legal name and their email address. - -======================================== -= TianoCore Contribution Agreement 1.0 = -======================================== - -INTEL CORPORATION ("INTEL") MAKES AVAILABLE SOFTWARE, DOCUMENTATION, -INFORMATION AND/OR OTHER MATERIALS FOR USE IN THE TIANOCORE OPEN SOURCE -PROJECT (COLLECTIVELY "CONTENT"). USE OF THE CONTENT IS GOVERNED BY THE -TERMS AND CONDITIONS OF THIS AGREEMENT BETWEEN YOU AND INTEL AND/OR THE -TERMS AND CONDITIONS OF LICENSE AGREEMENTS OR NOTICES INDICATED OR -REFERENCED BELOW. BY USING THE CONTENT, YOU AGREE THAT YOUR USE OF THE -CONTENT IS GOVERNED BY THIS AGREEMENT AND/OR THE TERMS AND CONDITIONS -OF ANY APPLICABLE LICENSE AGREEMENTS OR NOTICES INDICATED OR REFERENCED -BELOW. IF YOU DO NOT AGREE TO THE TERMS AND CONDITIONS OF THIS -AGREEMENT AND THE TERMS AND CONDITIONS OF ANY APPLICABLE LICENSE -AGREEMENTS OR NOTICES INDICATED OR REFERENCED BELOW, THEN YOU MAY NOT -USE THE CONTENT. - -Unless otherwise indicated, all Content made available on the TianoCore -site is provided to you under the terms and conditions of the BSD -License ("BSD"). A copy of the BSD License is available at -http://opensource.org/licenses/bsd-license.php -or when applicable, in the associated License.txt file. - -Certain other content may be made available under other licenses as -indicated in or with such Content. (For example, in a License.txt file.) - -You accept and agree to the following terms and conditions for Your -present and future Contributions submitted to TianoCore site. Except -for the license granted to Intel hereunder, You reserve all right, -title, and interest in and to Your Contributions. - -== SECTION 1: Definitions == -* "You" or "Contributor" shall mean the copyright owner or legal - entity authorized by the copyright owner that is making a - Contribution hereunder. All other entities that control, are - controlled by, or are under common control with that entity are - considered to be a single Contributor. For the purposes of this - definition, "control" means (i) the power, direct or indirect, to - cause the direction or management of such entity, whether by - contract or otherwise, or (ii) ownership of fifty percent (50%) - or more of the outstanding shares, or (iii) beneficial ownership - of such entity. -* "Contribution" shall mean any original work of authorship, - including any modifications or additions to an existing work, - that is intentionally submitted by You to the TinaoCore site for - inclusion in, or documentation of, any of the Content. For the - purposes of this definition, "submitted" means any form of - electronic, verbal, or written communication sent to the - TianoCore site or its representatives, including but not limited - to communication on electronic mailing lists, source code - control systems, and issue tracking systems that are managed by, - or on behalf of, the TianoCore site for the purpose of - discussing and improving the Content, but excluding - communication that is conspicuously marked or otherwise - designated in writing by You as "Not a Contribution." - -== SECTION 2: License for Contributions == -* Contributor hereby agrees that redistribution and use of the - Contribution in source and binary forms, with or without - modification, are permitted provided that the following - conditions are met: -** Redistributions of source code must retain the Contributor's - copyright notice, this list of conditions and the following - disclaimer. -** Redistributions in binary form must reproduce the Contributor's - copyright notice, this list of conditions and the following - disclaimer in the documentation and/or other materials provided - with the distribution. -* Disclaimer. None of the names of Contributor, Intel, or the names - of their respective contributors may be used to endorse or - promote products derived from this software without specific - prior written permission. -* Contributor grants a license (with the right to sublicense) under - claims of Contributor's patents that Contributor can license that - are infringed by the Contribution (as delivered by Contributor) to - make, use, distribute, sell, offer for sale, and import the - Contribution and derivative works thereof solely to the minimum - extent necessary for licensee to exercise the granted copyright - license; this patent license applies solely to those portions of - the Contribution that are unmodified. No hardware per se is - licensed. -* EXCEPT AS EXPRESSLY SET FORTH IN SECTION 3 BELOW, THE - CONTRIBUTION IS PROVIDED BY THE CONTRIBUTOR "AS IS" AND ANY - EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A - PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE - CONTRIBUTOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT - NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) - HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR - OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THE - CONTRIBUTION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH - DAMAGE. - -== SECTION 3: Representations == -* You represent that You are legally entitled to grant the above - license. If your employer(s) has rights to intellectual property - that You create that includes Your Contributions, You represent - that You have received permission to make Contributions on behalf - of that employer, that Your employer has waived such rights for - Your Contributions. -* You represent that each of Your Contributions is Your original - creation (see Section 4 for submissions on behalf of others). - You represent that Your Contribution submissions include complete - details of any third-party license or other restriction - (including, but not limited to, related patents and trademarks) - of which You are personally aware and which are associated with - any part of Your Contributions. - -== SECTION 4: Third Party Contributions == -* Should You wish to submit work that is not Your original creation, - You may submit it to TianoCore site separately from any - Contribution, identifying the complete details of its source - and of any license or other restriction (including, but not - limited to, related patents, trademarks, and license agreements) - of which You are personally aware, and conspicuously marking the - work as "Submitted on behalf of a third-party: [named here]". - -== SECTION 5: Miscellaneous == -* Applicable Laws. Any claims arising under or relating to this - Agreement shall be governed by the internal substantive laws of - the State of Delaware or federal courts located in Delaware, - without regard to principles of conflict of laws. -* Language. This Agreement is in the English language only, which - language shall be controlling in all respects, and all versions - of this Agreement in any other language shall be for accommodation - only and shall not be binding. All communications and notices made - or given pursuant to this Agreement, and all documentation and - support to be provided, unless otherwise noted, shall be in the - English language. - diff --git a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c b/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c deleted file mode 100644 index be77b8361c..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicCommonDxe.c +++ /dev/null @@ -1,141 +0,0 @@ -/*++ - -Copyright (c) 2013-2014, ARM Ltd. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - ---*/ - -#include "ArmGicDxe.h" - -VOID -EFIAPI -IrqInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext - ); - -VOID -EFIAPI -ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ); - -// -// Making this global saves a few bytes in image size -// -EFI_HANDLE gHardwareInterruptHandle = NULL; - -// -// Notifications -// -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; - -// Maximum Number of Interrupts -UINTN mGicNumInterrupts = 0; - -HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers = NULL; - -/** - Register Handler for the specified interrupt source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - @param Handler Callback for interrupt. NULL to unregister - - @retval EFI_SUCCESS Source was updated to support Handler. - @retval EFI_DEVICE_ERROR Hardware could not be programmed. - -**/ -EFI_STATUS -EFIAPI -RegisterInterruptSource ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source, - IN HARDWARE_INTERRUPT_HANDLER Handler - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) { - return EFI_INVALID_PARAMETER; - } - - if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) { - return EFI_ALREADY_STARTED; - } - - gRegisteredInterruptHandlers[Source] = Handler; - - // If the interrupt handler is unregistered then disable the interrupt - if (NULL == Handler){ - return This->DisableInterruptSource (This, Source); - } else { - return This->EnableInterruptSource (This, Source); - } -} - -EFI_STATUS -InstallAndRegisterInterruptService ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler, - IN EFI_EVENT_NOTIFY ExitBootServicesEvent - ) -{ - EFI_STATUS Status; - EFI_CPU_ARCH_PROTOCOL *Cpu; - - // Initialize the array for the Interrupt Handlers - gRegisteredInterruptHandlers = (HARDWARE_INTERRUPT_HANDLER*)AllocateZeroPool (sizeof(HARDWARE_INTERRUPT_HANDLER) * mGicNumInterrupts); - if (gRegisteredInterruptHandlers == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - Status = gBS->InstallMultipleProtocolInterfaces ( - &gHardwareInterruptHandle, - &gHardwareInterruptProtocolGuid, InterruptProtocol, - NULL - ); - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Get the CPU protocol that this driver requires. - // - Status = gBS->LocateProtocol (&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu); - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Unregister the default exception handler. - // - Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, NULL); - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Register to receive interrupts - // - Status = Cpu->RegisterInterruptHandler (Cpu, ARM_ARCH_EXCEPTION_IRQ, InterruptHandler); - if (EFI_ERROR (Status)) { - return Status; - } - - // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - - return Status; -} diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.c b/ArmPkg/Drivers/ArmGic/ArmGicDxe.c deleted file mode 100644 index 2bb064f89a..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.c +++ /dev/null @@ -1,59 +0,0 @@ -/*++ - -Copyright (c) 2013-2014, ARM Ltd. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -Module Name: - - ArmGicDxe.c - -Abstract: - - Driver implementing the GIC interrupt controller protocol - ---*/ - -#include - -#include "ArmGicDxe.h" - -/** - Initialize the state information for the CPU Architectural Protocol - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - @retval EFI_UNSUPPORTED GIC version not supported - -**/ -EFI_STATUS -InterruptDxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - ARM_GIC_ARCH_REVISION Revision; - - Revision = ArmGicGetSupportedArchRevision (); - - if (Revision == ARM_GIC_ARCH_REVISION_2) { - Status = GicV2DxeInitialize (ImageHandle, SystemTable); - } else if (Revision == ARM_GIC_ARCH_REVISION_3) { - Status = GicV3DxeInitialize (ImageHandle, SystemTable); - } else { - Status = EFI_UNSUPPORTED; - } - - return Status; -} diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h b/ArmPkg/Drivers/ArmGic/ArmGicDxe.h deleted file mode 100644 index af33aa90b0..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.h +++ /dev/null @@ -1,67 +0,0 @@ -/*++ - -Copyright (c) 2013-2014, ARM Ltd. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - ---*/ - -#ifndef __ARM_GIC_DXE_H__ -#define __ARM_GIC_DXE_H__ - -#include -#include -#include -#include -#include -#include - -#include -#include - -extern UINTN mGicNumInterrupts; -extern HARDWARE_INTERRUPT_HANDLER *gRegisteredInterruptHandlers; - -// -// Common API -// -EFI_STATUS -InstallAndRegisterInterruptService ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *InterruptProtocol, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler, - IN EFI_EVENT_NOTIFY ExitBootServicesEvent - ); - -EFI_STATUS -EFIAPI -RegisterInterruptSource ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source, - IN HARDWARE_INTERRUPT_HANDLER Handler - ); - -// -// GicV2 API -// -EFI_STATUS -GicV2DxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ); - -// -// GicV3 API -// -EFI_STATUS -GicV3DxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ); - -#endif diff --git a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf b/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf deleted file mode 100644 index e554301c4b..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicDxe.inf +++ /dev/null @@ -1,60 +0,0 @@ -#/** @file -# -# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
-# Copyright (c) 2012 - 2015, ARM Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmGicDxe - FILE_GUID = DE371F7C-DEC4-4D21-ADF1-593ABCC15882 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = InterruptDxeInitialize - -[Sources.common] - ArmGicDxe.c - ArmGicCommonDxe.c - - GicV2/ArmGicV2Dxe.c - GicV3/ArmGicV3Dxe.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - ArmGicLib - BaseLib - UefiLib - UefiBootServicesTableLib - DebugLib - PrintLib - MemoryAllocationLib - UefiDriverEntryPoint - IoLib - PcdLib - -[Protocols] - gHardwareInterruptProtocolGuid - gEfiCpuArchProtocolGuid - -[Pcd.common] - gArmTokenSpaceGuid.PcdGicDistributorBase - gArmTokenSpaceGuid.PcdGicRedistributorsBase - gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase - gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy - -[Depex] - gEfiCpuArchProtocolGuid diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c deleted file mode 100644 index e658e9bff5..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ /dev/null @@ -1,330 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include -#include -#include - -/** - * - * Return whether the Source interrupt index refers to a shared interrupt (SPI) - */ -STATIC -BOOLEAN -SourceIsSpi ( - IN UINTN Source - ) -{ - return Source >= 32 && Source < 1020; -} - -/** - * Return the base address of the GIC redistributor for the current CPU - * - * @param Revision GIC Revision. The GIC redistributor might have a different - * granularity following the GIC revision. - * - * @retval Base address of the associated GIC Redistributor - */ -STATIC -UINTN -GicGetCpuRedistributorBase ( - IN UINTN GicRedistributorBase, - IN ARM_GIC_ARCH_REVISION Revision - ) -{ - UINTN Index; - UINTN MpId; - UINTN CpuAffinity; - UINTN Affinity; - UINTN GicRedistributorGranularity; - UINTN GicCpuRedistributorBase; - - MpId = ArmReadMpidr (); - // Define CPU affinity as Affinity0[0:8], Affinity1[9:15], Affinity2[16:23], Affinity3[24:32] - // whereas Affinity3 is defined at [32:39] in MPIDR - CpuAffinity = (MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2)) | ((MpId & ARM_CORE_AFF3) >> 8); - - if (Revision == ARM_GIC_ARCH_REVISION_3) { - // 2 x 64KB frame: Redistributor control frame + SGI Control & Generation frame - GicRedistributorGranularity = ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_SGI_PPI_FRAME_SIZE; - } else { - ASSERT_EFI_ERROR (EFI_UNSUPPORTED); - return 0; - } - - GicCpuRedistributorBase = GicRedistributorBase; - - for (Index = 0; Index < PcdGet32 (PcdCoreCount); Index++) { - Affinity = MmioRead64 (GicCpuRedistributorBase + ARM_GICR_TYPER) >> 32; - if (Affinity == CpuAffinity) { - return GicCpuRedistributorBase; - } - - // Move to the next GIC Redistributor frame - GicCpuRedistributorBase += GicRedistributorGranularity; - } - - // The Redistributor has not been found for the current CPU - ASSERT_EFI_ERROR (EFI_NOT_FOUND); - return 0; -} - -UINTN -EFIAPI -ArmGicGetInterfaceIdentification ( - IN INTN GicInterruptInterfaceBase - ) -{ - // Read the GIC Identification Register - return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIIDR); -} - -UINTN -EFIAPI -ArmGicGetMaxNumInterrupts ( - IN INTN GicDistributorBase - ) -{ - return 32 * ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDICTR) & 0x1F) + 1); -} - -VOID -EFIAPI -ArmGicSendSgiTo ( - IN INTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId - ) -{ - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId); -} - -/* - * Acknowledge and return the value of the Interrupt Acknowledge Register - * - * InterruptId is returned separately from the register value because in - * the GICv2 the register value contains the CpuId and InterruptId while - * in the GICv3 the register value is only the InterruptId. - * - * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface - * @param InterruptId InterruptId read from the Interrupt Acknowledge Register - * - * @retval value returned by the Interrupt Acknowledge Register - * - */ -UINTN -EFIAPI -ArmGicAcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase, - OUT UINTN *InterruptId - ) -{ - UINTN Value; - ARM_GIC_ARCH_REVISION Revision; - - Revision = ArmGicGetSupportedArchRevision (); - if (Revision == ARM_GIC_ARCH_REVISION_2) { - Value = ArmGicV2AcknowledgeInterrupt (GicInterruptInterfaceBase); - // InterruptId is required for the caller to know if a valid or spurious - // interrupt has been read - ASSERT (InterruptId != NULL); - if (InterruptId != NULL) { - *InterruptId = Value & ARM_GIC_ICCIAR_ACKINTID; - } - } else if (Revision == ARM_GIC_ARCH_REVISION_3) { - Value = ArmGicV3AcknowledgeInterrupt (); - } else { - ASSERT_EFI_ERROR (EFI_UNSUPPORTED); - // Report Spurious interrupt which is what the above controllers would - // return if no interrupt was available - Value = 1023; - } - - return Value; -} - -VOID -EFIAPI -ArmGicEndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source - ) -{ - ARM_GIC_ARCH_REVISION Revision; - - Revision = ArmGicGetSupportedArchRevision (); - if (Revision == ARM_GIC_ARCH_REVISION_2) { - ArmGicV2EndOfInterrupt (GicInterruptInterfaceBase, Source); - } else if (Revision == ARM_GIC_ARCH_REVISION_3) { - ArmGicV3EndOfInterrupt (Source); - } else { - ASSERT_EFI_ERROR (EFI_UNSUPPORTED); - } -} - -VOID -EFIAPI -ArmGicEnableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source - ) -{ - UINT32 RegOffset; - UINTN RegShift; - ARM_GIC_ARCH_REVISION Revision; - UINTN GicCpuRedistributorBase; - - // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; - - Revision = ArmGicGetSupportedArchRevision (); - if ((Revision == ARM_GIC_ARCH_REVISION_2) || - FeaturePcdGet (PcdArmGicV3WithV2Legacy) || - SourceIsSpi (Source)) { - // Write set-enable register - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset), 1 << RegShift); - } else { - GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision); - if (GicCpuRedistributorBase == 0) { - ASSERT_EFI_ERROR (EFI_NOT_FOUND); - return; - } - - // Write set-enable register - MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOffset), 1 << RegShift); - } -} - -VOID -EFIAPI -ArmGicDisableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source - ) -{ - UINT32 RegOffset; - UINTN RegShift; - ARM_GIC_ARCH_REVISION Revision; - UINTN GicCpuRedistributorBase; - - // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; - - Revision = ArmGicGetSupportedArchRevision (); - if ((Revision == ARM_GIC_ARCH_REVISION_2) || - FeaturePcdGet (PcdArmGicV3WithV2Legacy) || - SourceIsSpi (Source)) { - // Write clear-enable register - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDICER + (4 * RegOffset), 1 << RegShift); - } else { - GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision); - if (GicCpuRedistributorBase == 0) { - return; - } - - // Write clear-enable register - MmioWrite32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICENABLER + (4 * RegOffset), 1 << RegShift); - } -} - -BOOLEAN -EFIAPI -ArmGicIsInterruptEnabled ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source - ) -{ - UINT32 RegOffset; - UINTN RegShift; - ARM_GIC_ARCH_REVISION Revision; - UINTN GicCpuRedistributorBase; - UINT32 Interrupts; - - // Calculate enable register offset and bit position - RegOffset = Source / 32; - RegShift = Source % 32; - - Revision = ArmGicGetSupportedArchRevision (); - if ((Revision == ARM_GIC_ARCH_REVISION_2) || - FeaturePcdGet (PcdArmGicV3WithV2Legacy) || - SourceIsSpi (Source)) { - Interrupts = ((MmioRead32 (GicDistributorBase + ARM_GIC_ICDISER + (4 * RegOffset)) & (1 << RegShift)) != 0); - } else { - GicCpuRedistributorBase = GicGetCpuRedistributorBase (GicRedistributorBase, Revision); - if (GicCpuRedistributorBase == 0) { - return 0; - } - - // Read set-enable register - Interrupts = MmioRead32 (GicCpuRedistributorBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISENABLER + (4 * RegOffset)); - } - - return ((Interrupts & (1 << RegShift)) != 0); -} - -VOID -EFIAPI -ArmGicDisableDistributor ( - IN INTN GicDistributorBase - ) -{ - // Disable Gic Distributor - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x0); -} - -VOID -EFIAPI -ArmGicEnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ) -{ - ARM_GIC_ARCH_REVISION Revision; - - Revision = ArmGicGetSupportedArchRevision (); - if (Revision == ARM_GIC_ARCH_REVISION_2) { - ArmGicV2EnableInterruptInterface (GicInterruptInterfaceBase); - } else if (Revision == ARM_GIC_ARCH_REVISION_3) { - ArmGicV3EnableInterruptInterface (); - } else { - ASSERT_EFI_ERROR (EFI_UNSUPPORTED); - } -} - -VOID -EFIAPI -ArmGicDisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ) -{ - ARM_GIC_ARCH_REVISION Revision; - - Revision = ArmGicGetSupportedArchRevision (); - if (Revision == ARM_GIC_ARCH_REVISION_2) { - ArmGicV2DisableInterruptInterface (GicInterruptInterfaceBase); - } else if (Revision == ARM_GIC_ARCH_REVISION_3) { - ArmGicV3DisableInterruptInterface (); - } else { - ASSERT_EFI_ERROR (EFI_UNSUPPORTED); - } -} diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicLib.inf deleted file mode 100644 index 047adac85f..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.inf +++ /dev/null @@ -1,51 +0,0 @@ -#/* @file -# Copyright (c) 2011-2015, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmGicLib - FILE_GUID = 03d05ee4-cdeb-458c-9dfc-993f09bdf405 - MODULE_TYPE = SEC - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmGicLib - -[Sources] - ArmGicLib.c - ArmGicNonSecLib.c - - GicV2/ArmGicV2Lib.c - GicV2/ArmGicV2NonSecLib.c - -[Sources.ARM] - GicV3/Arm/ArmGicV3.S | GCC - GicV3/Arm/ArmGicV3.asm | RVCT - -[Sources.AARCH64] - GicV3/AArch64/ArmGicV3.S - -[LibraryClasses] - ArmLib - DebugLib - IoLib - ArmGicArchLib - -[Packages] - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - MdePkg/MdePkg.dec - -[Pcd] - gArmPlatformTokenSpaceGuid.PcdCoreCount - -[FeaturePcd] - gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy diff --git a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c deleted file mode 100644 index f90391b716..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicNonSecLib.c +++ /dev/null @@ -1,41 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include - -VOID -EFIAPI -ArmGicEnableDistributor ( - IN INTN GicDistributorBase - ) -{ - ARM_GIC_ARCH_REVISION Revision; - - /* - * Enable GIC distributor in Non-Secure world. - * Note: The ICDDCR register is banked when Security extensions are implemented - */ - Revision = ArmGicGetSupportedArchRevision (); - if (Revision == ARM_GIC_ARCH_REVISION_2) { - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1); - } else { - if (MmioRead32 (GicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_ARE) { - MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x2); - } else { - MmioOr32 (GicDistributorBase + ARM_GIC_ICDDCR, 0x1); - } - } -} diff --git a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c deleted file mode 100644 index d64806d2f1..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.c +++ /dev/null @@ -1,64 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include - -/* - * This function configures the interrupts set by the mask to be secure. - * - */ -VOID -EFIAPI -ArmGicSetSecureInterrupts ( - IN UINTN GicDistributorBase, - IN UINTN* GicSecureInterruptMask, - IN UINTN GicSecureInterruptMaskSize - ) -{ - UINTN Index; - UINT32 InterruptStatus; - - // We must not have more interrupts defined by the mask than the number of available interrupts - ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32)); - - // Set all the interrupts defined by the mask as Secure - for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) { - InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4)); - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index])); - } -} - -VOID -EFIAPI -ArmGicEnableDistributor ( - IN INTN GicDistributorBase - ) -{ - // Turn on the GIC distributor - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1); -} - -VOID -EFIAPI -ArmGicSetupNonSecure ( - IN UINTN MpId, - IN INTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase - ) -{ - ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase); -} diff --git a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf b/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf deleted file mode 100644 index fc2e1bc01e..0000000000 --- a/ArmPkg/Drivers/ArmGic/ArmGicSecLib.inf +++ /dev/null @@ -1,52 +0,0 @@ -#/* @file -# Copyright (c) 2011-2015, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#*/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmGicSecLib - FILE_GUID = 85f3cf80-b5f4-11df-9855-0002a5d5c51b - MODULE_TYPE = SEC - VERSION_STRING = 1.0 - LIBRARY_CLASS = ArmGicLib - -[Sources] - ArmGicLib.c - ArmGicSecLib.c - - GicV2/ArmGicV2Lib.c - GicV2/ArmGicV2SecLib.c - -[Sources.ARM] - GicV3/Arm/ArmGicV3.S | GCC - GicV3/Arm/ArmGicV3.asm | RVCT - -[Sources.AARCH64] - GicV3/AArch64/ArmGicV3.S - -[Packages] - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - -[LibraryClasses] - ArmLib - DebugLib - IoLib - ArmGicArchLib - -[Pcd] - gArmPlatformTokenSpaceGuid.PcdCoreCount - -[FeaturePcd] - gArmTokenSpaceGuid.PcdArmGicV3WithV2Legacy diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c deleted file mode 100644 index b9ecd5543a..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c +++ /dev/null @@ -1,317 +0,0 @@ -/*++ - -Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
-Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2011-2016, ARM Ltd. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -Module Name: - - GicV2/ArmGicV2Dxe.c - -Abstract: - - Driver implementing the GicV2 interrupt controller protocol - ---*/ - -#include - -#include "ArmGicDxe.h" - -#define ARM_GIC_DEFAULT_PRIORITY 0x80 - -extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol; - -STATIC UINT32 mGicInterruptInterfaceBase; -STATIC UINT32 mGicDistributorBase; - -/** - Enable interrupt source Source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - - @retval EFI_SUCCESS Source interrupt enabled. - @retval EFI_UNSUPPORTED Source interrupt is not supported - -**/ -EFI_STATUS -EFIAPI -GicV2EnableInterruptSource ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - ArmGicEnableInterrupt (mGicDistributorBase, 0, Source); - - return EFI_SUCCESS; -} - -/** - Disable interrupt source Source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - - @retval EFI_SUCCESS Source interrupt disabled. - @retval EFI_UNSUPPORTED Source interrupt is not supported - -**/ -EFI_STATUS -EFIAPI -GicV2DisableInterruptSource ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - ArmGicDisableInterrupt (mGicDistributorBase, 0, Source); - - return EFI_SUCCESS; -} - -/** - Return current state of interrupt source Source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - @param InterruptState TRUE: source enabled, FALSE: source disabled. - - @retval EFI_SUCCESS InterruptState is valid - @retval EFI_UNSUPPORTED Source interrupt is not supported - -**/ -EFI_STATUS -EFIAPI -GicV2GetInterruptSourceState ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source, - IN BOOLEAN *InterruptState - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - *InterruptState = ArmGicIsInterruptEnabled (mGicDistributorBase, 0, Source); - - return EFI_SUCCESS; -} - -/** - Signal to the hardware that the End Of Interrupt state - has been reached. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - - @retval EFI_SUCCESS Source interrupt EOI'ed. - @retval EFI_UNSUPPORTED Source interrupt is not supported - -**/ -EFI_STATUS -EFIAPI -GicV2EndOfInterrupt ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - ArmGicV2EndOfInterrupt (mGicInterruptInterfaceBase, Source); - return EFI_SUCCESS; -} - -/** - EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs. - - @param InterruptType Defines the type of interrupt or exception that - occurred on the processor.This parameter is processor architecture specific. - @param SystemContext A pointer to the processor context when - the interrupt occurred on the processor. - - @return None - -**/ -VOID -EFIAPI -GicV2IrqInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - UINT32 GicInterrupt; - HARDWARE_INTERRUPT_HANDLER InterruptHandler; - - GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase); - - // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the number of interrupt (ie: Spurious interrupt). - if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) { - // The special interrupt do not need to be acknowledge - return; - } - - InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt]; - if (InterruptHandler != NULL) { - // Call the registered interrupt handler. - InterruptHandler (GicInterrupt, SystemContext); - } else { - DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt)); - GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt); - } -} - -// -// The protocol instance produced by this driver -// -EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV2Protocol = { - RegisterInterruptSource, - GicV2EnableInterruptSource, - GicV2DisableInterruptSource, - GicV2GetInterruptSourceState, - GicV2EndOfInterrupt -}; - -/** - Shutdown our hardware - - DXE Core will disable interrupts and turn off the timer and disable interrupts - after all the event handlers have run. - - @param[in] Event The Event that is being processed - @param[in] Context Event Context -**/ -VOID -EFIAPI -GicV2ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - UINTN Index; - UINT32 GicInterrupt; - - // Disable all the interrupts - for (Index = 0; Index < mGicNumInterrupts; Index++) { - GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index); - } - - // Acknowledge all pending interrupts - do { - GicInterrupt = ArmGicV2AcknowledgeInterrupt (mGicInterruptInterfaceBase); - - if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) < mGicNumInterrupts) { - GicV2EndOfInterrupt (&gHardwareInterruptV2Protocol, GicInterrupt); - } - } while (!ARM_GIC_IS_SPECIAL_INTERRUPTS (GicInterrupt)); - - // Disable Gic Interface - ArmGicV2DisableInterruptInterface (mGicInterruptInterfaceBase); - - // Disable Gic Distributor - ArmGicDisableDistributor (mGicDistributorBase); -} - -/** - Initialize the state information for the CPU Architectural Protocol - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -GicV2DxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - UINTN Index; - UINT32 RegOffset; - UINTN RegShift; - UINT32 CpuTarget; - - // Make sure the Interrupt Controller Protocol is not already installed in the system. - ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid); - - mGicInterruptInterfaceBase = PcdGet64 (PcdGicInterruptInterfaceBase); - mGicDistributorBase = PcdGet64 (PcdGicDistributorBase); - mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase); - - for (Index = 0; Index < mGicNumInterrupts; Index++) { - GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index); - - // Set Priority - RegOffset = Index / 4; - RegShift = (Index % 4) * 8; - MmioAndThenOr32 ( - mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), - ~(0xff << RegShift), - ARM_GIC_DEFAULT_PRIORITY << RegShift - ); - } - - // - // Targets the interrupts to the Primary Cpu - // - - // Only Primary CPU will run this code. We can identify our GIC CPU ID by reading - // the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are banked to each - // connected CPU. These 8 registers hold the CPU targets fields for interrupts 0-31. - // More Info in the GIC Specification about "Interrupt Processor Targets Registers" - // - // Read the first Interrupt Processor Targets Register (that corresponds to the 4 - // first SGIs) - CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR); - - // The CPU target is a bit field mapping each CPU to a GIC CPU Interface. This value - // is 0 when we run on a uniprocessor platform. - if (CpuTarget != 0) { - // The 8 first Interrupt Processor Targets Registers are read-only - for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) { - MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4), CpuTarget); - } - } - - // Set binary point reg to 0x7 (no preemption) - MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCBPR, 0x7); - - // Set priority mask reg to 0xff to allow all priorities through - MmioWrite32 (mGicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0xff); - - // Enable gic cpu interface - ArmGicEnableInterruptInterface (mGicInterruptInterfaceBase); - - // Enable gic distributor - ArmGicEnableDistributor (mGicDistributorBase); - - Status = InstallAndRegisterInterruptService ( - &gHardwareInterruptV2Protocol, GicV2IrqInterruptHandler, GicV2ExitBootServicesEvent); - - return Status; -} diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c deleted file mode 100644 index 5ac1d89ac5..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Lib.c +++ /dev/null @@ -1,36 +0,0 @@ -/** @file -* -* Copyright (c) 2013-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include - -UINTN -EFIAPI -ArmGicV2AcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase - ) -{ - // Read the Interrupt Acknowledge Register - return MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR); -} - -VOID -EFIAPI -ArmGicV2EndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source - ) -{ - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, Source); -} diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c deleted file mode 100644 index 92b764f422..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2NonSecLib.c +++ /dev/null @@ -1,42 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include - - -VOID -EFIAPI -ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ) -{ - /* - * Enable the CPU interface in Non-Secure world - * Note: The ICCICR register is banked when Security extensions are implemented - */ - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x1); -} - -VOID -EFIAPI -ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ) -{ - // Disable Gic Interface - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, 0x0); - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x0); -} diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c deleted file mode 100644 index ac1e0e4945..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2SecLib.c +++ /dev/null @@ -1,100 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include -#include -#include - -/* - * This function configures the all interrupts to be Non-secure. - * - */ -VOID -EFIAPI -ArmGicV2SetupNonSecure ( - IN UINTN MpId, - IN INTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase - ) -{ - UINTN InterruptId; - UINTN CachedPriorityMask; - UINTN Index; - UINTN MaxInterrupts; - - CachedPriorityMask = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR); - - // Set priority Mask so that no interrupts get through to CPU - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0); - - InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR); - MaxInterrupts = ArmGicGetMaxNumInterrupts (GicDistributorBase); - - // Only try to clear valid interrupts. Ignore spurious interrupts. - while ((InterruptId & 0x3FF) < MaxInterrupts) { - // Some of the SGI's are still pending, read Ack register and send End of Interrupt Signal - ArmGicEndOfInterrupt (GicInterruptInterfaceBase, InterruptId); - - // Next - InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR); - } - - // Only the primary core should set the Non Secure bit to the SPIs (Shared Peripheral Interrupt). - if (ArmPlatformIsPrimaryCore (MpId)) { - // Ensure all GIC interrupts are Non-Secure - for (Index = 0; Index < (MaxInterrupts / 32); Index++) { - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), 0xffffffff); - } - } else { - // The secondary cores only set the Non Secure bit to their banked PPIs - MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR, 0xffffffff); - } - - // Ensure all interrupts can get through the priority mask - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, CachedPriorityMask); -} - -VOID -EFIAPI -ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ) -{ - // Set Priority Mask to allow interrupts - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCPMR, 0x000000FF); - - // Enable CPU interface in Secure world - // Enable CPU interface in Non-secure World - // Signal Secure Interrupts to CPU using FIQ line * - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, - ARM_GIC_ICCICR_ENABLE_SECURE | - ARM_GIC_ICCICR_ENABLE_NS | - ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ); -} - -VOID -EFIAPI -ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ) -{ - UINT32 ControlValue; - - // Disable CPU interface in Secure world and Non-secure World - ControlValue = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR); - MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCICR, ControlValue & ~(ARM_GIC_ICCICR_ENABLE_SECURE | ARM_GIC_ICCICR_ENABLE_NS)); -} diff --git a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S deleted file mode 100644 index a4e0a4170a..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S +++ /dev/null @@ -1,112 +0,0 @@ -# -# Copyright (c) 2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials are licensed and made available -# under the terms and conditions of the BSD License which accompanies this -# distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include - -#if !defined(__clang__) - -// -// Clang versions before v3.6 do not support the GNU extension that allows -// system registers outside of the IMPLEMENTATION DEFINED range to be specified -// using the generic notation below. However, clang knows these registers by -// their architectural names, so it has no need for these aliases anyway. -// -#define ICC_SRE_EL1 S3_0_C12_C12_5 -#define ICC_SRE_EL2 S3_4_C12_C9_5 -#define ICC_SRE_EL3 S3_6_C12_C12_5 -#define ICC_IGRPEN1_EL1 S3_0_C12_C12_7 -#define ICC_EOIR1_EL1 S3_0_C12_C12_1 -#define ICC_IAR1_EL1 S3_0_C12_C12_0 -#define ICC_PMR_EL1 S3_0_C4_C6_0 -#define ICC_BPR1_EL1 S3_0_C12_C12_3 - -#endif - -//UINT32 -//EFIAPI -//ArmGicV3GetControlSystemRegisterEnable ( -// VOID -// ); -ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable) - EL1_OR_EL2_OR_EL3(x1) -1: mrs x0, ICC_SRE_EL1 - b 4f -2: mrs x0, ICC_SRE_EL2 - b 4f -3: mrs x0, ICC_SRE_EL3 -4: ret - -//VOID -//EFIAPI -//ArmGicV3SetControlSystemRegisterEnable ( -// IN UINT32 ControlSystemRegisterEnable -// ); -ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable) - EL1_OR_EL2_OR_EL3(x1) -1: msr ICC_SRE_EL1, x0 - b 4f -2: msr ICC_SRE_EL2, x0 - b 4f -3: msr ICC_SRE_EL3, x0 -4: isb - ret - -//VOID -//ArmGicV3EnableInterruptInterface ( -// VOID -// ); -ASM_FUNC(ArmGicV3EnableInterruptInterface) - mov x0, #1 - msr ICC_IGRPEN1_EL1, x0 - ret - -//VOID -//ArmGicV3DisableInterruptInterface ( -// VOID -// ); -ASM_FUNC(ArmGicV3DisableInterruptInterface) - mov x0, #0 - msr ICC_IGRPEN1_EL1, x0 - ret - -//VOID -//ArmGicV3EndOfInterrupt ( -// IN UINTN InterruptId -// ); -ASM_FUNC(ArmGicV3EndOfInterrupt) - msr ICC_EOIR1_EL1, x0 - ret - -//UINTN -//ArmGicV3AcknowledgeInterrupt ( -// VOID -// ); -ASM_FUNC(ArmGicV3AcknowledgeInterrupt) - mrs x0, ICC_IAR1_EL1 - ret - -//VOID -//ArmGicV3SetPriorityMask ( -// IN UINTN Priority -// ); -ASM_FUNC(ArmGicV3SetPriorityMask) - msr ICC_PMR_EL1, x0 - ret - -//VOID -//ArmGicV3SetBinaryPointer ( -// IN UINTN BinaryPoint -// ); -ASM_FUNC(ArmGicV3SetBinaryPointer) - msr ICC_BPR1_EL1, x0 - ret diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S deleted file mode 100644 index a72f3c8651..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S +++ /dev/null @@ -1,86 +0,0 @@ -# -# Copyright (c) 2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials are licensed and made available -# under the terms and conditions of the BSD License which accompanies this -# distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# - -#include -#include - -// For the moment we assume this will run in SVC mode on ARMv7 - -//UINT32 -//EFIAPI -//ArmGicGetControlSystemRegisterEnable ( -// VOID -// ); -ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable) - mrc p15, 0, r0, c12, c12, 5 // ICC_SRE - bx lr - -//VOID -//EFIAPI -//ArmGicSetControlSystemRegisterEnable ( -// IN UINT32 ControlSystemRegisterEnable -// ); -ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable) - mcr p15, 0, r0, c12, c12, 5 // ICC_SRE - isb - bx lr - -//VOID -//ArmGicV3EnableInterruptInterface ( -// VOID -// ); -ASM_FUNC(ArmGicV3EnableInterruptInterface) - mov r0, #1 - mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1 - bx lr - -//VOID -//ArmGicV3DisableInterruptInterface ( -// VOID -// ); -ASM_FUNC(ArmGicV3DisableInterruptInterface) - mov r0, #0 - mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1 - bx lr - -//VOID -//ArmGicV3EndOfInterrupt ( -// IN UINTN InterruptId -// ); -ASM_FUNC(ArmGicV3EndOfInterrupt) - mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1 - bx lr - -//UINTN -//ArmGicV3AcknowledgeInterrupt ( -// VOID -// ); -ASM_FUNC(ArmGicV3AcknowledgeInterrupt) - mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1 - bx lr - -//VOID -//ArmGicV3SetPriorityMask ( -// IN UINTN Priority -// ); -ASM_FUNC(ArmGicV3SetPriorityMask) - mcr p15, 0, r0, c4, c6, 0 //ICC_PMR - bx lr - -//VOID -//ArmGicV3SetBinaryPointer ( -// IN UINTN BinaryPoint -// ); -ASM_FUNC(ArmGicV3SetBinaryPointer) - mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1 - bx lr diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm deleted file mode 100644 index 4228fb59be..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.asm +++ /dev/null @@ -1,88 +0,0 @@ -// -// Copyright (c) 2014, ARM Limited. All rights reserved. -// -// This program and the accompanying materials are licensed and made available -// under the terms and conditions of the BSD License which accompanies this -// distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// - -// For the moment we assume this will run in SVC mode on ARMv7 - - - INCLUDE AsmMacroExport.inc - -//UINT32 -//EFIAPI -//ArmGicGetControlSystemRegisterEnable ( -// VOID -// ); - RVCT_ASM_EXPORT ArmGicV3GetControlSystemRegisterEnable - mrc p15, 0, r0, c12, c12, 5 // ICC_SRE - bx lr - -//VOID -//EFIAPI -//ArmGicSetControlSystemRegisterEnable ( -// IN UINT32 ControlSystemRegisterEnable -// ); - RVCT_ASM_EXPORT ArmGicV3SetControlSystemRegisterEnable - mcr p15, 0, r0, c12, c12, 5 // ICC_SRE - isb - bx lr - -//VOID -//ArmGicV3EnableInterruptInterface ( -// VOID -// ); - RVCT_ASM_EXPORT ArmGicV3EnableInterruptInterface - mov r0, #1 - mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1 - bx lr - -//VOID -//ArmGicV3DisableInterruptInterface ( -// VOID -// ); - RVCT_ASM_EXPORT ArmGicV3DisableInterruptInterface - mov r0, #0 - mcr p15, 0, r0, c12, c12, 7 // ICC_IGRPEN1 - bx lr - -//VOID -//ArmGicV3EndOfInterrupt ( -// IN UINTN InterruptId -// ); - RVCT_ASM_EXPORT ArmGicV3EndOfInterrupt - mcr p15, 0, r0, c12, c12, 1 //ICC_EOIR1 - bx lr - -//UINTN -//ArmGicV3AcknowledgeInterrupt ( -// VOID -// ); - RVCT_ASM_EXPORT ArmGicV3AcknowledgeInterrupt - mrc p15, 0, r0, c12, c8, 0 //ICC_IAR1 - bx lr - -//VOID -//ArmGicV3SetPriorityMask ( -// IN UINTN Priority -// ); - RVCT_ASM_EXPORT ArmGicV3SetPriorityMask - mcr p15, 0, r0, c4, c6, 0 //ICC_PMR - bx lr - -//VOID -//ArmGicV3SetBinaryPointer ( -// IN UINTN BinaryPoint -// ); - RVCT_ASM_EXPORT ArmGicV3SetBinaryPointer - mcr p15, 0, r0, c12, c12, 3 //ICC_BPR1 - bx lr - - END diff --git a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c b/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c deleted file mode 100644 index 8af97a93b1..0000000000 --- a/ArmPkg/Drivers/ArmGic/GicV3/ArmGicV3Dxe.c +++ /dev/null @@ -1,337 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2016, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include - -#include "ArmGicDxe.h" - -#define ARM_GIC_DEFAULT_PRIORITY 0x80 - -extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol; - -STATIC UINTN mGicDistributorBase; -STATIC UINTN mGicRedistributorsBase; - -/** - Enable interrupt source Source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - - @retval EFI_SUCCESS Source interrupt enabled. - @retval EFI_DEVICE_ERROR Hardware could not be programmed. - -**/ -EFI_STATUS -EFIAPI -GicV3EnableInterruptSource ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - ArmGicEnableInterrupt (mGicDistributorBase, mGicRedistributorsBase, Source); - - return EFI_SUCCESS; -} - -/** - Disable interrupt source Source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - - @retval EFI_SUCCESS Source interrupt disabled. - @retval EFI_DEVICE_ERROR Hardware could not be programmed. - -**/ -EFI_STATUS -EFIAPI -GicV3DisableInterruptSource ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - ArmGicDisableInterrupt (mGicDistributorBase, mGicRedistributorsBase, Source); - - return EFI_SUCCESS; -} - -/** - Return current state of interrupt source Source. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - @param InterruptState TRUE: source enabled, FALSE: source disabled. - - @retval EFI_SUCCESS InterruptState is valid - @retval EFI_DEVICE_ERROR InterruptState is not valid - -**/ -EFI_STATUS -EFIAPI -GicV3GetInterruptSourceState ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source, - IN BOOLEAN *InterruptState - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - *InterruptState = ArmGicIsInterruptEnabled (mGicDistributorBase, mGicRedistributorsBase, Source); - - return EFI_SUCCESS; -} - -/** - Signal to the hardware that the End Of Interrupt state - has been reached. - - @param This Instance pointer for this protocol - @param Source Hardware source of the interrupt - - @retval EFI_SUCCESS Source interrupt EOI'ed. - @retval EFI_DEVICE_ERROR Hardware could not be programmed. - -**/ -EFI_STATUS -EFIAPI -GicV3EndOfInterrupt ( - IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This, - IN HARDWARE_INTERRUPT_SOURCE Source - ) -{ - if (Source >= mGicNumInterrupts) { - ASSERT(FALSE); - return EFI_UNSUPPORTED; - } - - ArmGicV3EndOfInterrupt (Source); - return EFI_SUCCESS; -} - -/** - EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs. - - @param InterruptType Defines the type of interrupt or exception that - occurred on the processor.This parameter is processor architecture specific. - @param SystemContext A pointer to the processor context when - the interrupt occurred on the processor. - - @return None - -**/ -VOID -EFIAPI -GicV3IrqInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - UINT32 GicInterrupt; - HARDWARE_INTERRUPT_HANDLER InterruptHandler; - - GicInterrupt = ArmGicV3AcknowledgeInterrupt (); - - // Special Interrupts (ID1020-ID1023) have an Interrupt ID greater than the - // number of interrupt (ie: Spurious interrupt). - if ((GicInterrupt & ARM_GIC_ICCIAR_ACKINTID) >= mGicNumInterrupts) { - // The special interrupt do not need to be acknowledge - return; - } - - InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt]; - if (InterruptHandler != NULL) { - // Call the registered interrupt handler. - InterruptHandler (GicInterrupt, SystemContext); - } else { - DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: 0x%x\n", GicInterrupt)); - GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, GicInterrupt); - } -} - -// -// The protocol instance produced by this driver -// -EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptV3Protocol = { - RegisterInterruptSource, - GicV3EnableInterruptSource, - GicV3DisableInterruptSource, - GicV3GetInterruptSourceState, - GicV3EndOfInterrupt -}; - -/** - Shutdown our hardware - - DXE Core will disable interrupts and turn off the timer and disable interrupts - after all the event handlers have run. - - @param[in] Event The Event that is being processed - @param[in] Context Event Context -**/ -VOID -EFIAPI -GicV3ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - UINTN Index; - - // Acknowledge all pending interrupts - for (Index = 0; Index < mGicNumInterrupts; Index++) { - GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index); - } - - for (Index = 0; Index < mGicNumInterrupts; Index++) { - GicV3EndOfInterrupt (&gHardwareInterruptV3Protocol, Index); - } - - // Disable Gic Interface - ArmGicV3DisableInterruptInterface (); - - // Disable Gic Distributor - ArmGicDisableDistributor (mGicDistributorBase); -} - -/** - Initialize the state information for the CPU Architectural Protocol - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -GicV3DxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - UINTN Index; - UINT32 RegOffset; - UINTN RegShift; - UINT64 CpuTarget; - UINT64 MpId; - - // Make sure the Interrupt Controller Protocol is not already installed in the system. - ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid); - - mGicDistributorBase = PcdGet64 (PcdGicDistributorBase); - mGicRedistributorsBase = PcdGet64 (PcdGicRedistributorsBase); - mGicNumInterrupts = ArmGicGetMaxNumInterrupts (mGicDistributorBase); - - // - // We will be driving this GIC in native v3 mode, i.e., with Affinity - // Routing enabled. So ensure that the ARE bit is set. - // - if (!FeaturePcdGet (PcdArmGicV3WithV2Legacy)) { - MmioOr32 (mGicDistributorBase + ARM_GIC_ICDDCR, ARM_GIC_ICDDCR_ARE); - } - - for (Index = 0; Index < mGicNumInterrupts; Index++) { - GicV3DisableInterruptSource (&gHardwareInterruptV3Protocol, Index); - - // Set Priority - RegOffset = Index / 4; - RegShift = (Index % 4) * 8; - MmioAndThenOr32 ( - mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset), - ~(0xff << RegShift), - ARM_GIC_DEFAULT_PRIORITY << RegShift - ); - } - - // - // Targets the interrupts to the Primary Cpu - // - - if (FeaturePcdGet (PcdArmGicV3WithV2Legacy)) { - // Only Primary CPU will run this code. We can identify our GIC CPU ID by reading - // the GIC Distributor Target register. The 8 first GICD_ITARGETSRn are banked to each - // connected CPU. These 8 registers hold the CPU targets fields for interrupts 0-31. - // More Info in the GIC Specification about "Interrupt Processor Targets Registers" - // - // Read the first Interrupt Processor Targets Register (that corresponds to the 4 - // first SGIs) - CpuTarget = MmioRead32 (mGicDistributorBase + ARM_GIC_ICDIPTR); - - // The CPU target is a bit field mapping each CPU to a GIC CPU Interface. This value - // is 0 when we run on a uniprocessor platform. - if (CpuTarget != 0) { - // The 8 first Interrupt Processor Targets Registers are read-only - for (Index = 8; Index < (mGicNumInterrupts / 4); Index++) { - MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDIPTR + (Index * 4), CpuTarget); - } - } - } else { - MpId = ArmReadMpidr (); - CpuTarget = MpId & (ARM_CORE_AFF0 | ARM_CORE_AFF1 | ARM_CORE_AFF2 | ARM_CORE_AFF3); - - if ((MmioRead32 (mGicDistributorBase + ARM_GIC_ICDDCR) & ARM_GIC_ICDDCR_DS) != 0) { - // - // If the Disable Security (DS) control bit is set, we are dealing with a - // GIC that has only one security state. In this case, let's assume we are - // executing in non-secure state (which is appropriate for DXE modules) - // and that no other firmware has performed any configuration on the GIC. - // This means we need to reconfigure all interrupts to non-secure Group 1 - // first. - // - MmioWrite32 (mGicRedistributorsBase + ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDISR, 0xffffffff); - - for (Index = 32; Index < mGicNumInterrupts; Index += 32) { - MmioWrite32 (mGicDistributorBase + ARM_GIC_ICDISR + Index / 8, 0xffffffff); - } - } - - // Route the SPIs to the primary CPU. SPIs start at the INTID 32 - for (Index = 0; Index < (mGicNumInterrupts - 32); Index++) { - MmioWrite32 (mGicDistributorBase + ARM_GICD_IROUTER + (Index * 8), CpuTarget | ARM_GICD_IROUTER_IRM); - } - } - - // Set binary point reg to 0x7 (no preemption) - ArmGicV3SetBinaryPointer (0x7); - - // Set priority mask reg to 0xff to allow all priorities through - ArmGicV3SetPriorityMask (0xff); - - // Enable gic cpu interface - ArmGicV3EnableInterruptInterface (); - - // Enable gic distributor - ArmGicEnableDistributor (mGicDistributorBase); - - Status = InstallAndRegisterInterruptService ( - &gHardwareInterruptV3Protocol, GicV3IrqInterruptHandler, GicV3ExitBootServicesEvent); - - return Status; -} diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c deleted file mode 100644 index fecf6a87ad..0000000000 --- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.c +++ /dev/null @@ -1,559 +0,0 @@ -/** @file - Produces the CPU I/O 2 Protocol. - -Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.
-Copyright (c) 2016, Linaro Ltd. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -#include - -#include -#include -#include -#include -#include - -#define MAX_IO_PORT_ADDRESS 0xFFFF - -// -// Handle for the CPU I/O 2 Protocol -// -STATIC EFI_HANDLE mHandle = NULL; - -// -// Lookup table for increment values based on transfer widths -// -STATIC CONST UINT8 mInStride[] = { - 1, // EfiCpuIoWidthUint8 - 2, // EfiCpuIoWidthUint16 - 4, // EfiCpuIoWidthUint32 - 8, // EfiCpuIoWidthUint64 - 0, // EfiCpuIoWidthFifoUint8 - 0, // EfiCpuIoWidthFifoUint16 - 0, // EfiCpuIoWidthFifoUint32 - 0, // EfiCpuIoWidthFifoUint64 - 1, // EfiCpuIoWidthFillUint8 - 2, // EfiCpuIoWidthFillUint16 - 4, // EfiCpuIoWidthFillUint32 - 8 // EfiCpuIoWidthFillUint64 -}; - -// -// Lookup table for increment values based on transfer widths -// -STATIC CONST UINT8 mOutStride[] = { - 1, // EfiCpuIoWidthUint8 - 2, // EfiCpuIoWidthUint16 - 4, // EfiCpuIoWidthUint32 - 8, // EfiCpuIoWidthUint64 - 1, // EfiCpuIoWidthFifoUint8 - 2, // EfiCpuIoWidthFifoUint16 - 4, // EfiCpuIoWidthFifoUint32 - 8, // EfiCpuIoWidthFifoUint64 - 0, // EfiCpuIoWidthFillUint8 - 0, // EfiCpuIoWidthFillUint16 - 0, // EfiCpuIoWidthFillUint32 - 0 // EfiCpuIoWidthFillUint64 -}; - -/** - Check parameters to a CPU I/O 2 Protocol service request. - - The I/O operations are carried out exactly as requested. The caller is responsible - for satisfying any alignment and I/O width restrictions that a PI System on a - platform might require. For example on some platforms, width requests of - EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will - be handled by the driver. - - @param[in] MmioOperation TRUE for an MMIO operation, FALSE for I/O Port operation. - @param[in] Width Signifies the width of the I/O or Memory operation. - @param[in] Address The base address of the I/O operation. - @param[in] Count The number of I/O operations to perform. The number of - bytes moved is Width size * Count, starting at Address. - @param[in] Buffer For read operations, the destination buffer to store the results. - For write operations, the source buffer from which to write data. - - @retval EFI_SUCCESS The parameters for this request pass the checks. - @retval EFI_INVALID_PARAMETER Width is invalid for this PI system. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, - and Count is not valid for this PI system. - -**/ -STATIC -EFI_STATUS -CpuIoCheckParameter ( - IN BOOLEAN MmioOperation, - IN EFI_CPU_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN VOID *Buffer - ) -{ - UINT64 MaxCount; - UINT64 Limit; - - // - // Check to see if Buffer is NULL - // - if (Buffer == NULL) { - return EFI_INVALID_PARAMETER; - } - - // - // Check to see if Width is in the valid range - // - if ((UINT32)Width >= EfiCpuIoWidthMaximum) { - return EFI_INVALID_PARAMETER; - } - - // - // For FIFO type, the target address won't increase during the access, - // so treat Count as 1 - // - if (Width >= EfiCpuIoWidthFifoUint8 && Width <= EfiCpuIoWidthFifoUint64) { - Count = 1; - } - - // - // Check to see if Width is in the valid range for I/O Port operations - // - Width = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); - if (!MmioOperation && (Width == EfiCpuIoWidthUint64)) { - return EFI_INVALID_PARAMETER; - } - - // - // Check to see if Address is aligned - // - if ((Address & (UINT64)(mInStride[Width] - 1)) != 0) { - return EFI_UNSUPPORTED; - } - - // - // Check to see if any address associated with this transfer exceeds the maximum - // allowed address. The maximum address implied by the parameters passed in is - // Address + Size * Count. If the following condition is met, then the transfer - // is not supported. - // - // Address + Size * Count > (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS) + 1 - // - // Since MAX_ADDRESS can be the maximum integer value supported by the CPU and Count - // can also be the maximum integer value supported by the CPU, this range - // check must be adjusted to avoid all oveflow conditions. - // - // The following form of the range check is equivalent but assumes that - // MAX_ADDRESS and MAX_IO_PORT_ADDRESS are of the form (2^n - 1). - // - Limit = (MmioOperation ? MAX_ADDRESS : MAX_IO_PORT_ADDRESS); - if (Count == 0) { - if (Address > Limit) { - return EFI_UNSUPPORTED; - } - } else { - MaxCount = RShiftU64 (Limit, Width); - if (MaxCount < (Count - 1)) { - return EFI_UNSUPPORTED; - } - if (Address > LShiftU64 (MaxCount - Count + 1, Width)) { - return EFI_UNSUPPORTED; - } - } - - // - // Check to see if Buffer is aligned - // - if (((UINTN)Buffer & ((MIN (sizeof (UINTN), mInStride[Width]) - 1))) != 0) { - return EFI_UNSUPPORTED; - } - - return EFI_SUCCESS; -} - -/** - Reads memory-mapped registers. - - The I/O operations are carried out exactly as requested. The caller is responsible - for satisfying any alignment and I/O width restrictions that a PI System on a - platform might require. For example on some platforms, width requests of - EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will - be handled by the driver. - - If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, - or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for - each of the Count operations that is performed. - - If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, - EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times on the same Address. - - If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, - EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times from the first element of Buffer. - - @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance. - @param[in] Width Signifies the width of the I/O or Memory operation. - @param[in] Address The base address of the I/O operation. - @param[in] Count The number of I/O operations to perform. The number of - bytes moved is Width size * Count, starting at Address. - @param[out] Buffer For read operations, the destination buffer to store the results. - For write operations, the source buffer from which to write data. - - @retval EFI_SUCCESS The data was read from or written to the PI system. - @retval EFI_INVALID_PARAMETER Width is invalid for this PI system. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, - and Count is not valid for this PI system. - -**/ -STATIC -EFI_STATUS -EFIAPI -CpuMemoryServiceRead ( - IN EFI_CPU_IO2_PROTOCOL *This, - IN EFI_CPU_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - OUT VOID *Buffer - ) -{ - EFI_STATUS Status; - UINT8 InStride; - UINT8 OutStride; - EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth; - UINT8 *Uint8Buffer; - - Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer); - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Select loop based on the width of the transfer - // - InStride = mInStride[Width]; - OutStride = mOutStride[Width]; - OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); - for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) { - if (OperationWidth == EfiCpuIoWidthUint8) { - *Uint8Buffer = MmioRead8 ((UINTN)Address); - } else if (OperationWidth == EfiCpuIoWidthUint16) { - *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address); - } else if (OperationWidth == EfiCpuIoWidthUint32) { - *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address); - } else if (OperationWidth == EfiCpuIoWidthUint64) { - *((UINT64 *)Uint8Buffer) = MmioRead64 ((UINTN)Address); - } - } - return EFI_SUCCESS; -} - -/** - Writes memory-mapped registers. - - The I/O operations are carried out exactly as requested. The caller is responsible - for satisfying any alignment and I/O width restrictions that a PI System on a - platform might require. For example on some platforms, width requests of - EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will - be handled by the driver. - - If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, - or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for - each of the Count operations that is performed. - - If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, - EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times on the same Address. - - If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, - EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times from the first element of Buffer. - - @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance. - @param[in] Width Signifies the width of the I/O or Memory operation. - @param[in] Address The base address of the I/O operation. - @param[in] Count The number of I/O operations to perform. The number of - bytes moved is Width size * Count, starting at Address. - @param[in] Buffer For read operations, the destination buffer to store the results. - For write operations, the source buffer from which to write data. - - @retval EFI_SUCCESS The data was read from or written to the PI system. - @retval EFI_INVALID_PARAMETER Width is invalid for this PI system. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, - and Count is not valid for this PI system. - -**/ -STATIC -EFI_STATUS -EFIAPI -CpuMemoryServiceWrite ( - IN EFI_CPU_IO2_PROTOCOL *This, - IN EFI_CPU_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN VOID *Buffer - ) -{ - EFI_STATUS Status; - UINT8 InStride; - UINT8 OutStride; - EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth; - UINT8 *Uint8Buffer; - - Status = CpuIoCheckParameter (TRUE, Width, Address, Count, Buffer); - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Select loop based on the width of the transfer - // - InStride = mInStride[Width]; - OutStride = mOutStride[Width]; - OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); - for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) { - if (OperationWidth == EfiCpuIoWidthUint8) { - MmioWrite8 ((UINTN)Address, *Uint8Buffer); - } else if (OperationWidth == EfiCpuIoWidthUint16) { - MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer)); - } else if (OperationWidth == EfiCpuIoWidthUint32) { - MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); - } else if (OperationWidth == EfiCpuIoWidthUint64) { - MmioWrite64 ((UINTN)Address, *((UINT64 *)Uint8Buffer)); - } - } - return EFI_SUCCESS; -} - -/** - Reads I/O registers. - - The I/O operations are carried out exactly as requested. The caller is responsible - for satisfying any alignment and I/O width restrictions that a PI System on a - platform might require. For example on some platforms, width requests of - EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will - be handled by the driver. - - If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, - or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for - each of the Count operations that is performed. - - If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, - EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times on the same Address. - - If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, - EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times from the first element of Buffer. - - @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance. - @param[in] Width Signifies the width of the I/O or Memory operation. - @param[in] Address The base address of the I/O operation. - @param[in] Count The number of I/O operations to perform. The number of - bytes moved is Width size * Count, starting at Address. - @param[out] Buffer For read operations, the destination buffer to store the results. - For write operations, the source buffer from which to write data. - - @retval EFI_SUCCESS The data was read from or written to the PI system. - @retval EFI_INVALID_PARAMETER Width is invalid for this PI system. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, - and Count is not valid for this PI system. - -**/ -STATIC -EFI_STATUS -EFIAPI -CpuIoServiceRead ( - IN EFI_CPU_IO2_PROTOCOL *This, - IN EFI_CPU_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - OUT VOID *Buffer - ) -{ - EFI_STATUS Status; - UINT8 InStride; - UINT8 OutStride; - EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth; - UINT8 *Uint8Buffer; - - Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer); - if (EFI_ERROR (Status)) { - return Status; - } - - Address += PcdGet64 (PcdPciIoTranslation); - - // - // Select loop based on the width of the transfer - // - InStride = mInStride[Width]; - OutStride = mOutStride[Width]; - OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); - - for (Uint8Buffer = Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) { - if (OperationWidth == EfiCpuIoWidthUint8) { - *Uint8Buffer = MmioRead8 ((UINTN)Address); - } else if (OperationWidth == EfiCpuIoWidthUint16) { - *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address); - } else if (OperationWidth == EfiCpuIoWidthUint32) { - *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address); - } - } - - return EFI_SUCCESS; -} - -/** - Write I/O registers. - - The I/O operations are carried out exactly as requested. The caller is responsible - for satisfying any alignment and I/O width restrictions that a PI System on a - platform might require. For example on some platforms, width requests of - EfiCpuIoWidthUint64 do not work. Misaligned buffers, on the other hand, will - be handled by the driver. - - If Width is EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, EfiCpuIoWidthUint32, - or EfiCpuIoWidthUint64, then both Address and Buffer are incremented for - each of the Count operations that is performed. - - If Width is EfiCpuIoWidthFifoUint8, EfiCpuIoWidthFifoUint16, - EfiCpuIoWidthFifoUint32, or EfiCpuIoWidthFifoUint64, then only Buffer is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times on the same Address. - - If Width is EfiCpuIoWidthFillUint8, EfiCpuIoWidthFillUint16, - EfiCpuIoWidthFillUint32, or EfiCpuIoWidthFillUint64, then only Address is - incremented for each of the Count operations that is performed. The read or - write operation is performed Count times from the first element of Buffer. - - @param[in] This A pointer to the EFI_CPU_IO2_PROTOCOL instance. - @param[in] Width Signifies the width of the I/O or Memory operation. - @param[in] Address The base address of the I/O operation. - @param[in] Count The number of I/O operations to perform. The number of - bytes moved is Width size * Count, starting at Address. - @param[in] Buffer For read operations, the destination buffer to store the results. - For write operations, the source buffer from which to write data. - - @retval EFI_SUCCESS The data was read from or written to the PI system. - @retval EFI_INVALID_PARAMETER Width is invalid for this PI system. - @retval EFI_INVALID_PARAMETER Buffer is NULL. - @retval EFI_UNSUPPORTED The Buffer is not aligned for the given Width. - @retval EFI_UNSUPPORTED The address range specified by Address, Width, - and Count is not valid for this PI system. - -**/ -STATIC -EFI_STATUS -EFIAPI -CpuIoServiceWrite ( - IN EFI_CPU_IO2_PROTOCOL *This, - IN EFI_CPU_IO_PROTOCOL_WIDTH Width, - IN UINT64 Address, - IN UINTN Count, - IN VOID *Buffer - ) -{ - EFI_STATUS Status; - UINT8 InStride; - UINT8 OutStride; - EFI_CPU_IO_PROTOCOL_WIDTH OperationWidth; - UINT8 *Uint8Buffer; - - // - // Make sure the parameters are valid - // - Status = CpuIoCheckParameter (FALSE, Width, Address, Count, Buffer); - if (EFI_ERROR (Status)) { - return Status; - } - - Address += PcdGet64 (PcdPciIoTranslation); - - // - // Select loop based on the width of the transfer - // - InStride = mInStride[Width]; - OutStride = mOutStride[Width]; - OperationWidth = (EFI_CPU_IO_PROTOCOL_WIDTH) (Width & 0x03); - - for (Uint8Buffer = (UINT8 *)Buffer; Count > 0; Address += InStride, Uint8Buffer += OutStride, Count--) { - if (OperationWidth == EfiCpuIoWidthUint8) { - MmioWrite8 ((UINTN)Address, *Uint8Buffer); - } else if (OperationWidth == EfiCpuIoWidthUint16) { - MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer)); - } else if (OperationWidth == EfiCpuIoWidthUint32) { - MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); - } - } - - return EFI_SUCCESS; -} - -// -// CPU I/O 2 Protocol instance -// -STATIC EFI_CPU_IO2_PROTOCOL mCpuIo2 = { - { - CpuMemoryServiceRead, - CpuMemoryServiceWrite - }, - { - CpuIoServiceRead, - CpuIoServiceWrite - } -}; - - -/** - The user Entry Point for module CpuIo2Dxe. The user code starts with this function. - - @param[in] ImageHandle The firmware allocated handle for the EFI image. - @param[in] SystemTable A pointer to the EFI System Table. - - @retval EFI_SUCCESS The entry point is executed successfully. - @retval other Some error occurs when executing this entry point. - -**/ -EFI_STATUS -EFIAPI -ArmPciCpuIo2Initialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiCpuIo2ProtocolGuid); - Status = gBS->InstallMultipleProtocolInterfaces ( - &mHandle, - &gEfiCpuIo2ProtocolGuid, &mCpuIo2, - NULL - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf b/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf deleted file mode 100644 index f7eab9d0e9..0000000000 --- a/ArmPkg/Drivers/ArmPciCpuIo2Dxe/ArmPciCpuIo2Dxe.inf +++ /dev/null @@ -1,53 +0,0 @@ -## @file -# Produces the CPU I/O 2 Protocol by using the services of the I/O Library. -# -# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.
-# Copyright (c) 2016, Linaro Ltd. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmPciCpuIo2Dxe - FILE_GUID = 168D1A6E-F4A5-448A-9E95-795661BB3067 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - ENTRY_POINT = ArmPciCpuIo2Initialize - -# -# The following information is for reference only and not required by the build tools. -# -# VALID_ARCHITECTURES = ARM AARCH64 -# - -[Sources] - ArmPciCpuIo2Dxe.c - -[Packages] - ArmPkg/ArmPkg.dec - MdePkg/MdePkg.dec - -[LibraryClasses] - UefiDriverEntryPoint - BaseLib - DebugLib - IoLib - PcdLib - UefiBootServicesTableLib - -[Pcd] - gArmTokenSpaceGuid.PcdPciIoTranslation - -[Protocols] - gEfiCpuIo2ProtocolGuid ## PRODUCES - -[Depex] - TRUE diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c deleted file mode 100644 index 3e216c7cb2..0000000000 --- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c +++ /dev/null @@ -1,347 +0,0 @@ -/*++ - -Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
-Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2011-2013, ARM Ltd. All rights reserved.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - ---*/ - -#include -#include "CpuDxe.h" - -#define TT_ATTR_INDX_INVALID ((UINT32)~0) - -STATIC -UINT64 -GetFirstPageAttribute ( - IN UINT64 *FirstLevelTableAddress, - IN UINTN TableLevel - ) -{ - UINT64 FirstEntry; - - // Get the first entry of the table - FirstEntry = *FirstLevelTableAddress; - - if ((TableLevel != 3) && (FirstEntry & TT_TYPE_MASK) == TT_TYPE_TABLE_ENTRY) { - // Only valid for Levels 0, 1 and 2 - - // Get the attribute of the subsequent table - return GetFirstPageAttribute ((UINT64*)(FirstEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), TableLevel + 1); - } else if (((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY) || - ((TableLevel == 3) && ((FirstEntry & TT_TYPE_MASK) == TT_TYPE_BLOCK_ENTRY_LEVEL3))) - { - return FirstEntry & TT_ATTR_INDX_MASK; - } else { - return TT_ATTR_INDX_INVALID; - } -} - -STATIC -UINT64 -GetNextEntryAttribute ( - IN UINT64 *TableAddress, - IN UINTN EntryCount, - IN UINTN TableLevel, - IN UINT64 BaseAddress, - IN OUT UINT32 *PrevEntryAttribute, - IN OUT UINT64 *StartGcdRegion - ) -{ - UINTN Index; - UINT64 Entry; - UINT32 EntryAttribute; - UINT32 EntryType; - EFI_STATUS Status; - UINTN NumberOfDescriptors; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap; - - // Get the memory space map from GCD - MemorySpaceMap = NULL; - Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap); - ASSERT_EFI_ERROR (Status); - - // We cannot get more than 3-level page table - ASSERT (TableLevel <= 3); - - // While the top level table might not contain TT_ENTRY_COUNT entries; - // the subsequent ones should be filled up - for (Index = 0; Index < EntryCount; Index++) { - Entry = TableAddress[Index]; - EntryType = Entry & TT_TYPE_MASK; - EntryAttribute = Entry & TT_ATTR_INDX_MASK; - - // If Entry is a Table Descriptor type entry then go through the sub-level table - if ((EntryType == TT_TYPE_BLOCK_ENTRY) || - ((TableLevel == 3) && (EntryType == TT_TYPE_BLOCK_ENTRY_LEVEL3))) { - if ((*PrevEntryAttribute == TT_ATTR_INDX_INVALID) || (EntryAttribute != *PrevEntryAttribute)) { - if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) { - // Update GCD with the last region - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, - *StartGcdRegion, - (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion, - PageAttributeToGcdAttribute (*PrevEntryAttribute)); - } - - // Start of the new region - *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)); - *PrevEntryAttribute = EntryAttribute; - } else { - continue; - } - } else if (EntryType == TT_TYPE_TABLE_ENTRY) { - // Table Entry type is only valid for Level 0, 1, 2 - ASSERT (TableLevel < 3); - - // Increase the level number and scan the sub-level table - GetNextEntryAttribute ((UINT64*)(Entry & TT_ADDRESS_MASK_DESCRIPTION_TABLE), - TT_ENTRY_COUNT, TableLevel + 1, - (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))), - PrevEntryAttribute, StartGcdRegion); - } else { - if (*PrevEntryAttribute != TT_ATTR_INDX_INVALID) { - // Update GCD with the last region - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, - *StartGcdRegion, - (BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel))) - *StartGcdRegion, - PageAttributeToGcdAttribute (*PrevEntryAttribute)); - - // Start of the new region - *StartGcdRegion = BaseAddress + (Index * TT_ADDRESS_AT_LEVEL(TableLevel)); - *PrevEntryAttribute = TT_ATTR_INDX_INVALID; - } - } - } - - FreePool (MemorySpaceMap); - - return BaseAddress + (EntryCount * TT_ADDRESS_AT_LEVEL(TableLevel)); -} - -EFI_STATUS -SyncCacheConfig ( - IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol - ) -{ - EFI_STATUS Status; - UINT32 PageAttribute = 0; - UINT64 *FirstLevelTableAddress; - UINTN TableLevel; - UINTN TableCount; - UINTN NumberOfDescriptors; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap; - UINTN Tcr; - UINTN T0SZ; - UINT64 BaseAddressGcdRegion; - UINT64 EndAddressGcdRegion; - - // This code assumes MMU is enabled and filed with section translations - ASSERT (ArmMmuEnabled ()); - - // - // Get the memory space map from GCD - // - MemorySpaceMap = NULL; - Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap); - ASSERT_EFI_ERROR (Status); - - // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs - // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a - // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were - // a client) to update its copy of the attributes. This is bad architecture and should be replaced - // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead. - - // Obtain page table base - FirstLevelTableAddress = (UINT64*)(ArmGetTTBR0BaseAddress ()); - - // Get Translation Control Register value - Tcr = ArmGetTCR (); - // Get Address Region Size - T0SZ = Tcr & TCR_T0SZ_MASK; - - // Get the level of the first table for the indicated Address Region Size - GetRootTranslationTableInfo (T0SZ, &TableLevel, &TableCount); - - // First Attribute of the Page Tables - PageAttribute = GetFirstPageAttribute (FirstLevelTableAddress, TableLevel); - - // We scan from the start of the memory map (ie: at the address 0x0) - BaseAddressGcdRegion = 0x0; - EndAddressGcdRegion = GetNextEntryAttribute (FirstLevelTableAddress, - TableCount, TableLevel, - BaseAddressGcdRegion, - &PageAttribute, &BaseAddressGcdRegion); - - // Update GCD with the last region if valid - if (PageAttribute != TT_ATTR_INDX_INVALID) { - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, - BaseAddressGcdRegion, - EndAddressGcdRegion - BaseAddressGcdRegion, - PageAttributeToGcdAttribute (PageAttribute)); - } - - FreePool (MemorySpaceMap); - - return EFI_SUCCESS; -} - -UINT64 -EfiAttributeToArmAttribute ( - IN UINT64 EfiAttributes - ) -{ - UINT64 ArmAttributes; - - switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) { - case EFI_MEMORY_UC: - if (ArmReadCurrentEL () == AARCH64_EL2) { - ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_XN_MASK; - } else { - ArmAttributes = TT_ATTR_INDX_DEVICE_MEMORY | TT_UXN_MASK | TT_PXN_MASK; - } - break; - case EFI_MEMORY_WC: - ArmAttributes = TT_ATTR_INDX_MEMORY_NON_CACHEABLE; - break; - case EFI_MEMORY_WT: - ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_THROUGH | TT_SH_INNER_SHAREABLE; - break; - case EFI_MEMORY_WB: - ArmAttributes = TT_ATTR_INDX_MEMORY_WRITE_BACK | TT_SH_INNER_SHAREABLE; - break; - default: - ArmAttributes = TT_ATTR_INDX_MASK; - } - - // Set the access flag to match the block attributes - ArmAttributes |= TT_AF; - - // Determine protection attributes - if (EfiAttributes & EFI_MEMORY_RO) { - ArmAttributes |= TT_AP_RO_RO; - } - - // Process eXecute Never attribute - if (EfiAttributes & EFI_MEMORY_XP) { - ArmAttributes |= TT_PXN_MASK; - } - - return ArmAttributes; -} - -// This function will recursively go down the page table to find the first block address linked to 'BaseAddress'. -// And then the function will identify the size of the region that has the same page table attribute. -EFI_STATUS -GetMemoryRegionRec ( - IN UINT64 *TranslationTable, - IN UINTN TableLevel, - IN UINT64 *LastBlockEntry, - IN OUT UINTN *BaseAddress, - OUT UINTN *RegionLength, - OUT UINTN *RegionAttributes - ) -{ - EFI_STATUS Status; - UINT64 *NextTranslationTable; - UINT64 *BlockEntry; - UINT64 BlockEntryType; - UINT64 EntryType; - - if (TableLevel != 3) { - BlockEntryType = TT_TYPE_BLOCK_ENTRY; - } else { - BlockEntryType = TT_TYPE_BLOCK_ENTRY_LEVEL3; - } - - // Find the block entry linked to the Base Address - BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress); - EntryType = *BlockEntry & TT_TYPE_MASK; - - if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) { - NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE); - - // The entry is a page table, so we go to the next level - Status = GetMemoryRegionRec ( - NextTranslationTable, // Address of the next level page table - TableLevel + 1, // Next Page Table level - (UINTN*)TT_LAST_BLOCK_ADDRESS(NextTranslationTable, TT_ENTRY_COUNT), - BaseAddress, RegionLength, RegionAttributes); - - // In case of 'Success', it means the end of the block region has been found into the upper - // level translation table - if (!EFI_ERROR(Status)) { - return EFI_SUCCESS; - } - - // Now we processed the table move to the next entry - BlockEntry++; - } else if (EntryType == BlockEntryType) { - // We have found the BlockEntry attached to the address. We save its start address (the start - // address might be before the 'BaseAdress') and attributes - *BaseAddress = *BaseAddress & ~(TT_ADDRESS_AT_LEVEL(TableLevel) - 1); - *RegionLength = 0; - *RegionAttributes = *BlockEntry & TT_ATTRIBUTES_MASK; - } else { - // We have an 'Invalid' entry - return EFI_UNSUPPORTED; - } - - while (BlockEntry <= LastBlockEntry) { - if ((*BlockEntry & TT_ATTRIBUTES_MASK) == *RegionAttributes) { - *RegionLength = *RegionLength + TT_BLOCK_ENTRY_SIZE_AT_LEVEL(TableLevel); - } else { - // In case we have found the end of the region we return success - return EFI_SUCCESS; - } - BlockEntry++; - } - - // If we have reached the end of the TranslationTable and we have not found the end of the region then - // we return EFI_NOT_FOUND. - // The caller will continue to look for the memory region at its level - return EFI_NOT_FOUND; -} - -EFI_STATUS -GetMemoryRegion ( - IN OUT UINTN *BaseAddress, - OUT UINTN *RegionLength, - OUT UINTN *RegionAttributes - ) -{ - EFI_STATUS Status; - UINT64 *TranslationTable; - UINTN TableLevel; - UINTN EntryCount; - UINTN T0SZ; - - ASSERT ((BaseAddress != NULL) && (RegionLength != NULL) && (RegionAttributes != NULL)); - - TranslationTable = ArmGetTTBR0BaseAddress (); - - T0SZ = ArmGetTCR () & TCR_T0SZ_MASK; - // Get the Table info from T0SZ - GetRootTranslationTableInfo (T0SZ, &TableLevel, &EntryCount); - - Status = GetMemoryRegionRec (TranslationTable, TableLevel, - (UINTN*)TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount), - BaseAddress, RegionLength, RegionAttributes); - - // If the region continues up to the end of the root table then GetMemoryRegionRec() - // will return EFI_NOT_FOUND - if (Status == EFI_NOT_FOUND) { - return EFI_SUCCESS; - } else { - return Status; - } -} diff --git a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c b/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c deleted file mode 100644 index 12ca5b2667..0000000000 --- a/ArmPkg/Drivers/CpuDxe/Arm/Mmu.c +++ /dev/null @@ -1,514 +0,0 @@ -/*++ - -Copyright (c) 2009, Hewlett-Packard Company. All rights reserved.
-Portions copyright (c) 2010, Apple Inc. All rights reserved.
-Portions copyright (c) 2013, ARM Ltd. All rights reserved.
-Copyright (c) 2017, Intel Corporation. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - - ---*/ - -#include -#include "CpuDxe.h" - -EFI_STATUS -SectionToGcdAttributes ( - IN UINT32 SectionAttributes, - OUT UINT64 *GcdAttributes - ) -{ - *GcdAttributes = 0; - - // determine cacheability attributes - switch(SectionAttributes & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) { - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED: - *GcdAttributes |= EFI_MEMORY_UC; - break; - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE: - *GcdAttributes |= EFI_MEMORY_UC; - break; - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC: - *GcdAttributes |= EFI_MEMORY_WT; - break; - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC: - *GcdAttributes |= EFI_MEMORY_WB; - break; - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE: - *GcdAttributes |= EFI_MEMORY_WC; - break; - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC: - *GcdAttributes |= EFI_MEMORY_WB; - break; - case TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE: - *GcdAttributes |= EFI_MEMORY_UC; - break; - default: - return EFI_UNSUPPORTED; - } - - // determine protection attributes - switch(SectionAttributes & TT_DESCRIPTOR_SECTION_AP_MASK) { - case TT_DESCRIPTOR_SECTION_AP_NO_NO: // no read, no write - //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP; - break; - - case TT_DESCRIPTOR_SECTION_AP_RW_NO: - case TT_DESCRIPTOR_SECTION_AP_RW_RW: - // normal read/write access, do not add additional attributes - break; - - // read only cases map to write-protect - case TT_DESCRIPTOR_SECTION_AP_RO_NO: - case TT_DESCRIPTOR_SECTION_AP_RO_RO: - *GcdAttributes |= EFI_MEMORY_RO; - break; - - default: - return EFI_UNSUPPORTED; - } - - // now process eXectue Never attribute - if ((SectionAttributes & TT_DESCRIPTOR_SECTION_XN_MASK) != 0 ) { - *GcdAttributes |= EFI_MEMORY_XP; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -PageToGcdAttributes ( - IN UINT32 PageAttributes, - OUT UINT64 *GcdAttributes - ) -{ - *GcdAttributes = 0; - - // determine cacheability attributes - switch(PageAttributes & TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) { - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED: - *GcdAttributes |= EFI_MEMORY_UC; - break; - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE: - *GcdAttributes |= EFI_MEMORY_UC; - break; - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC: - *GcdAttributes |= EFI_MEMORY_WT; - break; - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC: - *GcdAttributes |= EFI_MEMORY_WB; - break; - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE: - *GcdAttributes |= EFI_MEMORY_WC; - break; - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC: - *GcdAttributes |= EFI_MEMORY_WB; - break; - case TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE: - *GcdAttributes |= EFI_MEMORY_UC; - break; - default: - return EFI_UNSUPPORTED; - } - - // determine protection attributes - switch(PageAttributes & TT_DESCRIPTOR_PAGE_AP_MASK) { - case TT_DESCRIPTOR_PAGE_AP_NO_NO: // no read, no write - //*GcdAttributes |= EFI_MEMORY_RO | EFI_MEMORY_RP; - break; - - case TT_DESCRIPTOR_PAGE_AP_RW_NO: - case TT_DESCRIPTOR_PAGE_AP_RW_RW: - // normal read/write access, do not add additional attributes - break; - - // read only cases map to write-protect - case TT_DESCRIPTOR_PAGE_AP_RO_NO: - case TT_DESCRIPTOR_PAGE_AP_RO_RO: - *GcdAttributes |= EFI_MEMORY_RO; - break; - - default: - return EFI_UNSUPPORTED; - } - - // now process eXectue Never attribute - if ((PageAttributes & TT_DESCRIPTOR_PAGE_XN_MASK) != 0 ) { - *GcdAttributes |= EFI_MEMORY_XP; - } - - return EFI_SUCCESS; -} - -EFI_STATUS -SyncCacheConfigPage ( - IN UINT32 SectionIndex, - IN UINT32 FirstLevelDescriptor, - IN UINTN NumberOfDescriptors, - IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap, - IN OUT EFI_PHYSICAL_ADDRESS *NextRegionBase, - IN OUT UINT64 *NextRegionLength, - IN OUT UINT32 *NextSectionAttributes - ) -{ - EFI_STATUS Status; - UINT32 i; - volatile ARM_PAGE_TABLE_ENTRY *SecondLevelTable; - UINT32 NextPageAttributes = 0; - UINT32 PageAttributes = 0; - UINT32 BaseAddress; - UINT64 GcdAttributes; - - // Get the Base Address from FirstLevelDescriptor; - BaseAddress = TT_DESCRIPTOR_PAGE_BASE_ADDRESS(SectionIndex << TT_DESCRIPTOR_SECTION_BASE_SHIFT); - - // Convert SectionAttributes into PageAttributes - NextPageAttributes = - TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(*NextSectionAttributes,0) | - TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(*NextSectionAttributes); - - // obtain page table base - SecondLevelTable = (ARM_PAGE_TABLE_ENTRY *)(FirstLevelDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK); - - for (i=0; i < TRANSLATION_TABLE_PAGE_COUNT; i++) { - if ((SecondLevelTable[i] & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) { - // extract attributes (cacheability and permissions) - PageAttributes = SecondLevelTable[i] & (TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK | TT_DESCRIPTOR_PAGE_AP_MASK); - - if (NextPageAttributes == 0) { - // start on a new region - *NextRegionLength = 0; - *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT); - NextPageAttributes = PageAttributes; - } else if (PageAttributes != NextPageAttributes) { - // Convert Section Attributes into GCD Attributes - Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes); - ASSERT_EFI_ERROR (Status); - - // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK) - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes); - - // start on a new region - *NextRegionLength = 0; - *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT); - NextPageAttributes = PageAttributes; - } - } else if (NextPageAttributes != 0) { - // Convert Page Attributes into GCD Attributes - Status = PageToGcdAttributes (NextPageAttributes, &GcdAttributes); - ASSERT_EFI_ERROR (Status); - - // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK) - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, *NextRegionBase, *NextRegionLength, GcdAttributes); - - *NextRegionLength = 0; - *NextRegionBase = BaseAddress | (i << TT_DESCRIPTOR_PAGE_BASE_SHIFT); - NextPageAttributes = 0; - } - *NextRegionLength += TT_DESCRIPTOR_PAGE_SIZE; - } - - // Convert back PageAttributes into SectionAttributes - *NextSectionAttributes = - TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(NextPageAttributes,0) | - TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(NextPageAttributes); - - return EFI_SUCCESS; -} - -EFI_STATUS -SyncCacheConfig ( - IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol - ) -{ - EFI_STATUS Status; - UINT32 i; - EFI_PHYSICAL_ADDRESS NextRegionBase; - UINT64 NextRegionLength; - UINT32 NextSectionAttributes = 0; - UINT32 SectionAttributes = 0; - UINT64 GcdAttributes; - volatile ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable; - UINTN NumberOfDescriptors; - EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap; - - - DEBUG ((EFI_D_PAGE, "SyncCacheConfig()\n")); - - // This code assumes MMU is enabled and filed with section translations - ASSERT (ArmMmuEnabled ()); - - // - // Get the memory space map from GCD - // - MemorySpaceMap = NULL; - Status = gDS->GetMemorySpaceMap (&NumberOfDescriptors, &MemorySpaceMap); - ASSERT_EFI_ERROR (Status); - - - // The GCD implementation maintains its own copy of the state of memory space attributes. GCD needs - // to know what the initial memory space attributes are. The CPU Arch. Protocol does not provide a - // GetMemoryAttributes function for GCD to get this so we must resort to calling GCD (as if we were - // a client) to update its copy of the attributes. This is bad architecture and should be replaced - // with a way for GCD to query the CPU Arch. driver of the existing memory space attributes instead. - - // obtain page table base - FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)(ArmGetTTBR0BaseAddress ()); - - // Get the first region - NextSectionAttributes = FirstLevelTable[0] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK); - - // iterate through each 1MB descriptor - NextRegionBase = NextRegionLength = 0; - for (i=0; i < TRANSLATION_TABLE_SECTION_COUNT; i++) { - if ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) { - // extract attributes (cacheability and permissions) - SectionAttributes = FirstLevelTable[i] & (TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK | TT_DESCRIPTOR_SECTION_AP_MASK); - - if (NextSectionAttributes == 0) { - // start on a new region - NextRegionLength = 0; - NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT); - NextSectionAttributes = SectionAttributes; - } else if (SectionAttributes != NextSectionAttributes) { - // Convert Section Attributes into GCD Attributes - Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes); - ASSERT_EFI_ERROR (Status); - - // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK) - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes); - - // start on a new region - NextRegionLength = 0; - NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT); - NextSectionAttributes = SectionAttributes; - } - NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE; - } else if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(FirstLevelTable[i])) { - // In this case any bits set in the 'NextSectionAttributes' are garbage and were set from - // bits that are actually part of the pagetable address. We clear it out to zero so that - // the SyncCacheConfigPage will use the page attributes instead of trying to convert the - // section attributes into page attributes - NextSectionAttributes = 0; - Status = SyncCacheConfigPage ( - i,FirstLevelTable[i], - NumberOfDescriptors, MemorySpaceMap, - &NextRegionBase,&NextRegionLength,&NextSectionAttributes); - ASSERT_EFI_ERROR (Status); - } else { - // We do not support yet 16MB sections - ASSERT ((FirstLevelTable[i] & TT_DESCRIPTOR_SECTION_TYPE_MASK) != TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION); - - // start on a new region - if (NextSectionAttributes != 0) { - // Convert Section Attributes into GCD Attributes - Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes); - ASSERT_EFI_ERROR (Status); - - // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK) - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes); - - NextRegionLength = 0; - NextRegionBase = TT_DESCRIPTOR_SECTION_BASE_ADDRESS(i << TT_DESCRIPTOR_SECTION_BASE_SHIFT); - NextSectionAttributes = 0; - } - NextRegionLength += TT_DESCRIPTOR_SECTION_SIZE; - } - } // section entry loop - - if (NextSectionAttributes != 0) { - // Convert Section Attributes into GCD Attributes - Status = SectionToGcdAttributes (NextSectionAttributes, &GcdAttributes); - ASSERT_EFI_ERROR (Status); - - // update GCD with these changes (this will recurse into our own CpuSetMemoryAttributes below which is OK) - SetGcdMemorySpaceAttributes (MemorySpaceMap, NumberOfDescriptors, NextRegionBase, NextRegionLength, GcdAttributes); - } - - FreePool (MemorySpaceMap); - - return EFI_SUCCESS; -} - -UINT64 -EfiAttributeToArmAttribute ( - IN UINT64 EfiAttributes - ) -{ - UINT64 ArmAttributes; - - switch (EfiAttributes & EFI_MEMORY_CACHETYPE_MASK) { - case EFI_MEMORY_UC: - // Map to strongly ordered - ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED; // TEX[2:0] = 0, C=0, B=0 - break; - - case EFI_MEMORY_WC: - // Map to normal non-cachable - ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE; // TEX [2:0]= 001 = 0x2, B=0, C=0 - break; - - case EFI_MEMORY_WT: - // Write through with no-allocate - ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC; // TEX [2:0] = 0, C=1, B=0 - break; - - case EFI_MEMORY_WB: - // Write back (with allocate) - ArmAttributes = TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC; // TEX [2:0] = 001, C=1, B=1 - break; - - case EFI_MEMORY_UCE: - default: - ArmAttributes = TT_DESCRIPTOR_SECTION_TYPE_FAULT; - break; - } - - // Determine protection attributes - if (EfiAttributes & EFI_MEMORY_RO) { - ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RO_RO; - } else { - ArmAttributes |= TT_DESCRIPTOR_SECTION_AP_RW_RW; - } - - // Determine eXecute Never attribute - if (EfiAttributes & EFI_MEMORY_XP) { - ArmAttributes |= TT_DESCRIPTOR_SECTION_XN_MASK; - } - - return ArmAttributes; -} - -EFI_STATUS -GetMemoryRegionPage ( - IN UINT32 *PageTable, - IN OUT UINTN *BaseAddress, - OUT UINTN *RegionLength, - OUT UINTN *RegionAttributes - ) -{ - UINT32 PageAttributes; - UINT32 TableIndex; - UINT32 PageDescriptor; - - // Convert the section attributes into page attributes - PageAttributes = ConvertSectionAttributesToPageAttributes (*RegionAttributes, 0); - - // Calculate index into first level translation table for start of modification - TableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT; - ASSERT (TableIndex < TRANSLATION_TABLE_PAGE_COUNT); - - // Go through the page table to find the end of the section - for (; TableIndex < TRANSLATION_TABLE_PAGE_COUNT; TableIndex++) { - // Get the section at the given index - PageDescriptor = PageTable[TableIndex]; - - if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_MASK) == TT_DESCRIPTOR_PAGE_TYPE_FAULT) { - // Case: End of the boundary of the region - return EFI_SUCCESS; - } else if ((PageDescriptor & TT_DESCRIPTOR_PAGE_TYPE_PAGE) == TT_DESCRIPTOR_PAGE_TYPE_PAGE) { - if ((PageDescriptor & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK) == PageAttributes) { - *RegionLength = *RegionLength + TT_DESCRIPTOR_PAGE_SIZE; - } else { - // Case: End of the boundary of the region - return EFI_SUCCESS; - } - } else { - // We do not support Large Page yet. We return EFI_SUCCESS that means end of the region. - ASSERT(0); - return EFI_SUCCESS; - } - } - - return EFI_NOT_FOUND; -} - -EFI_STATUS -GetMemoryRegion ( - IN OUT UINTN *BaseAddress, - OUT UINTN *RegionLength, - OUT UINTN *RegionAttributes - ) -{ - EFI_STATUS Status; - UINT32 TableIndex; - UINT32 PageAttributes; - UINT32 PageTableIndex; - UINT32 SectionDescriptor; - ARM_FIRST_LEVEL_DESCRIPTOR *FirstLevelTable; - UINT32 *PageTable; - - // Initialize the arguments - *RegionLength = 0; - - // Obtain page table base - FirstLevelTable = (ARM_FIRST_LEVEL_DESCRIPTOR *)ArmGetTTBR0BaseAddress (); - - // Calculate index into first level translation table for start of modification - TableIndex = TT_DESCRIPTOR_SECTION_BASE_ADDRESS (*BaseAddress) >> TT_DESCRIPTOR_SECTION_BASE_SHIFT; - ASSERT (TableIndex < TRANSLATION_TABLE_SECTION_COUNT); - - // Get the section at the given index - SectionDescriptor = FirstLevelTable[TableIndex]; - - // If 'BaseAddress' belongs to the section then round it to the section boundary - if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) || - ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) - { - *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK; - *RegionAttributes = SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK; - } else { - // Otherwise, we round it to the page boundary - *BaseAddress = (*BaseAddress) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK; - - // Get the attribute at the page table level (Level 2) - PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK); - - // Calculate index into first level translation table for start of modification - PageTableIndex = ((*BaseAddress) & TT_DESCRIPTOR_PAGE_INDEX_MASK) >> TT_DESCRIPTOR_PAGE_BASE_SHIFT; - ASSERT (PageTableIndex < TRANSLATION_TABLE_PAGE_COUNT); - - PageAttributes = PageTable[PageTableIndex] & TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK; - *RegionAttributes = TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY (PageAttributes, 0) | - TT_DESCRIPTOR_CONVERT_TO_SECTION_AP (PageAttributes); - } - - for (;TableIndex < TRANSLATION_TABLE_SECTION_COUNT; TableIndex++) { - // Get the section at the given index - SectionDescriptor = FirstLevelTable[TableIndex]; - - // If the entry is a level-2 page table then we scan it to find the end of the region - if (TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE (SectionDescriptor)) { - // Extract the page table location from the descriptor - PageTable = (UINT32*)(SectionDescriptor & TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK); - - // Scan the page table to find the end of the region. - Status = GetMemoryRegionPage (PageTable, BaseAddress, RegionLength, RegionAttributes); - - // If we have found the end of the region (Status == EFI_SUCCESS) then we exit the for-loop - if (Status == EFI_SUCCESS) { - break; - } - } else if (((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SECTION) || - ((SectionDescriptor & TT_DESCRIPTOR_SECTION_TYPE_MASK) == TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION)) { - if ((SectionDescriptor & TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK) != *RegionAttributes) { - // If the attributes of the section differ from the one targeted then we exit the loop - break; - } else { - *RegionLength = *RegionLength + TT_DESCRIPTOR_SECTION_SIZE; - } - } else { - // If we are on an invalid section then it means it is the end of our section. - break; - } - } - - return EFI_SUCCESS; -} diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.c b/ArmPkg/Drivers/CpuDxe/CpuDxe.c deleted file mode 100644 index 5e923d45b7..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.c +++ /dev/null @@ -1,289 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "CpuDxe.h" - -#include - -BOOLEAN mIsFlushingGCD; - -/** - This function flushes the range of addresses from Start to Start+Length - from the processor's data cache. If Start is not aligned to a cache line - boundary, then the bytes before Start to the preceding cache line boundary - are also flushed. If Start+Length is not aligned to a cache line boundary, - then the bytes past Start+Length to the end of the next cache line boundary - are also flushed. The FlushType of EfiCpuFlushTypeWriteBackInvalidate must be - supported. If the data cache is fully coherent with all DMA operations, then - this function can just return EFI_SUCCESS. If the processor does not support - flushing a range of the data cache, then the entire data cache can be flushed. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - @param Start The beginning physical address to flush from the processor's data - cache. - @param Length The number of bytes to flush from the processor's data cache. This - function may flush more bytes than Length specifies depending upon - the granularity of the flush operation that the processor supports. - @param FlushType Specifies the type of flush operation to perform. - - @retval EFI_SUCCESS The address range from Start to Start+Length was flushed from - the processor's data cache. - @retval EFI_UNSUPPORTED The processor does not support the cache flush type specified - by FlushType. - @retval EFI_DEVICE_ERROR The address range from Start to Start+Length could not be flushed - from the processor's data cache. - -**/ -EFI_STATUS -EFIAPI -CpuFlushCpuDataCache ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS Start, - IN UINT64 Length, - IN EFI_CPU_FLUSH_TYPE FlushType - ) -{ - - switch (FlushType) { - case EfiCpuFlushTypeWriteBack: - WriteBackDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length); - break; - case EfiCpuFlushTypeInvalidate: - InvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length); - break; - case EfiCpuFlushTypeWriteBackInvalidate: - WriteBackInvalidateDataCacheRange ((VOID *)(UINTN)Start, (UINTN)Length); - break; - default: - return EFI_INVALID_PARAMETER; - } - - return EFI_SUCCESS; -} - - -/** - This function enables interrupt processing by the processor. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS Interrupts are enabled on the processor. - @retval EFI_DEVICE_ERROR Interrupts could not be enabled on the processor. - -**/ -EFI_STATUS -EFIAPI -CpuEnableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This - ) -{ - ArmEnableInterrupts (); - - return EFI_SUCCESS; -} - - -/** - This function disables interrupt processing by the processor. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS Interrupts are disabled on the processor. - @retval EFI_DEVICE_ERROR Interrupts could not be disabled on the processor. - -**/ -EFI_STATUS -EFIAPI -CpuDisableInterrupt ( - IN EFI_CPU_ARCH_PROTOCOL *This - ) -{ - ArmDisableInterrupts (); - - return EFI_SUCCESS; -} - - -/** - This function retrieves the processor's current interrupt state a returns it in - State. If interrupts are currently enabled, then TRUE is returned. If interrupts - are currently disabled, then FALSE is returned. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - @param State A pointer to the processor's current interrupt state. Set to TRUE if - interrupts are enabled and FALSE if interrupts are disabled. - - @retval EFI_SUCCESS The processor's current interrupt state was returned in State. - @retval EFI_INVALID_PARAMETER State is NULL. - -**/ -EFI_STATUS -EFIAPI -CpuGetInterruptState ( - IN EFI_CPU_ARCH_PROTOCOL *This, - OUT BOOLEAN *State - ) -{ - if (State == NULL) { - return EFI_INVALID_PARAMETER; - } - - *State = ArmGetInterruptState(); - return EFI_SUCCESS; -} - - -/** - This function generates an INIT on the processor. If this function succeeds, then the - processor will be reset, and control will not be returned to the caller. If InitType is - not supported by this processor, or the processor cannot programmatically generate an - INIT without help from external hardware, then EFI_UNSUPPORTED is returned. If an error - occurs attempting to generate an INIT, then EFI_DEVICE_ERROR is returned. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - @param InitType The type of processor INIT to perform. - - @retval EFI_SUCCESS The processor INIT was performed. This return code should never be seen. - @retval EFI_UNSUPPORTED The processor INIT operation specified by InitType is not supported - by this processor. - @retval EFI_DEVICE_ERROR The processor INIT failed. - -**/ -EFI_STATUS -EFIAPI -CpuInit ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_CPU_INIT_TYPE InitType - ) -{ - return EFI_UNSUPPORTED; -} - -EFI_STATUS -EFIAPI -CpuRegisterInterruptHandler ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ) -{ - return RegisterInterruptHandler (InterruptType, InterruptHandler); -} - -EFI_STATUS -EFIAPI -CpuGetTimerValue ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN UINT32 TimerIndex, - OUT UINT64 *TimerValue, - OUT UINT64 *TimerPeriod OPTIONAL - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Callback function for idle events. - - @param Event Event whose notification function is being invoked. - @param Context The pointer to the notification function's context, - which is implementation-dependent. - -**/ -VOID -EFIAPI -IdleLoopEventCallback ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - CpuSleep (); -} - -// -// Globals used to initialize the protocol -// -EFI_HANDLE mCpuHandle = NULL; -EFI_CPU_ARCH_PROTOCOL mCpu = { - CpuFlushCpuDataCache, - CpuEnableInterrupt, - CpuDisableInterrupt, - CpuGetInterruptState, - CpuInit, - CpuRegisterInterruptHandler, - CpuGetTimerValue, - CpuSetMemoryAttributes, - 0, // NumberOfTimers - 2048, // DmaBufferAlignment -}; - -STATIC -VOID -InitializeDma ( - IN OUT EFI_CPU_ARCH_PROTOCOL *CpuArchProtocol - ) -{ - CpuArchProtocol->DmaBufferAlignment = ArmCacheWritebackGranule (); -} - -EFI_STATUS -CpuDxeInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - EFI_EVENT IdleLoopEvent; - - InitializeExceptions (&mCpu); - - InitializeDma (&mCpu); - - Status = gBS->InstallMultipleProtocolInterfaces ( - &mCpuHandle, - &gEfiCpuArchProtocolGuid, &mCpu, - NULL - ); - - // - // Make sure GCD and MMU settings match. This API calls gDS->SetMemorySpaceAttributes () - // and that calls EFI_CPU_ARCH_PROTOCOL.SetMemoryAttributes, so this code needs to go - // after the protocol is installed - // - mIsFlushingGCD = TRUE; - SyncCacheConfig (&mCpu); - mIsFlushingGCD = FALSE; - - // If the platform is a MPCore system then install the Configuration Table describing the - // secondary core states - if (ArmIsMpCore()) { - PublishArmProcessorTable(); - } - - // - // Setup a callback for idle events - // - Status = gBS->CreateEventEx ( - EVT_NOTIFY_SIGNAL, - TPL_NOTIFY, - IdleLoopEventCallback, - NULL, - &gIdleLoopEventGuid, - &IdleLoopEvent - ); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.h b/ArmPkg/Drivers/CpuDxe/CpuDxe.h deleted file mode 100644 index a0f71e69ec..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.h +++ /dev/null @@ -1,160 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __CPU_DXE_ARM_EXCEPTION_H__ -#define __CPU_DXE_ARM_EXCEPTION_H__ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -extern BOOLEAN mIsFlushingGCD; - -/** - This function registers and enables the handler specified by InterruptHandler for a processor - interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the - handler for the processor interrupt or exception type specified by InterruptType is uninstalled. - The installed handler is called once for each processor interrupt or exception. - - @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts - are enabled and FALSE if interrupts are disabled. - @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called - when a processor interrupt occurs. If this parameter is NULL, then the handler - will be uninstalled. - - @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled. - @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was - previously installed. - @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not - previously installed. - @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported. - -**/ -EFI_STATUS -RegisterInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ); - - -/** - This function registers and enables the handler specified by InterruptHandler for a processor - interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the - handler for the processor interrupt or exception type specified by InterruptType is uninstalled. - The installed handler is called once for each processor interrupt or exception. - - @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts - are enabled and FALSE if interrupts are disabled. - @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called - when a processor interrupt occurs. If this parameter is NULL, then the handler - will be uninstalled. - - @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled. - @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was - previously installed. - @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not - previously installed. - @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported. - -**/ -EFI_STATUS -RegisterDebuggerInterruptHandler ( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ); - - -EFI_STATUS -EFIAPI -CpuSetMemoryAttributes ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 Attributes - ); - -EFI_STATUS -InitializeExceptions ( - IN EFI_CPU_ARCH_PROTOCOL *Cpu - ); - -EFI_STATUS -SyncCacheConfig ( - IN EFI_CPU_ARCH_PROTOCOL *CpuProtocol - ); - -/** - * Publish ARM Processor Data table in UEFI SYSTEM Table. - * @param HobStart Pointer to the beginning of the HOB List from PEI. - * - * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB. - * If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory - * and a pointer is assigned to it in ARM processor table. Then the ARM processor table is - * installed in EFI configuration table. -**/ -VOID -EFIAPI -PublishArmProcessorTable( - VOID - ); - -// The ARM Attributes might be defined on 64-bit (case of the long format description table) -UINT64 -EfiAttributeToArmAttribute ( - IN UINT64 EfiAttributes - ); - -EFI_STATUS -GetMemoryRegion ( - IN OUT UINTN *BaseAddress, - OUT UINTN *RegionLength, - OUT UINTN *RegionAttributes - ); - -VOID -GetRootTranslationTableInfo ( - IN UINTN T0SZ, - OUT UINTN *TableLevel, - OUT UINTN *TableEntryCount - ); - -EFI_STATUS -SetGcdMemorySpaceAttributes ( - IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap, - IN UINTN NumberOfDescriptors, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 Attributes - ); - -#endif // __CPU_DXE_ARM_EXCEPTION_H__ diff --git a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf b/ArmPkg/Drivers/CpuDxe/CpuDxe.inf deleted file mode 100644 index d068e06803..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuDxe.inf +++ /dev/null @@ -1,79 +0,0 @@ -#/** @file -# -# DXE CPU driver -# -# Copyright (c) 2009, Apple Inc. All rights reserved.
-# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCpuDxe - FILE_GUID = B8D9777E-D72A-451F-9BDB-BAFB52A68415 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = CpuDxeInitialize - -[Sources.Common] - CpuDxe.c - CpuDxe.h - CpuMpCore.c - CpuMmuCommon.c - Exception.c - -[Sources.ARM] - Arm/Mmu.c - -[Sources.AARCH64] - AArch64/Mmu.c - -[Packages] - ArmPkg/ArmPkg.dec - EmbeddedPkg/EmbeddedPkg.dec - MdePkg/MdePkg.dec - MdeModulePkg/MdeModulePkg.dec - -[LibraryClasses] - ArmLib - ArmMmuLib - BaseMemoryLib - CacheMaintenanceLib - CpuLib - CpuExceptionHandlerLib - DebugLib - DefaultExceptionHandlerLib - DxeServicesTableLib - HobLib - PeCoffGetEntryPointLib - UefiDriverEntryPoint - UefiLib - -[Protocols] - gEfiCpuArchProtocolGuid - gEfiDebugSupportPeriodicCallbackProtocolGuid - -[Guids] - gEfiDebugImageInfoTableGuid - gArmMpCoreInfoGuid - gIdleLoopEventGuid - gEfiVectorHandoffTableGuid - -[Pcd.common] - gArmTokenSpaceGuid.PcdVFPEnabled - -[FeaturePcd.common] - gArmTokenSpaceGuid.PcdCpuDxeProduceDebugSupport - gArmTokenSpaceGuid.PcdDebuggerExceptionSupport - -[Depex] - TRUE diff --git a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c b/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c deleted file mode 100644 index 8150486217..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c +++ /dev/null @@ -1,217 +0,0 @@ -/** @file -* -* Copyright (c) 2013, ARM Limited. All rights reserved. -* Copyright (c) 2017, Intel Corporation. All rights reserved.
-* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include "CpuDxe.h" - -/** - Searches memory descriptors covered by given memory range. - - This function searches into the Gcd Memory Space for descriptors - (from StartIndex to EndIndex) that contains the memory range - specified by BaseAddress and Length. - - @param MemorySpaceMap Gcd Memory Space Map as array. - @param NumberOfDescriptors Number of descriptors in map. - @param BaseAddress BaseAddress for the requested range. - @param Length Length for the requested range. - @param StartIndex Start index into the Gcd Memory Space Map. - @param EndIndex End index into the Gcd Memory Space Map. - - @retval EFI_SUCCESS Search successfully. - @retval EFI_NOT_FOUND The requested descriptors does not exist. - -**/ -EFI_STATUS -SearchGcdMemorySpaces ( - IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap, - IN UINTN NumberOfDescriptors, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - OUT UINTN *StartIndex, - OUT UINTN *EndIndex - ) -{ - UINTN Index; - - *StartIndex = 0; - *EndIndex = 0; - for (Index = 0; Index < NumberOfDescriptors; Index++) { - if ((BaseAddress >= MemorySpaceMap[Index].BaseAddress) && - (BaseAddress < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) { - *StartIndex = Index; - } - if (((BaseAddress + Length - 1) >= MemorySpaceMap[Index].BaseAddress) && - ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length))) { - *EndIndex = Index; - return EFI_SUCCESS; - } - } - return EFI_NOT_FOUND; -} - - -/** - Sets the attributes for a specified range in Gcd Memory Space Map. - - This function sets the attributes for a specified range in - Gcd Memory Space Map. - - @param MemorySpaceMap Gcd Memory Space Map as array - @param NumberOfDescriptors Number of descriptors in map - @param BaseAddress BaseAddress for the range - @param Length Length for the range - @param Attributes Attributes to set - - @retval EFI_SUCCESS Memory attributes set successfully - @retval EFI_NOT_FOUND The specified range does not exist in Gcd Memory Space - -**/ -EFI_STATUS -SetGcdMemorySpaceAttributes ( - IN EFI_GCD_MEMORY_SPACE_DESCRIPTOR *MemorySpaceMap, - IN UINTN NumberOfDescriptors, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 Attributes - ) -{ - EFI_STATUS Status; - UINTN Index; - UINTN StartIndex; - UINTN EndIndex; - EFI_PHYSICAL_ADDRESS RegionStart; - UINT64 RegionLength; - - DEBUG ((DEBUG_GCD, "SetGcdMemorySpaceAttributes[0x%lX; 0x%lX] = 0x%lX\n", - BaseAddress, BaseAddress + Length, Attributes)); - - // We do not support a smaller granularity than 4KB on ARM Architecture - if ((Length & EFI_PAGE_MASK) != 0) { - DEBUG ((DEBUG_WARN, - "Warning: We do not support smaller granularity than 4KB on ARM Architecture (passed length: 0x%lX).\n", - Length)); - } - - // - // Get all memory descriptors covered by the memory range - // - Status = SearchGcdMemorySpaces ( - MemorySpaceMap, - NumberOfDescriptors, - BaseAddress, - Length, - &StartIndex, - &EndIndex - ); - if (EFI_ERROR (Status)) { - return Status; - } - - // - // Go through all related descriptors and set attributes accordingly - // - for (Index = StartIndex; Index <= EndIndex; Index++) { - if (MemorySpaceMap[Index].GcdMemoryType == EfiGcdMemoryTypeNonExistent) { - continue; - } - // - // Calculate the start and end address of the overlapping range - // - if (BaseAddress >= MemorySpaceMap[Index].BaseAddress) { - RegionStart = BaseAddress; - } else { - RegionStart = MemorySpaceMap[Index].BaseAddress; - } - if ((BaseAddress + Length - 1) < (MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length)) { - RegionLength = BaseAddress + Length - RegionStart; - } else { - RegionLength = MemorySpaceMap[Index].BaseAddress + MemorySpaceMap[Index].Length - RegionStart; - } - // - // Set memory attributes according to MTRR attribute and the original attribute of descriptor - // - gDS->SetMemorySpaceAttributes ( - RegionStart, - RegionLength, - (MemorySpaceMap[Index].Attributes & ~EFI_MEMORY_CACHETYPE_MASK) | (MemorySpaceMap[Index].Capabilities & Attributes) - ); - } - - return EFI_SUCCESS; -} - -/** - This function modifies the attributes for the memory region specified by BaseAddress and - Length from their current attributes to the attributes specified by Attributes. - - @param This The EFI_CPU_ARCH_PROTOCOL instance. - @param BaseAddress The physical address that is the start address of a memory region. - @param Length The size in bytes of the memory region. - @param Attributes The bit mask of attributes to set for the memory region. - - @retval EFI_SUCCESS The attributes were set for the memory region. - @retval EFI_ACCESS_DENIED The attributes for the memory resource range specified by - BaseAddress and Length cannot be modified. - @retval EFI_INVALID_PARAMETER Length is zero. - @retval EFI_OUT_OF_RESOURCES There are not enough system resources to modify the attributes of - the memory resource range. - @retval EFI_UNSUPPORTED The processor does not support one or more bytes of the memory - resource range specified by BaseAddress and Length. - The bit mask of attributes is not support for the memory resource - range specified by BaseAddress and Length. - -**/ -EFI_STATUS -EFIAPI -CpuSetMemoryAttributes ( - IN EFI_CPU_ARCH_PROTOCOL *This, - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 EfiAttributes - ) -{ - EFI_STATUS Status; - UINTN ArmAttributes; - UINTN RegionBaseAddress; - UINTN RegionLength; - UINTN RegionArmAttributes; - - if (mIsFlushingGCD) { - return EFI_SUCCESS; - } - - if ((BaseAddress & (SIZE_4KB - 1)) != 0) { - // Minimum granularity is SIZE_4KB (4KB on ARM) - DEBUG ((EFI_D_PAGE, "CpuSetMemoryAttributes(%lx, %lx, %lx): Minimum ganularity is SIZE_4KB\n", BaseAddress, Length, EfiAttributes)); - return EFI_UNSUPPORTED; - } - - // Convert the 'Attribute' into ARM Attribute - ArmAttributes = EfiAttributeToArmAttribute (EfiAttributes); - - // Get the region starting from 'BaseAddress' and its 'Attribute' - RegionBaseAddress = BaseAddress; - Status = GetMemoryRegion (&RegionBaseAddress, &RegionLength, &RegionArmAttributes); - - // Data & Instruction Caches are flushed when we set new memory attributes. - // So, we only set the attributes if the new region is different. - if (EFI_ERROR (Status) || (RegionArmAttributes != ArmAttributes) || - ((BaseAddress + Length) > (RegionBaseAddress + RegionLength))) - { - return ArmSetMemoryAttributes (BaseAddress, Length, EfiAttributes); - } else { - return EFI_SUCCESS; - } -} diff --git a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c b/ArmPkg/Drivers/CpuDxe/CpuMpCore.c deleted file mode 100644 index 81d858ea25..0000000000 --- a/ArmPkg/Drivers/CpuDxe/CpuMpCore.c +++ /dev/null @@ -1,103 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include -#include -#include -#include -#include - -#include - -ARM_PROCESSOR_TABLE mArmProcessorTableTemplate = { - { - EFI_ARM_PROCESSOR_TABLE_SIGNATURE, - 0, - EFI_ARM_PROCESSOR_TABLE_REVISION, - EFI_ARM_PROCESSOR_TABLE_OEM_ID, - EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID, - EFI_ARM_PROCESSOR_TABLE_OEM_REVISION, - EFI_ARM_PROCESSOR_TABLE_CREATOR_ID, - EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION, - { 0 }, - 0 - }, //ARM Processor table header - 0, // Number of entries in ARM processor Table - NULL // ARM Processor Table -}; - -/** Publish ARM Processor Data table in UEFI SYSTEM Table. - * @param: HobStart Pointer to the beginning of the HOB List from PEI. - * - * Description : This function iterates through HOB list and finds ARM processor Table Entry HOB. - * If the ARM processor Table Entry HOB is found, the HOB data is copied to run-time memory - * and a pointer is assigned to it in ARM processor table. Then the ARM processor table is - * installed in EFI configuration table. -**/ -VOID -EFIAPI -PublishArmProcessorTable ( - VOID - ) -{ - EFI_PEI_HOB_POINTERS Hob; - - Hob.Raw = GetHobList (); - - // Iterate through the HOBs and find if there is ARM PROCESSOR ENTRY HOB - for (; !END_OF_HOB_LIST(Hob); Hob.Raw = GET_NEXT_HOB(Hob)) { - // Check for Correct HOB type - if ((GET_HOB_TYPE (Hob)) == EFI_HOB_TYPE_GUID_EXTENSION) { - // Check for correct GUID type - if (CompareGuid(&(Hob.Guid->Name), &gArmMpCoreInfoGuid)) { - ARM_PROCESSOR_TABLE *ArmProcessorTable; - EFI_STATUS Status; - - // Allocate Runtime memory for ARM processor table - ArmProcessorTable = (ARM_PROCESSOR_TABLE*)AllocateRuntimePool(sizeof(ARM_PROCESSOR_TABLE)); - - // Check if the memory allocation is succesful or not - ASSERT(NULL != ArmProcessorTable); - - // Set ARM processor table to default values - CopyMem(ArmProcessorTable,&mArmProcessorTableTemplate,sizeof(ARM_PROCESSOR_TABLE)); - - // Fill in Length fields of ARM processor table - ArmProcessorTable->Header.Length = sizeof(ARM_PROCESSOR_TABLE); - ArmProcessorTable->Header.DataLen = GET_GUID_HOB_DATA_SIZE(Hob); - - // Fill in Identifier(ARM processor table GUID) - ArmProcessorTable->Header.Identifier = gArmMpCoreInfoGuid; - - // Set Number of ARM core entries in the Table - ArmProcessorTable->NumberOfEntries = GET_GUID_HOB_DATA_SIZE(Hob)/sizeof(ARM_CORE_INFO); - - // Allocate runtime memory for ARM processor Table entries - ArmProcessorTable->ArmCpus = (ARM_CORE_INFO*)AllocateRuntimePool ( - ArmProcessorTable->NumberOfEntries * sizeof(ARM_CORE_INFO)); - - // Check if the memory allocation is succesful or not - ASSERT(NULL != ArmProcessorTable->ArmCpus); - - // Copy ARM Processor Table data from HOB list to newly allocated memory - CopyMem(ArmProcessorTable->ArmCpus,GET_GUID_HOB_DATA(Hob), ArmProcessorTable->Header.DataLen); - - // Install the ARM Processor table into EFI system configuration table - Status = gBS->InstallConfigurationTable (&gArmMpCoreInfoGuid, ArmProcessorTable); - - ASSERT_EFI_ERROR (Status); - } - } - } -} diff --git a/ArmPkg/Drivers/CpuDxe/Exception.c b/ArmPkg/Drivers/CpuDxe/Exception.c deleted file mode 100644 index d806a5fdf9..0000000000 --- a/ArmPkg/Drivers/CpuDxe/Exception.c +++ /dev/null @@ -1,104 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Portions Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include "CpuDxe.h" -#include -#include - -EFI_STATUS -InitializeExceptions ( - IN EFI_CPU_ARCH_PROTOCOL *Cpu - ) { - EFI_STATUS Status; - EFI_VECTOR_HANDOFF_INFO *VectorInfoList; - EFI_VECTOR_HANDOFF_INFO *VectorInfo; - BOOLEAN IrqEnabled; - BOOLEAN FiqEnabled; - - VectorInfo = (EFI_VECTOR_HANDOFF_INFO *)NULL; - Status = EfiGetSystemConfigurationTable(&gEfiVectorHandoffTableGuid, (VOID **)&VectorInfoList); - if (Status == EFI_SUCCESS && VectorInfoList != NULL) { - VectorInfo = VectorInfoList; - } - - // intialize the CpuExceptionHandlerLib so we take over the exception vector table from the DXE Core - InitializeCpuExceptionHandlers(VectorInfo); - - Status = EFI_SUCCESS; - - // - // Disable interrupts - // - Cpu->GetInterruptState (Cpu, &IrqEnabled); - Cpu->DisableInterrupt (Cpu); - - // - // EFI does not use the FIQ, but a debugger might so we must disable - // as we take over the exception vectors. - // - FiqEnabled = ArmGetFiqState (); - ArmDisableFiq (); - - if (FiqEnabled) { - ArmEnableFiq (); - } - - if (IrqEnabled) { - // - // Restore interrupt state - // - Status = Cpu->EnableInterrupt (Cpu); - } - - // - // On a DEBUG build, unmask SErrors so they are delivered right away rather - // than when the OS unmasks them. This gives us a better chance of figuring - // out the cause. - // - DEBUG_CODE ( - ArmEnableAsynchronousAbort (); - ); - - return Status; -} - -/** -This function registers and enables the handler specified by InterruptHandler for a processor -interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the -handler for the processor interrupt or exception type specified by InterruptType is uninstalled. -The installed handler is called once for each processor interrupt or exception. - -@param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts -are enabled and FALSE if interrupts are disabled. -@param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called -when a processor interrupt occurs. If this parameter is NULL, then the handler -will be uninstalled. - -@retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled. -@retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was -previously installed. -@retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not -previously installed. -@retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported. - -**/ -EFI_STATUS -RegisterInterruptHandler( - IN EFI_EXCEPTION_TYPE InterruptType, - IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler - ) { - // pass down to CpuExceptionHandlerLib - return (EFI_STATUS)RegisterCpuInterruptHandler(InterruptType, InterruptHandler); -} diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.c b/ArmPkg/Drivers/CpuPei/CpuPei.c deleted file mode 100644 index d54f42acfc..0000000000 --- a/ArmPkg/Drivers/CpuPei/CpuPei.c +++ /dev/null @@ -1,91 +0,0 @@ -/**@file - -Copyright (c) 2006, Intel Corporation. All rights reserved.
-Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.
-Copyright (c) 2011-2013, ARM Limited. All rights reserved.
- -This program and the accompanying materials -are licensed and made available under the terms and conditions of the BSD License -which accompanies this distribution. The full text of the license may be found at -http://opensource.org/licenses/bsd-license.php - -THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -Module Name: - - MemoryInit.c - -Abstract: - - PEIM to provide fake memory init - -**/ - - - -// -// The package level header files this module uses -// -#include -// -// The protocols, PPI and GUID defintions for this module -// -#include - -// -// The Library classes this module consumes -// -#include -#include -#include -#include -#include -#include - -/*++ - -Routine Description: - -Arguments: - - FileHandle - Handle of the file being invoked. - PeiServices - Describes the list of possible PEI Services. - -Returns: - - Status - EFI_SUCCESS if the boot mode could be set - ---*/ -EFI_STATUS -EFIAPI -InitializeCpuPeim ( - IN EFI_PEI_FILE_HANDLE FileHandle, - IN CONST EFI_PEI_SERVICES **PeiServices - ) -{ - EFI_STATUS Status; - ARM_MP_CORE_INFO_PPI *ArmMpCoreInfoPpi; - UINTN ArmCoreCount; - ARM_CORE_INFO *ArmCoreInfoTable; - - // Enable program flow prediction, if supported. - ArmEnableBranchPrediction (); - - // Publish the CPU memory and io spaces sizes - BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize)); - - // Only MP Core platform need to produce gArmMpCoreInfoPpiGuid - Status = PeiServicesLocatePpi (&gArmMpCoreInfoPpiGuid, 0, NULL, (VOID**)&ArmMpCoreInfoPpi); - if (!EFI_ERROR(Status)) { - // Build the MP Core Info Table - ArmCoreCount = 0; - Status = ArmMpCoreInfoPpi->GetMpCoreInfo (&ArmCoreCount, &ArmCoreInfoTable); - if (!EFI_ERROR(Status) && (ArmCoreCount > 0)) { - // Build MPCore Info HOB - BuildGuidDataHob (&gArmMpCoreInfoGuid, ArmCoreInfoTable, sizeof (ARM_CORE_INFO) * ArmCoreCount); - } - } - - return EFI_SUCCESS; -} diff --git a/ArmPkg/Drivers/CpuPei/CpuPei.inf b/ArmPkg/Drivers/CpuPei/CpuPei.inf deleted file mode 100644 index eafccd6009..0000000000 --- a/ArmPkg/Drivers/CpuPei/CpuPei.inf +++ /dev/null @@ -1,58 +0,0 @@ -## @file -# Component description file for BootMode module -# -# This module provides platform specific function to detect boot mode. -# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -## - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = CpuPei - FILE_GUID = 2FD8B7AD-F8FA-4021-9FC0-0AA572147CDC - MODULE_TYPE = PEIM - VERSION_STRING = 1.0 - - ENTRY_POINT = InitializeCpuPeim - -# -# The following information is for reference only and not required by the build tools. -# -# VALID_ARCHITECTURES = ARM -# - -[Sources] - CpuPei.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - PeimEntryPoint - DebugLib - HobLib - ArmLib - -[Ppis] - gArmMpCoreInfoPpiGuid - -[Guids] - gArmMpCoreInfoGuid - -[FixedPcd] - gEmbeddedTokenSpaceGuid.PcdPrePiCpuMemorySize - gEmbeddedTokenSpaceGuid.PcdPrePiCpuIoSize - -[Depex] - gEfiPeiMemoryDiscoveredPpiGuid - diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h deleted file mode 100644 index 9e2aebcfd5..0000000000 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdog.h +++ /dev/null @@ -1,29 +0,0 @@ -/** @file -* -* Copyright (c) 2013-2017, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD -* License which accompanies this distribution. The full text of the license -* may be found at http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ -#ifndef __GENERIC_WATCHDOG_H__ -#define __GENERIC_WATCHDOG_H__ - -// Refresh Frame: -#define GENERIC_WDOG_REFRESH_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogRefreshBase) + 0x000) - -// Control Frame: -#define GENERIC_WDOG_CONTROL_STATUS_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x000) -#define GENERIC_WDOG_OFFSET_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x008) -#define GENERIC_WDOG_COMPARE_VALUE_REG ((UINTN)FixedPcdGet64 (PcdGenericWatchdogControlBase) + 0x010) - -// Values of bit 0 of the Control/Status Register -#define GENERIC_WDOG_ENABLED 1 -#define GENERIC_WDOG_DISABLED 0 - -#endif // __GENERIC_WATCHDOG_H__ diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c deleted file mode 100644 index 54a1625a32..0000000000 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.c +++ /dev/null @@ -1,354 +0,0 @@ -/** @file -* -* Copyright (c) 2013-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD -* License which accompanies this distribution. The full text of the license -* may be found at http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "GenericWatchdog.h" - -// The number of 100ns periods (the unit of time passed to these functions) -// in a second -#define TIME_UNITS_PER_SECOND 10000000 - -// Tick frequency of the generic timer that is the basis of the generic watchdog -UINTN mTimerFrequencyHz = 0; - -// In cases where the compare register was set manually, information about -// how long the watchdog was asked to wait cannot be retrieved from hardware. -// It is therefore stored here. 0 means the timer is not running. -UINT64 mNumTimerTicks = 0; - -EFI_HARDWARE_INTERRUPT_PROTOCOL *mInterruptProtocol; - -EFI_STATUS -WatchdogWriteOffsetRegister ( - UINT32 Value - ) -{ - return MmioWrite32 (GENERIC_WDOG_OFFSET_REG, Value); -} - -EFI_STATUS -WatchdogWriteCompareRegister ( - UINT64 Value - ) -{ - return MmioWrite64 (GENERIC_WDOG_COMPARE_VALUE_REG, Value); -} - -EFI_STATUS -WatchdogEnable ( - VOID - ) -{ - return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_ENABLED); -} - -EFI_STATUS -WatchdogDisable ( - VOID - ) -{ - return MmioWrite32 (GENERIC_WDOG_CONTROL_STATUS_REG, GENERIC_WDOG_DISABLED); -} - -/** - On exiting boot services we must make sure the Watchdog Timer - is stopped. -**/ -VOID -EFIAPI -WatchdogExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - WatchdogDisable (); - mNumTimerTicks = 0; -} - -/* - This function is called when the watchdog's first signal (WS0) goes high. - It uses the ResetSystem Runtime Service to reset the board. -*/ -VOID -EFIAPI -WatchdogInterruptHandler ( - IN HARDWARE_INTERRUPT_SOURCE Source, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - STATIC CONST CHAR16 ResetString[] = L"The generic watchdog timer ran out."; - - WatchdogDisable (); - - mInterruptProtocol->EndOfInterrupt (mInterruptProtocol, Source); - - gRT->ResetSystem ( - EfiResetCold, - EFI_TIMEOUT, - StrSize (ResetString), - (VOID *) &ResetString - ); - - // If we got here then the reset didn't work - ASSERT (FALSE); -} - -/** - This function registers the handler NotifyFunction so it is called every time - the watchdog timer expires. It also passes the amount of time since the last - handler call to the NotifyFunction. - If NotifyFunction is not NULL and a handler is not already registered, - then the new handler is registered and EFI_SUCCESS is returned. - If NotifyFunction is NULL, and a handler is already registered, - then that handler is unregistered. - If an attempt is made to register a handler when a handler is already registered, - then EFI_ALREADY_STARTED is returned. - If an attempt is made to unregister a handler when a handler is not registered, - then EFI_INVALID_PARAMETER is returned. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param NotifyFunction The function to call when a timer interrupt fires. - This function executes at TPL_HIGH_LEVEL. The DXE - Core will register a handler for the timer interrupt, - so it can know how much time has passed. This - information is used to signal timer based events. - NULL will unregister the handler. - - @retval EFI_SUCCESS The watchdog timer handler was registered. - @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already - registered. - @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not - previously registered. - -**/ -EFI_STATUS -EFIAPI -WatchdogRegisterHandler ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, - IN EFI_WATCHDOG_TIMER_NOTIFY NotifyFunction - ) -{ - // ERROR: This function is not supported. - // The watchdog will reset the board - return EFI_UNSUPPORTED; -} - -/** - This function sets the amount of time to wait before firing the watchdog - timer to TimerPeriod 100 nS units. If TimerPeriod is 0, then the watchdog - timer is disabled. - - @param This The EFI_WATCHDOG_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod The amount of time in 100 nS units to wait before the watchdog - timer is fired. If TimerPeriod is zero, then the watchdog - timer is disabled. - - @retval EFI_SUCCESS The watchdog timer has been programmed to fire in Time - 100 nS units. - @retval EFI_DEVICE_ERROR A watchdog timer could not be programmed due to a device - error. - -**/ -EFI_STATUS -EFIAPI -WatchdogSetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, - IN UINT64 TimerPeriod // In 100ns units - ) -{ - UINTN SystemCount; - EFI_STATUS Status; - - // if TimerPerdiod is 0, this is a request to stop the watchdog. - if (TimerPeriod == 0) { - mNumTimerTicks = 0; - return WatchdogDisable (); - } - - // Work out how many timer ticks will equate to TimerPeriod - mNumTimerTicks = (mTimerFrequencyHz * TimerPeriod) / TIME_UNITS_PER_SECOND; - - // - // If the number of required ticks is greater than the max number the - // watchdog's offset register (WOR) can hold, we need to manually compute and - // set the compare register (WCV) - // - if (mNumTimerTicks > MAX_UINT32) { - // - // We need to enable the watchdog *before* writing to the compare register, - // because enabling the watchdog causes an "explicit refresh", which - // clobbers the compare register (WCV). In order to make sure this doesn't - // trigger an interrupt, set the offset to max. - // - Status = WatchdogWriteOffsetRegister (MAX_UINT32); - if (EFI_ERROR (Status)) { - return Status; - } - WatchdogEnable (); - SystemCount = ArmGenericTimerGetSystemCount (); - Status = WatchdogWriteCompareRegister (SystemCount + mNumTimerTicks); - } else { - Status = WatchdogWriteOffsetRegister ((UINT32)mNumTimerTicks); - WatchdogEnable (); - } - - return Status; -} - -/** - This function retrieves the period of timer interrupts in 100 ns units, - returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod - is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is - returned, then the timer is currently disabled. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod A pointer to the timer period to retrieve in 100 - ns units. If 0 is returned, then the timer is - currently disabled. - - - @retval EFI_SUCCESS The timer period was returned in TimerPeriod. - @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. - -**/ -EFI_STATUS -EFIAPI -WatchdogGetTimerPeriod ( - IN CONST EFI_WATCHDOG_TIMER_ARCH_PROTOCOL *This, - OUT UINT64 *TimerPeriod - ) -{ - if (TimerPeriod == NULL) { - return EFI_INVALID_PARAMETER; - } - - *TimerPeriod = ((TIME_UNITS_PER_SECOND / mTimerFrequencyHz) * mNumTimerTicks); - - return EFI_SUCCESS; -} - -/** - Interface structure for the Watchdog Architectural Protocol. - - @par Protocol Description: - This protocol provides a service to set the amount of time to wait - before firing the watchdog timer, and it also provides a service to - register a handler that is invoked when the watchdog timer fires. - - @par When the watchdog timer fires, control will be passed to a handler - if one has been registered. If no handler has been registered, - or the registered handler returns, then the system will be - reset by calling the Runtime Service ResetSystem(). - - @param RegisterHandler - Registers a handler that will be called each time the - watchdogtimer interrupt fires. TimerPeriod defines the minimum - time between timer interrupts, so TimerPeriod will also - be the minimum time between calls to the registered - handler. - NOTE: If the watchdog resets the system in hardware, then - this function will not have any chance of executing. - - @param SetTimerPeriod - Sets the period of the timer interrupt in 100 nS units. - This function is optional, and may return EFI_UNSUPPORTED. - If this function is supported, then the timer period will - be rounded up to the nearest supported timer period. - - @param GetTimerPeriod - Retrieves the period of the timer interrupt in 100 nS units. - -**/ -EFI_WATCHDOG_TIMER_ARCH_PROTOCOL gWatchdogTimer = { - (EFI_WATCHDOG_TIMER_REGISTER_HANDLER) WatchdogRegisterHandler, - (EFI_WATCHDOG_TIMER_SET_TIMER_PERIOD) WatchdogSetTimerPeriod, - (EFI_WATCHDOG_TIMER_GET_TIMER_PERIOD) WatchdogGetTimerPeriod -}; - -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; - -EFI_STATUS -EFIAPI -GenericWatchdogEntry ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - EFI_HANDLE Handle; - - // - // Make sure the Watchdog Timer Architectural Protocol has not been installed - // in the system yet. - // This will avoid conflicts with the universal watchdog - // - ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gEfiWatchdogTimerArchProtocolGuid); - - mTimerFrequencyHz = ArmGenericTimerGetTimerFreq (); - ASSERT (mTimerFrequencyHz != 0); - - // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent ( - EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, - WatchdogExitBootServicesEvent, NULL, &EfiExitBootServicesEvent - ); - if (!EFI_ERROR (Status)) { - // Install interrupt handler - Status = gBS->LocateProtocol ( - &gHardwareInterruptProtocolGuid, - NULL, - (VOID **)&mInterruptProtocol - ); - if (!EFI_ERROR (Status)) { - Status = mInterruptProtocol->RegisterInterruptSource ( - mInterruptProtocol, - FixedPcdGet32 (PcdGenericWatchdogEl2IntrNum), - WatchdogInterruptHandler - ); - if (!EFI_ERROR (Status)) { - // Install the Timer Architectural Protocol onto a new handle - Handle = NULL; - Status = gBS->InstallMultipleProtocolInterfaces ( - &Handle, - &gEfiWatchdogTimerArchProtocolGuid, &gWatchdogTimer, - NULL - ); - } - } - } - - if (EFI_ERROR (Status)) { - // The watchdog failed to initialize - ASSERT (FALSE); - } - - mNumTimerTicks = 0; - WatchdogDisable (); - - return Status; -} diff --git a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf b/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf deleted file mode 100644 index fece14cc18..0000000000 --- a/ArmPkg/Drivers/GenericWatchdogDxe/GenericWatchdogDxe.inf +++ /dev/null @@ -1,53 +0,0 @@ -# -# Copyright (c) 2013-2014, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# - -[Defines] - INF_VERSION = 0x00010016 - BASE_NAME = GenericWatchdogDxe - FILE_GUID = 0619f5c2-4858-4caa-a86a-73a21a18df6b - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = GenericWatchdogEntry - -[Sources.common] - GenericWatchdogDxe.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - ArmGenericTimerCounterLib - BaseLib - BaseMemoryLib - DebugLib - IoLib - PcdLib - UefiLib - UefiBootServicesTableLib - UefiDriverEntryPoint - UefiRuntimeServicesTableLib - -[Pcd.common] - gArmTokenSpaceGuid.PcdGenericWatchdogControlBase - gArmTokenSpaceGuid.PcdGenericWatchdogRefreshBase - gArmTokenSpaceGuid.PcdGenericWatchdogEl2IntrNum - -[Protocols] - gEfiWatchdogTimerArchProtocolGuid - gHardwareInterruptProtocolGuid - -[Depex] - gHardwareInterruptProtocolGuid diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.c b/ArmPkg/Drivers/TimerDxe/TimerDxe.c deleted file mode 100644 index 2416c90f55..0000000000 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.c +++ /dev/null @@ -1,435 +0,0 @@ -/** @file - Timer Architecture Protocol driver of the ARM flavor - - Copyright (c) 2011-2013 ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#include - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -// The notification function to call on every timer interrupt. -EFI_TIMER_NOTIFY mTimerNotifyFunction = (EFI_TIMER_NOTIFY)NULL; -EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL; - -// The current period of the timer interrupt -UINT64 mTimerPeriod = 0; -// The latest Timer Tick calculated for mTimerPeriod -UINT64 mTimerTicks = 0; -// Number of elapsed period since the last Timer interrupt -UINT64 mElapsedPeriod = 1; - -// Cached copy of the Hardware Interrupt protocol instance -EFI_HARDWARE_INTERRUPT_PROTOCOL *gInterrupt = NULL; - -/** - This function registers the handler NotifyFunction so it is called every time - the timer interrupt fires. It also passes the amount of time since the last - handler call to the NotifyFunction. If NotifyFunction is NULL, then the - handler is unregistered. If the handler is registered, then EFI_SUCCESS is - returned. If the CPU does not support registering a timer interrupt handler, - then EFI_UNSUPPORTED is returned. If an attempt is made to register a handler - when a handler is already registered, then EFI_ALREADY_STARTED is returned. - If an attempt is made to unregister a handler when a handler is not registered, - then EFI_INVALID_PARAMETER is returned. If an error occurs attempting to - register the NotifyFunction with the timer interrupt, then EFI_DEVICE_ERROR - is returned. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param NotifyFunction The function to call when a timer interrupt fires. This - function executes at TPL_HIGH_LEVEL. The DXE Core will - register a handler for the timer interrupt, so it can know - how much time has passed. This information is used to - signal timer based events. NULL will unregister the handler. - @retval EFI_SUCCESS The timer handler was registered. - @retval EFI_UNSUPPORTED The platform does not support timer interrupts. - @retval EFI_ALREADY_STARTED NotifyFunction is not NULL, and a handler is already - registered. - @retval EFI_INVALID_PARAMETER NotifyFunction is NULL, and a handler was not - previously registered. - @retval EFI_DEVICE_ERROR The timer handler could not be registered. - -**/ -EFI_STATUS -EFIAPI -TimerDriverRegisterHandler ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN EFI_TIMER_NOTIFY NotifyFunction - ) -{ - if ((NotifyFunction == NULL) && (mTimerNotifyFunction == NULL)) { - return EFI_INVALID_PARAMETER; - } - - if ((NotifyFunction != NULL) && (mTimerNotifyFunction != NULL)) { - return EFI_ALREADY_STARTED; - } - - mTimerNotifyFunction = NotifyFunction; - - return EFI_SUCCESS; -} - -/** - Disable the timer -**/ -VOID -EFIAPI -ExitBootServicesEvent ( - IN EFI_EVENT Event, - IN VOID *Context - ) -{ - ArmGenericTimerDisableTimer (); -} - -/** - - This function adjusts the period of timer interrupts to the value specified - by TimerPeriod. If the timer period is updated, then the selected timer - period is stored in EFI_TIMER.TimerPeriod, and EFI_SUCCESS is returned. If - the timer hardware is not programmable, then EFI_UNSUPPORTED is returned. - If an error occurs while attempting to update the timer period, then the - timer hardware will be put back in its state prior to this call, and - EFI_DEVICE_ERROR is returned. If TimerPeriod is 0, then the timer interrupt - is disabled. This is not the same as disabling the CPU's interrupts. - Instead, it must either turn off the timer hardware, or it must adjust the - interrupt controller so that a CPU interrupt is not generated when the timer - interrupt fires. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod The rate to program the timer interrupt in 100 nS units. If - the timer hardware is not programmable, then EFI_UNSUPPORTED is - returned. If the timer is programmable, then the timer period - will be rounded up to the nearest timer period that is supported - by the timer hardware. If TimerPeriod is set to 0, then the - timer interrupts will be disabled. - - - @retval EFI_SUCCESS The timer period was changed. - @retval EFI_UNSUPPORTED The platform cannot change the period of the timer interrupt. - @retval EFI_DEVICE_ERROR The timer period could not be changed due to a device error. - -**/ -EFI_STATUS -EFIAPI -TimerDriverSetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - IN UINT64 TimerPeriod - ) -{ - UINT64 CounterValue; - UINT64 TimerTicks; - EFI_TPL OriginalTPL; - - // Always disable the timer - ArmGenericTimerDisableTimer (); - - if (TimerPeriod != 0) { - // mTimerTicks = TimerPeriod in 1ms unit x Frequency.10^-3 - // = TimerPeriod.10^-4 x Frequency.10^-3 - // = (TimerPeriod x Frequency) x 10^-7 - TimerTicks = MultU64x32 (TimerPeriod, ArmGenericTimerGetTimerFreq ()); - TimerTicks = DivU64x32 (TimerTicks, 10000000U); - - // Raise TPL to update the mTimerTicks and mTimerPeriod to ensure these values - // are coherent in the interrupt handler - OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); - - mTimerTicks = TimerTicks; - mTimerPeriod = TimerPeriod; - mElapsedPeriod = 1; - - gBS->RestoreTPL (OriginalTPL); - - // Get value of the current timer - CounterValue = ArmGenericTimerGetSystemCount (); - // Set the interrupt in Current Time + mTimerTick - ArmGenericTimerSetCompareVal (CounterValue + mTimerTicks); - - // Enable the timer - ArmGenericTimerEnableTimer (); - } else { - // Save the new timer period - mTimerPeriod = TimerPeriod; - // Reset the elapsed period - mElapsedPeriod = 1; - } - - return EFI_SUCCESS; -} - -/** - This function retrieves the period of timer interrupts in 100 ns units, - returns that value in TimerPeriod, and returns EFI_SUCCESS. If TimerPeriod - is NULL, then EFI_INVALID_PARAMETER is returned. If a TimerPeriod of 0 is - returned, then the timer is currently disabled. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - @param TimerPeriod A pointer to the timer period to retrieve in 100 ns units. If - 0 is returned, then the timer is currently disabled. - - - @retval EFI_SUCCESS The timer period was returned in TimerPeriod. - @retval EFI_INVALID_PARAMETER TimerPeriod is NULL. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGetTimerPeriod ( - IN EFI_TIMER_ARCH_PROTOCOL *This, - OUT UINT64 *TimerPeriod - ) -{ - if (TimerPeriod == NULL) { - return EFI_INVALID_PARAMETER; - } - - *TimerPeriod = mTimerPeriod; - return EFI_SUCCESS; -} - -/** - This function generates a soft timer interrupt. If the platform does not support soft - timer interrupts, then EFI_UNSUPPORTED is returned. Otherwise, EFI_SUCCESS is returned. - If a handler has been registered through the EFI_TIMER_ARCH_PROTOCOL.RegisterHandler() - service, then a soft timer interrupt will be generated. If the timer interrupt is - enabled when this service is called, then the registered handler will be invoked. The - registered handler should not be able to distinguish a hardware-generated timer - interrupt from a software-generated timer interrupt. - - @param This The EFI_TIMER_ARCH_PROTOCOL instance. - - @retval EFI_SUCCESS The soft timer interrupt was generated. - @retval EFI_UNSUPPORTED The platform does not support the generation of soft timer interrupts. - -**/ -EFI_STATUS -EFIAPI -TimerDriverGenerateSoftInterrupt ( - IN EFI_TIMER_ARCH_PROTOCOL *This - ) -{ - return EFI_UNSUPPORTED; -} - -/** - Interface structure for the Timer Architectural Protocol. - - @par Protocol Description: - This protocol provides the services to initialize a periodic timer - interrupt, and to register a handler that is called each time the timer - interrupt fires. It may also provide a service to adjust the rate of the - periodic timer interrupt. When a timer interrupt occurs, the handler is - passed the amount of time that has passed since the previous timer - interrupt. - - @param RegisterHandler - Registers a handler that will be called each time the - timer interrupt fires. TimerPeriod defines the minimum - time between timer interrupts, so TimerPeriod will also - be the minimum time between calls to the registered - handler. - - @param SetTimerPeriod - Sets the period of the timer interrupt in 100 nS units. - This function is optional, and may return EFI_UNSUPPORTED. - If this function is supported, then the timer period will - be rounded up to the nearest supported timer period. - - - @param GetTimerPeriod - Retrieves the period of the timer interrupt in 100 nS units. - - @param GenerateSoftInterrupt - Generates a soft timer interrupt that simulates the firing of - the timer interrupt. This service can be used to invoke the registered handler if the timer interrupt has been masked for - a period of time. - -**/ -EFI_TIMER_ARCH_PROTOCOL gTimer = { - TimerDriverRegisterHandler, - TimerDriverSetTimerPeriod, - TimerDriverGetTimerPeriod, - TimerDriverGenerateSoftInterrupt -}; - -/** - - C Interrupt Handler called in the interrupt context when Source interrupt is active. - - - @param Source Source of the interrupt. Hardware routing off a specific platform defines - what source means. - - @param SystemContext Pointer to system register context. Mostly used by debuggers and will - update the system context after the return from the interrupt if - modified. Don't change these values unless you know what you are doing - -**/ -VOID -EFIAPI -TimerInterruptHandler ( - IN HARDWARE_INTERRUPT_SOURCE Source, - IN EFI_SYSTEM_CONTEXT SystemContext - ) -{ - EFI_TPL OriginalTPL; - UINT64 CurrentValue; - UINT64 CompareValue; - - // - // DXE core uses this callback for the EFI timer tick. The DXE core uses locks - // that raise to TPL_HIGH and then restore back to current level. Thus we need - // to make sure TPL level is set to TPL_HIGH while we are handling the timer tick. - // - OriginalTPL = gBS->RaiseTPL (TPL_HIGH_LEVEL); - - // Check if the timer interrupt is active - if ((ArmGenericTimerGetTimerCtrlReg () ) & ARM_ARCH_TIMER_ISTATUS) { - - // Signal end of interrupt early to help avoid losing subsequent ticks from long duration handlers - gInterrupt->EndOfInterrupt (gInterrupt, Source); - - if (mTimerNotifyFunction) { - mTimerNotifyFunction (mTimerPeriod * mElapsedPeriod); - } - - // - // Reload the Timer - // - - // Get current counter value - CurrentValue = ArmGenericTimerGetSystemCount (); - // Get the counter value to compare with - CompareValue = ArmGenericTimerGetCompareVal (); - - // This loop is needed in case we missed interrupts (eg: case when the interrupt handling - // has taken longer than mTickPeriod). - // Note: Physical Counter is counting up - mElapsedPeriod = 0; - do { - CompareValue += mTimerTicks; - mElapsedPeriod++; - } while (CompareValue < CurrentValue); - - // Set next compare value - ArmGenericTimerSetCompareVal (CompareValue); - ArmGenericTimerEnableTimer (); - } - - // Enable timer interrupts - gInterrupt->EnableInterruptSource (gInterrupt, Source); - - gBS->RestoreTPL (OriginalTPL); -} - - -/** - Initialize the state information for the Timer Architectural Protocol and - the Timer Debug support protocol that allows the debugger to break into a - running program. - - @param ImageHandle of the loaded driver - @param SystemTable Pointer to the System Table - - @retval EFI_SUCCESS Protocol registered - @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure - @retval EFI_DEVICE_ERROR Hardware problems - -**/ -EFI_STATUS -EFIAPI -TimerInitialize ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_HANDLE Handle = NULL; - EFI_STATUS Status; - UINTN TimerCtrlReg; - UINT32 TimerHypIntrNum; - - if (ArmIsArchTimerImplemented () == 0) { - DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence cann't use this Driver \n")); - ASSERT (0); - } - - // Find the interrupt controller protocol. ASSERT if not found. - Status = gBS->LocateProtocol (&gHardwareInterruptProtocolGuid, NULL, (VOID **)&gInterrupt); - ASSERT_EFI_ERROR (Status); - - // Disable the timer - TimerCtrlReg = ArmGenericTimerGetTimerCtrlReg (); - TimerCtrlReg |= ARM_ARCH_TIMER_IMASK; - TimerCtrlReg &= ~ARM_ARCH_TIMER_ENABLE; - ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg); - Status = TimerDriverSetTimerPeriod (&gTimer, 0); - ASSERT_EFI_ERROR (Status); - - // Install secure and Non-secure interrupt handlers - // Note: Because it is not possible to determine the security state of the - // CPU dynamically, we just install interrupt handler for both sec and non-sec - // timer PPI - Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerVirtIntrNum), TimerInterruptHandler); - ASSERT_EFI_ERROR (Status); - - // - // The hypervisor timer interrupt may be omitted by implementations that - // execute under virtualization. - // - TimerHypIntrNum = PcdGet32 (PcdArmArchTimerHypIntrNum); - if (TimerHypIntrNum != 0) { - Status = gInterrupt->RegisterInterruptSource (gInterrupt, TimerHypIntrNum, TimerInterruptHandler); - ASSERT_EFI_ERROR (Status); - } - - Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerSecIntrNum), TimerInterruptHandler); - ASSERT_EFI_ERROR (Status); - - Status = gInterrupt->RegisterInterruptSource (gInterrupt, PcdGet32 (PcdArmArchTimerIntrNum), TimerInterruptHandler); - ASSERT_EFI_ERROR (Status); - - // Set up default timer - Status = TimerDriverSetTimerPeriod (&gTimer, FixedPcdGet32(PcdTimerPeriod)); // TIMER_DEFAULT_PERIOD - ASSERT_EFI_ERROR (Status); - - // Install the Timer Architectural Protocol onto a new handle - Status = gBS->InstallMultipleProtocolInterfaces( - &Handle, - &gEfiTimerArchProtocolGuid, &gTimer, - NULL - ); - ASSERT_EFI_ERROR(Status); - - // Everything is ready, unmask and enable timer interrupts - TimerCtrlReg = ARM_ARCH_TIMER_ENABLE; - ArmGenericTimerSetTimerCtrlReg (TimerCtrlReg); - - // Register for an ExitBootServicesEvent - Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent); - ASSERT_EFI_ERROR (Status); - - return Status; -} diff --git a/ArmPkg/Drivers/TimerDxe/TimerDxe.inf b/ArmPkg/Drivers/TimerDxe/TimerDxe.inf deleted file mode 100644 index 3f345156c3..0000000000 --- a/ArmPkg/Drivers/TimerDxe/TimerDxe.inf +++ /dev/null @@ -1,60 +0,0 @@ -#/** @file -# -# Component description file for Timer DXE module -# -# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmTimerDxe - FILE_GUID = 49ea041e-6752-42ca-b0b1-7344fe2546b7 - MODULE_TYPE = DXE_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = TimerInitialize - -[Sources.common] - TimerDxe.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - ArmPlatformPkg/ArmPlatformPkg.dec - -[LibraryClasses] - ArmLib - BaseLib - UefiRuntimeServicesTableLib - UefiLib - UefiBootServicesTableLib - BaseMemoryLib - DebugLib - UefiDriverEntryPoint - IoLib - ArmGenericTimerCounterLib - -[Guids] - -[Protocols] - gEfiTimerArchProtocolGuid - gHardwareInterruptProtocolGuid - -[Pcd.common] - gEmbeddedTokenSpaceGuid.PcdTimerPeriod - gArmTokenSpaceGuid.PcdArmArchTimerSecIntrNum - gArmTokenSpaceGuid.PcdArmArchTimerIntrNum - gArmTokenSpaceGuid.PcdArmArchTimerVirtIntrNum - gArmTokenSpaceGuid.PcdArmArchTimerHypIntrNum - -[Depex] - gHardwareInterruptProtocolGuid diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c deleted file mode 100644 index 92aa5f8b0e..0000000000 --- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.c +++ /dev/null @@ -1,1209 +0,0 @@ -/** @file - Support a Semi Host file system over a debuggers JTAG - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include - -#include -#include -#include - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#include "SemihostFs.h" - -#define DEFAULT_SEMIHOST_FS_LABEL L"SemihostFs" - -STATIC CHAR16 *mSemihostFsLabel; - -EFI_SIMPLE_FILE_SYSTEM_PROTOCOL gSemihostFs = { - EFI_SIMPLE_FILE_SYSTEM_PROTOCOL_REVISION, - VolumeOpen -}; - -EFI_FILE gSemihostFsFile = { - EFI_FILE_PROTOCOL_REVISION, - FileOpen, - FileClose, - FileDelete, - FileRead, - FileWrite, - FileGetPosition, - FileSetPosition, - FileGetInfo, - FileSetInfo, - FileFlush -}; - -// -// Device path for semi-hosting. It contains our autogened Caller ID GUID. -// -typedef struct { - VENDOR_DEVICE_PATH Guid; - EFI_DEVICE_PATH_PROTOCOL End; -} SEMIHOST_DEVICE_PATH; - -SEMIHOST_DEVICE_PATH gDevicePath = { - { - { HARDWARE_DEVICE_PATH, HW_VENDOR_DP, { sizeof (VENDOR_DEVICE_PATH), 0 } }, - EFI_CALLER_ID_GUID - }, - { END_DEVICE_PATH_TYPE, END_ENTIRE_DEVICE_PATH_SUBTYPE, { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 } } -}; - -typedef struct { - LIST_ENTRY Link; - UINT64 Signature; - EFI_FILE File; - CHAR8 *FileName; - UINT64 OpenMode; - UINT32 Position; - UINTN SemihostHandle; - BOOLEAN IsRoot; - EFI_FILE_INFO Info; -} SEMIHOST_FCB; - -#define SEMIHOST_FCB_SIGNATURE SIGNATURE_32( 'S', 'H', 'F', 'C' ) -#define SEMIHOST_FCB_FROM_THIS(a) CR(a, SEMIHOST_FCB, File, SEMIHOST_FCB_SIGNATURE) -#define SEMIHOST_FCB_FROM_LINK(a) CR(a, SEMIHOST_FCB, Link, SEMIHOST_FCB_SIGNATURE); - -EFI_HANDLE gInstallHandle = NULL; -LIST_ENTRY gFileList = INITIALIZE_LIST_HEAD_VARIABLE (gFileList); - -SEMIHOST_FCB * -AllocateFCB ( - VOID - ) -{ - SEMIHOST_FCB *Fcb = AllocateZeroPool (sizeof (SEMIHOST_FCB)); - - if (Fcb != NULL) { - CopyMem (&Fcb->File, &gSemihostFsFile, sizeof (gSemihostFsFile)); - Fcb->Signature = SEMIHOST_FCB_SIGNATURE; - } - - return Fcb; -} - -VOID -FreeFCB ( - IN SEMIHOST_FCB *Fcb - ) -{ - // Remove Fcb from gFileList. - RemoveEntryList (&Fcb->Link); - - // To help debugging... - Fcb->Signature = 0; - - FreePool (Fcb); -} - - - -EFI_STATUS -VolumeOpen ( - IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This, - OUT EFI_FILE **Root - ) -{ - SEMIHOST_FCB *RootFcb = NULL; - - if (Root == NULL) { - return EFI_INVALID_PARAMETER; - } - - RootFcb = AllocateFCB (); - if (RootFcb == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - RootFcb->IsRoot = TRUE; - RootFcb->Info.Attribute = EFI_FILE_READ_ONLY | EFI_FILE_DIRECTORY; - - InsertTailList (&gFileList, &RootFcb->Link); - - *Root = &RootFcb->File; - - return EFI_SUCCESS; -} - -/** - Open a file on the host system by means of the semihosting interface. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is - the file handle to source location. - @param[out] NewHandle A pointer to the location to return the opened - handle for the new file. - @param[in] FileName The Null-terminated string of the name of the file - to be opened. - @param[in] OpenMode The mode to open the file : Read or Read/Write or - Read/Write/Create - @param[in] Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these - are the attribute bits for the newly created file. The - mnemonics of the attribute bits are : EFI_FILE_READ_ONLY, - EFI_FILE_HIDDEN, EFI_FILE_SYSTEM, EFI_FILE_RESERVED, - EFI_FILE_DIRECTORY and EFI_FILE_ARCHIVE. - - @retval EFI_SUCCESS The file was open. - @retval EFI_NOT_FOUND The specified file could not be found. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_WRITE_PROTECTED Attempt to create a directory. This is not possible - with the semi-hosting interface. - @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file. - @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid. - -**/ -EFI_STATUS -FileOpen ( - IN EFI_FILE *This, - OUT EFI_FILE **NewHandle, - IN CHAR16 *FileName, - IN UINT64 OpenMode, - IN UINT64 Attributes - ) -{ - SEMIHOST_FCB *FileFcb; - RETURN_STATUS Return; - EFI_STATUS Status; - UINTN SemihostHandle; - CHAR8 *AsciiFileName; - UINT32 SemihostMode; - UINTN Length; - - if ((FileName == NULL) || (NewHandle == NULL)) { - return EFI_INVALID_PARAMETER; - } - - if ( (OpenMode != EFI_FILE_MODE_READ) && - (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE)) && - (OpenMode != (EFI_FILE_MODE_READ | EFI_FILE_MODE_WRITE | EFI_FILE_MODE_CREATE)) ) { - return EFI_INVALID_PARAMETER; - } - - if ((OpenMode & EFI_FILE_MODE_CREATE) && - (Attributes & EFI_FILE_DIRECTORY) ) { - return EFI_WRITE_PROTECTED; - } - - Length = StrLen (FileName) + 1; - AsciiFileName = AllocatePool (Length); - if (AsciiFileName == NULL) { - return EFI_OUT_OF_RESOURCES; - } - UnicodeStrToAsciiStrS (FileName, AsciiFileName, Length); - - // Opening '/', '\', '.', or the NULL pathname is trying to open the root directory - if ((AsciiStrCmp (AsciiFileName, "\\") == 0) || - (AsciiStrCmp (AsciiFileName, "/") == 0) || - (AsciiStrCmp (AsciiFileName, "") == 0) || - (AsciiStrCmp (AsciiFileName, ".") == 0) ) { - FreePool (AsciiFileName); - return (VolumeOpen (&gSemihostFs, NewHandle)); - } - - // - // No control is done here concerning the file path. It is passed - // as it is to the host operating system through the semi-hosting - // interface. We first try to open the file in the read or update - // mode even if the file creation has been asked for. That way, if - // the file already exists, it is not truncated to zero length. In - // write mode (bit SEMIHOST_FILE_MODE_WRITE up), if the file already - // exists, it is reset to an empty file. - // - if (OpenMode == EFI_FILE_MODE_READ) { - SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY; - } else { - SemihostMode = SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE; - } - Return = SemihostFileOpen (AsciiFileName, SemihostMode, &SemihostHandle); - - if (RETURN_ERROR (Return)) { - if (OpenMode & EFI_FILE_MODE_CREATE) { - // - // In the create if does not exist case, if the opening in update - // mode failed, create it and open it in update mode. The update - // mode allows for both read and write from and to the file. - // - Return = SemihostFileOpen ( - AsciiFileName, - SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY | SEMIHOST_FILE_MODE_UPDATE, - &SemihostHandle - ); - if (RETURN_ERROR (Return)) { - Status = EFI_DEVICE_ERROR; - goto Error; - } - } else { - Status = EFI_NOT_FOUND; - goto Error; - } - } - - // Allocate a control block and fill it - FileFcb = AllocateFCB (); - if (FileFcb == NULL) { - Status = EFI_OUT_OF_RESOURCES; - goto Error; - } - - FileFcb->FileName = AsciiFileName; - FileFcb->SemihostHandle = SemihostHandle; - FileFcb->Position = 0; - FileFcb->IsRoot = 0; - FileFcb->OpenMode = OpenMode; - - Return = SemihostFileLength (SemihostHandle, &Length); - if (RETURN_ERROR (Return)) { - Status = EFI_DEVICE_ERROR; - FreeFCB (FileFcb); - goto Error; - } - - FileFcb->Info.FileSize = Length; - FileFcb->Info.PhysicalSize = Length; - FileFcb->Info.Attribute = (OpenMode & EFI_FILE_MODE_CREATE) ? Attributes : 0; - - InsertTailList (&gFileList, &FileFcb->Link); - - *NewHandle = &FileFcb->File; - - return EFI_SUCCESS; - -Error: - - FreePool (AsciiFileName); - - return Status; -} - -/** - Worker function that truncate a file specified by its name to a given size. - - @param[in] FileName The Null-terminated string of the name of the file to be opened. - @param[in] Size The target size for the file. - - @retval EFI_SUCCESS The file was truncated. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - -**/ -STATIC -EFI_STATUS -TruncateFile ( - IN CHAR8 *FileName, - IN UINTN Size - ) -{ - EFI_STATUS Status; - RETURN_STATUS Return; - UINTN FileHandle; - UINT8 *Buffer; - UINTN Remaining; - UINTN Read; - UINTN ToRead; - - Status = EFI_DEVICE_ERROR; - FileHandle = 0; - Buffer = NULL; - - Return = SemihostFileOpen ( - FileName, - SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY, - &FileHandle - ); - if (RETURN_ERROR (Return)) { - goto Error; - } - - Buffer = AllocatePool (Size); - if (Buffer == NULL) { - Status = EFI_OUT_OF_RESOURCES; - goto Error; - } - - Read = 0; - Remaining = Size; - while (Remaining > 0) { - ToRead = Remaining; - Return = SemihostFileRead (FileHandle, &ToRead, Buffer + Read); - if (RETURN_ERROR (Return)) { - goto Error; - } - Remaining -= ToRead; - Read += ToRead; - } - - Return = SemihostFileClose (FileHandle); - FileHandle = 0; - if (RETURN_ERROR (Return)) { - goto Error; - } - - Return = SemihostFileOpen ( - FileName, - SEMIHOST_FILE_MODE_WRITE | SEMIHOST_FILE_MODE_BINARY, - &FileHandle - ); - if (RETURN_ERROR (Return)) { - goto Error; - } - - if (Size > 0) { - Return = SemihostFileWrite (FileHandle, &Size, Buffer); - if (RETURN_ERROR (Return)) { - goto Error; - } - } - - Status = EFI_SUCCESS; - -Error: - - if (FileHandle != 0) { - SemihostFileClose (FileHandle); - } - if (Buffer != NULL) { - FreePool (Buffer); - } - - return (Status); - -} - -/** - Close a specified file handle. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file - handle to close. - - @retval EFI_SUCCESS The file was closed. - @retval EFI_INVALID_PARAMETER The parameter "This" is NULL. - -**/ -EFI_STATUS -FileClose ( - IN EFI_FILE *This - ) -{ - SEMIHOST_FCB *Fcb; - - if (This == NULL) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS(This); - - if (!Fcb->IsRoot) { - SemihostFileClose (Fcb->SemihostHandle); - // - // The file size might have been reduced from its actual - // size on the host file system with FileSetInfo(). In - // that case, the file has to be truncated. - // - if (Fcb->Info.FileSize < Fcb->Info.PhysicalSize) { - TruncateFile (Fcb->FileName, Fcb->Info.FileSize); - } - FreePool (Fcb->FileName); - } - - FreeFCB (Fcb); - - return EFI_SUCCESS; -} - -/** - Close and delete a file. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file - handle to delete. - - @retval EFI_SUCCESS The file was closed and deleted. - @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted. - @retval EFI_INVALID_PARAMETER The parameter "This" is NULL. - -**/ -EFI_STATUS -FileDelete ( - IN EFI_FILE *This - ) -{ - SEMIHOST_FCB *Fcb; - RETURN_STATUS Return; - CHAR8 *FileName; - UINTN NameSize; - - if (This == NULL) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS (This); - - if (!Fcb->IsRoot) { - // Get the filename from the Fcb - NameSize = AsciiStrLen (Fcb->FileName); - FileName = AllocatePool (NameSize + 1); - - AsciiStrCpyS (FileName, NameSize + 1, Fcb->FileName); - - // Close the file if it's open. Disregard return status, - // since it might give an error if the file isn't open. - This->Close (This); - - // Call the semihost interface to delete the file. - Return = SemihostFileRemove (FileName); - if (RETURN_ERROR (Return)) { - return EFI_WARN_DELETE_FAILURE; - } - return EFI_SUCCESS; - } else { - return EFI_WARN_DELETE_FAILURE; - } -} - -/** - Read data from an open file. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle to read data from. - @param[in out] BufferSize On input, the size of the Buffer. On output, the - amount of data returned in Buffer. In both cases, - the size is measured in bytes. - @param[out] Buffer The buffer into which the data is read. - - @retval EFI_SUCCESS The data was read. - @retval EFI_DEVICE_ERROR On entry, the current file position is - beyond the end of the file, or the semi-hosting - interface reported an error while performing the - read operation. - @retval EFI_INVALID_PARAMETER At least one of the three input pointers is NULL. - -**/ -EFI_STATUS -FileRead ( - IN EFI_FILE *This, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer - ) -{ - SEMIHOST_FCB *Fcb; - EFI_STATUS Status; - RETURN_STATUS Return; - - if ((This == NULL) || (BufferSize == NULL) || (Buffer == NULL)) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS (This); - - if (Fcb->IsRoot) { - // The semi-hosting interface does not allow to list files on the host machine. - Status = EFI_UNSUPPORTED; - } else { - Status = EFI_SUCCESS; - if (Fcb->Position >= Fcb->Info.FileSize) { - *BufferSize = 0; - if (Fcb->Position > Fcb->Info.FileSize) { - Status = EFI_DEVICE_ERROR; - } - } else { - Return = SemihostFileRead (Fcb->SemihostHandle, BufferSize, Buffer); - if (RETURN_ERROR (Return)) { - Status = EFI_DEVICE_ERROR; - } else { - Fcb->Position += *BufferSize; - } - } - } - - return Status; -} - -/** - Worker function that extends the size of an open file. - - The extension is filled with zeros. - - @param[in] Fcb Internal description of the opened file - @param[in] Size The number of bytes, the file has to be extended. - - @retval EFI_SUCCESS The file was extended. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - -**/ -STATIC -EFI_STATUS -ExtendFile ( - IN SEMIHOST_FCB *Fcb, - IN UINTN Size - ) -{ - RETURN_STATUS Return; - UINTN Remaining; - CHAR8 WriteBuffer[128]; - UINTN WriteNb; - UINTN WriteSize; - - Return = SemihostFileSeek (Fcb->SemihostHandle, Fcb->Info.FileSize); - if (RETURN_ERROR (Return)) { - return EFI_DEVICE_ERROR; - } - - Remaining = Size; - SetMem (WriteBuffer, 0, sizeof(WriteBuffer)); - while (Remaining > 0) { - WriteNb = MIN (Remaining, sizeof(WriteBuffer)); - WriteSize = WriteNb; - Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, WriteBuffer); - if (RETURN_ERROR (Return)) { - return EFI_DEVICE_ERROR; - } - Remaining -= WriteNb; - } - - return EFI_SUCCESS; -} - -/** - Write data to an open file. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle to write data to. - @param[in out] BufferSize On input, the size of the Buffer. On output, the - size of the data actually written. In both cases, - the size is measured in bytes. - @param[in] Buffer The buffer of data to write. - - @retval EFI_SUCCESS The data was written. - @retval EFI_ACCESS_DENIED Attempt to write into a read only file or - in a file opened in read only mode. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_INVALID_PARAMETER At least one of the three input pointers is NULL. - -**/ -EFI_STATUS -FileWrite ( - IN EFI_FILE *This, - IN OUT UINTN *BufferSize, - IN VOID *Buffer - ) -{ - SEMIHOST_FCB *Fcb; - EFI_STATUS Status; - UINTN WriteSize; - RETURN_STATUS Return; - UINTN Length; - - if ((This == NULL) || (BufferSize == NULL) || (Buffer == NULL)) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS (This); - - // We cannot write a read-only file - if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY) - || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) { - return EFI_ACCESS_DENIED; - } - - // - // If the position has been set past the end of the file, first grow the - // file from its current size "Fcb->Info.FileSize" to "Fcb->Position" - // size, filling the gap with zeros. - // - if (Fcb->Position > Fcb->Info.FileSize) { - Status = ExtendFile (Fcb, Fcb->Position - Fcb->Info.FileSize); - if (EFI_ERROR (Status)) { - return Status; - } - Fcb->Info.FileSize = Fcb->Position; - } - - WriteSize = *BufferSize; - Return = SemihostFileWrite (Fcb->SemihostHandle, &WriteSize, Buffer); - if (RETURN_ERROR (Return)) { - return EFI_DEVICE_ERROR; - } - - Fcb->Position += *BufferSize; - if (Fcb->Position > Fcb->Info.FileSize) { - Fcb->Info.FileSize = Fcb->Position; - } - - Return = SemihostFileLength (Fcb->SemihostHandle, &Length); - if (RETURN_ERROR (Return)) { - return EFI_DEVICE_ERROR; - } - Fcb->Info.PhysicalSize = Length; - - return EFI_SUCCESS; -} - -/** - Return a file's current position. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is - the file handle to get the current position on. - @param[out] Position The address to return the file's current position value. - - @retval EFI_SUCCESS The position was returned. - @retval EFI_INVALID_PARAMETER The parameter "This" or "Position" is NULL. - -**/ -EFI_STATUS -FileGetPosition ( - IN EFI_FILE *This, - OUT UINT64 *Position - ) -{ - SEMIHOST_FCB *Fcb; - - if ((This == NULL) || (Position == NULL)) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS(This); - - *Position = Fcb->Position; - - return EFI_SUCCESS; -} - -/** - Set a file's current position. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is - the file handle to set the requested position on. - @param[in] Position The byte position from the start of the file to set. - - @retval EFI_SUCCESS The position was set. - @retval EFI_DEVICE_ERROR The semi-hosting positionning operation failed. - @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open - directories. - @retval EFI_INVALID_PARAMETER The parameter "This" is NULL. - -**/ -EFI_STATUS -FileSetPosition ( - IN EFI_FILE *This, - IN UINT64 Position - ) -{ - SEMIHOST_FCB *Fcb; - RETURN_STATUS Return; - - if (This == NULL) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS (This); - - if (Fcb->IsRoot) { - if (Position != 0) { - return EFI_UNSUPPORTED; - } - } - else { - // - // UEFI Spec section 12.5: - // "Seeking to position 0xFFFFFFFFFFFFFFFF causes the current position to - // be set to the end of the file." - // - if (Position == 0xFFFFFFFFFFFFFFFF) { - Position = Fcb->Info.FileSize; - } - Return = SemihostFileSeek (Fcb->SemihostHandle, MIN (Position, Fcb->Info.FileSize)); - if (RETURN_ERROR (Return)) { - return EFI_DEVICE_ERROR; - } - } - - Fcb->Position = Position; - - return EFI_SUCCESS; -} - -/** - Return information about a file. - - @param[in] Fcb A pointer to the description of an open file. - @param[in out] BufferSize The size, in bytes, of Buffer. - @param[out] Buffer A pointer to the data buffer to return. Not NULL if - "*BufferSize" is greater than 0. - - @retval EFI_SUCCESS The information was returned. - @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information. - BufferSize has been updated with the size needed to - complete the request. -**/ -STATIC -EFI_STATUS -GetFileInfo ( - IN SEMIHOST_FCB *Fcb, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer - ) -{ - EFI_FILE_INFO *Info = NULL; - UINTN NameSize = 0; - UINTN ResultSize; - UINTN Index; - - if (Fcb->IsRoot == TRUE) { - ResultSize = SIZE_OF_EFI_FILE_INFO + sizeof(CHAR16); - } else { - NameSize = AsciiStrLen (Fcb->FileName) + 1; - ResultSize = SIZE_OF_EFI_FILE_INFO + NameSize * sizeof (CHAR16); - } - - if (*BufferSize < ResultSize) { - *BufferSize = ResultSize; - return EFI_BUFFER_TOO_SMALL; - } - - Info = Buffer; - - // Copy the current file info - CopyMem (Info, &Fcb->Info, SIZE_OF_EFI_FILE_INFO); - - // Fill in the structure - Info->Size = ResultSize; - - if (Fcb->IsRoot == TRUE) { - Info->FileName[0] = L'\0'; - } else { - for (Index = 0; Index < NameSize; Index++) { - Info->FileName[Index] = Fcb->FileName[Index]; - } - } - - *BufferSize = ResultSize; - - return EFI_SUCCESS; -} - -/** - Return information about a file system. - - @param[in] Fcb A pointer to the description of an open file - which belongs to the file system, the information - is requested for. - @param[in out] BufferSize The size, in bytes, of Buffer. - @param[out] Buffer A pointer to the data buffer to return. Not NULL if - "*BufferSize" is greater than 0. - - @retval EFI_SUCCESS The information was returned. - @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information. - BufferSize has been updated with the size needed to - complete the request. - -**/ -STATIC -EFI_STATUS -GetFilesystemInfo ( - IN SEMIHOST_FCB *Fcb, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer - ) -{ - EFI_FILE_SYSTEM_INFO *Info; - EFI_STATUS Status; - UINTN ResultSize; - UINTN StringSize; - - StringSize = StrSize (mSemihostFsLabel); - ResultSize = SIZE_OF_EFI_FILE_SYSTEM_INFO + StringSize; - - if (*BufferSize >= ResultSize) { - ZeroMem (Buffer, ResultSize); - Status = EFI_SUCCESS; - - Info = Buffer; - - Info->Size = ResultSize; - Info->ReadOnly = FALSE; - Info->VolumeSize = 0; - Info->FreeSpace = 0; - Info->BlockSize = 0; - - CopyMem (Info->VolumeLabel, mSemihostFsLabel, StringSize); - } else { - Status = EFI_BUFFER_TOO_SMALL; - } - - *BufferSize = ResultSize; - return Status; -} - -/** - Return information about a file or a file system. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle the requested information is for. - @param[in] InformationType The type identifier for the information being requested : - EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or - EFI_FILE_SYSTEM_VOLUME_LABEL_ID - @param[in out] BufferSize The size, in bytes, of Buffer. - @param[out] Buffer A pointer to the data buffer to return. The type of the - data inside the buffer is indicated by InformationType. - - @retval EFI_SUCCESS The information was returned. - @retval EFI_UNSUPPORTED The InformationType is not known. - @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information. - BufferSize has been updated with the size needed to - complete the request. - @retval EFI_INVALID_PARAMETER The parameter "This" or "InformationType" or "BufferSize" - is NULL or "Buffer" is NULL and "*Buffersize" is greater - than 0. - -**/ -EFI_STATUS -FileGetInfo ( - IN EFI_FILE *This, - IN EFI_GUID *InformationType, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer - ) -{ - SEMIHOST_FCB *Fcb; - EFI_STATUS Status; - UINTN ResultSize; - - if ((This == NULL) || - (InformationType == NULL) || - (BufferSize == NULL) || - ((Buffer == NULL) && (*BufferSize > 0)) ) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS(This); - - if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) { - Status = GetFilesystemInfo (Fcb, BufferSize, Buffer); - } else if (CompareGuid (InformationType, &gEfiFileInfoGuid)) { - Status = GetFileInfo (Fcb, BufferSize, Buffer); - } else if (CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid)) { - ResultSize = StrSize (mSemihostFsLabel); - - if (*BufferSize >= ResultSize) { - CopyMem (Buffer, mSemihostFsLabel, ResultSize); - Status = EFI_SUCCESS; - } else { - Status = EFI_BUFFER_TOO_SMALL; - } - - *BufferSize = ResultSize; - } else { - Status = EFI_UNSUPPORTED; - } - - return Status; -} - -/** - Set information about a file. - - @param[in] Fcb A pointer to the description of the open file. - @param[in] Info A pointer to the file information to write. - - @retval EFI_SUCCESS The information was set. - @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file - to a file that is already present. - @retval EFI_ACCESS_DENIED An attempt is being made to change the - EFI_FILE_DIRECTORY Attribute. - @retval EFI_ACCESS_DENIED The file is a read-only file or has been - opened in read-only mode and an attempt is - being made to modify a field other than - Attribute. - @retval EFI_WRITE_PROTECTED An attempt is being made to modify a - read-only attribute. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_OUT_OF_RESOURCES A allocation needed to process the request failed. - -**/ -STATIC -EFI_STATUS -SetFileInfo ( - IN SEMIHOST_FCB *Fcb, - IN EFI_FILE_INFO *Info - ) -{ - EFI_STATUS Status; - RETURN_STATUS Return; - BOOLEAN FileSizeIsDifferent; - BOOLEAN FileNameIsDifferent; - BOOLEAN ReadOnlyIsDifferent; - CHAR8 *AsciiFileName; - UINTN FileSize; - UINTN Length; - UINTN SemihostHandle; - - // - // A directory can not be changed to a file and a file can - // not be changed to a directory. - // - if (((Info->Attribute & EFI_FILE_DIRECTORY) != 0) != Fcb->IsRoot) { - return EFI_ACCESS_DENIED; - } - - Length = StrLen (Info->FileName) + 1; - AsciiFileName = AllocatePool (Length); - if (AsciiFileName == NULL) { - return EFI_OUT_OF_RESOURCES; - } - UnicodeStrToAsciiStrS (Info->FileName, AsciiFileName, Length); - - FileSizeIsDifferent = (Info->FileSize != Fcb->Info.FileSize); - FileNameIsDifferent = (AsciiStrCmp (AsciiFileName, Fcb->FileName) != 0); - ReadOnlyIsDifferent = CompareMem ( - &Info->CreateTime, - &Fcb->Info.CreateTime, - 3 * sizeof (EFI_TIME) - ) != 0; - - // - // For a read-only file or a file opened in read-only mode, only - // the Attribute field can be modified. As the root directory is - // read-only (i.e. VolumeOpen()), this protects the root directory - // description. - // - if ((Fcb->OpenMode == EFI_FILE_MODE_READ) || - (Fcb->Info.Attribute & EFI_FILE_READ_ONLY) ) { - if (FileSizeIsDifferent || FileNameIsDifferent || ReadOnlyIsDifferent) { - Status = EFI_ACCESS_DENIED; - goto Error; - } - } - - if (ReadOnlyIsDifferent) { - Status = EFI_WRITE_PROTECTED; - goto Error; - } - - Status = EFI_DEVICE_ERROR; - - if (FileSizeIsDifferent) { - FileSize = Info->FileSize; - if (Fcb->Info.FileSize < FileSize) { - Status = ExtendFile (Fcb, FileSize - Fcb->Info.FileSize); - if (EFI_ERROR (Status)) { - goto Error; - } - // - // The read/write position from the host file system point of view - // is at the end of the file. If the position from this module - // point of view is smaller than the new file size, then - // ask the host file system to move to that position. - // - if (Fcb->Position < FileSize) { - FileSetPosition (&Fcb->File, Fcb->Position); - } - } - Fcb->Info.FileSize = FileSize; - - Return = SemihostFileLength (Fcb->SemihostHandle, &Length); - if (RETURN_ERROR (Return)) { - goto Error; - } - Fcb->Info.PhysicalSize = Length; - } - - // - // Note down in RAM the Attribute field but we can not ask - // for its modification to the host file system as the - // semi-host interface does not provide this feature. - // - Fcb->Info.Attribute = Info->Attribute; - - if (FileNameIsDifferent) { - Return = SemihostFileOpen ( - AsciiFileName, - SEMIHOST_FILE_MODE_READ | SEMIHOST_FILE_MODE_BINARY, - &SemihostHandle - ); - if (!RETURN_ERROR (Return)) { - SemihostFileClose (SemihostHandle); - Status = EFI_ACCESS_DENIED; - goto Error; - } - - Return = SemihostFileRename (Fcb->FileName, AsciiFileName); - if (RETURN_ERROR (Return)) { - goto Error; - } - FreePool (Fcb->FileName); - Fcb->FileName = AsciiFileName; - AsciiFileName = NULL; - } - - Status = EFI_SUCCESS; - -Error: - if (AsciiFileName != NULL) { - FreePool (AsciiFileName); - } - - return Status; -} - -/** - Set information about a file or a file system. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle the information is for. - @param[in] InformationType The type identifier for the information being set : - EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or - EFI_FILE_SYSTEM_VOLUME_LABEL_ID - @param[in] BufferSize The size, in bytes, of Buffer. - @param[in] Buffer A pointer to the data buffer to write. The type of the - data inside the buffer is indicated by InformationType. - - @retval EFI_SUCCESS The information was set. - @retval EFI_UNSUPPORTED The InformationType is not known. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_ACCESS_DENIED An attempt is being made to change the - EFI_FILE_DIRECTORY Attribute. - @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and - the file is a read-only file or has been - opened in read-only mode and an attempt is - being made to modify a field other than - Attribute. - @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file - to a file that is already present. - @retval EFI_WRITE_PROTECTED An attempt is being made to modify a - read-only attribute. - @retval EFI_BAD_BUFFER_SIZE The size of the buffer is lower than that indicated by - the data inside the buffer. - @retval EFI_OUT_OF_RESOURCES An allocation needed to process the request failed. - @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid. - -**/ -EFI_STATUS -FileSetInfo ( - IN EFI_FILE *This, - IN EFI_GUID *InformationType, - IN UINTN BufferSize, - IN VOID *Buffer - ) -{ - SEMIHOST_FCB *Fcb; - EFI_FILE_INFO *Info; - EFI_FILE_SYSTEM_INFO *SystemInfo; - CHAR16 *VolumeLabel; - - if ((This == NULL) || (InformationType == NULL) || (Buffer == NULL)) { - return EFI_INVALID_PARAMETER; - } - - Fcb = SEMIHOST_FCB_FROM_THIS (This); - - if (CompareGuid (InformationType, &gEfiFileInfoGuid)) { - Info = Buffer; - if (Info->Size < (SIZE_OF_EFI_FILE_INFO + StrSize (Info->FileName))) { - return EFI_INVALID_PARAMETER; - } - if (BufferSize < Info->Size) { - return EFI_BAD_BUFFER_SIZE; - } - return SetFileInfo (Fcb, Info); - } else if (CompareGuid (InformationType, &gEfiFileSystemInfoGuid)) { - SystemInfo = Buffer; - if (SystemInfo->Size < - (SIZE_OF_EFI_FILE_SYSTEM_INFO + StrSize (SystemInfo->VolumeLabel))) { - return EFI_INVALID_PARAMETER; - } - if (BufferSize < SystemInfo->Size) { - return EFI_BAD_BUFFER_SIZE; - } - Buffer = SystemInfo->VolumeLabel; - - if (StrSize (Buffer) > 0) { - VolumeLabel = AllocateCopyPool (StrSize (Buffer), Buffer); - if (VolumeLabel != NULL) { - FreePool (mSemihostFsLabel); - mSemihostFsLabel = VolumeLabel; - return EFI_SUCCESS; - } else { - return EFI_OUT_OF_RESOURCES; - } - } else { - return EFI_INVALID_PARAMETER; - } - } else if (!CompareGuid (InformationType, &gEfiFileSystemVolumeLabelInfoIdGuid)) { - return EFI_UNSUPPORTED; - } else { - return EFI_UNSUPPORTED; - } -} - -EFI_STATUS -FileFlush ( - IN EFI_FILE *File - ) -{ - SEMIHOST_FCB *Fcb; - - Fcb = SEMIHOST_FCB_FROM_THIS(File); - - if (Fcb->IsRoot) { - return EFI_SUCCESS; - } else { - if ((Fcb->Info.Attribute & EFI_FILE_READ_ONLY) - || !(Fcb->OpenMode & EFI_FILE_MODE_WRITE)) { - return EFI_ACCESS_DENIED; - } else { - return EFI_SUCCESS; - } - } -} - -EFI_STATUS -SemihostFsEntryPoint ( - IN EFI_HANDLE ImageHandle, - IN EFI_SYSTEM_TABLE *SystemTable - ) -{ - EFI_STATUS Status; - - Status = EFI_NOT_FOUND; - - if (SemihostConnectionSupported ()) { - mSemihostFsLabel = AllocateCopyPool (StrSize (DEFAULT_SEMIHOST_FS_LABEL), DEFAULT_SEMIHOST_FS_LABEL); - if (mSemihostFsLabel == NULL) { - return EFI_OUT_OF_RESOURCES; - } - - Status = gBS->InstallMultipleProtocolInterfaces ( - &gInstallHandle, - &gEfiSimpleFileSystemProtocolGuid, &gSemihostFs, - &gEfiDevicePathProtocolGuid, &gDevicePath, - NULL - ); - - if (EFI_ERROR(Status)) { - FreePool (mSemihostFsLabel); - } - } - - return Status; -} diff --git a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h b/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h deleted file mode 100644 index 93395743ba..0000000000 --- a/ArmPkg/Filesystem/SemihostFs/Arm/SemihostFs.h +++ /dev/null @@ -1,252 +0,0 @@ -/** @file - Support a Semi Host file system over a debuggers JTAG - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __SEMIHOST_FS_H__ -#define __SEMIHOST_FS_H__ - -EFI_STATUS -VolumeOpen ( - IN EFI_SIMPLE_FILE_SYSTEM_PROTOCOL *This, - OUT EFI_FILE **Root - ); - -/** - Open a file on the host system by means of the semihosting interface. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is - the file handle to source location. - @param[out] NewHandle A pointer to the location to return the opened - handle for the new file. - @param[in] FileName The Null-terminated string of the name of the file - to be opened. - @param[in] OpenMode The mode to open the file : Read or Read/Write or - Read/Write/Create - @param[in] Attributes Only valid for EFI_FILE_MODE_CREATE, in which case these - are the attribute bits for the newly created file. The - mnemonics of the attribute bits are : EFI_FILE_READ_ONLY, - EFI_FILE_HIDDEN, EFI_FILE_SYSTEM, EFI_FILE_RESERVED, - EFI_FILE_DIRECTORY and EFI_FILE_ARCHIVE. - - @retval EFI_SUCCESS The file was open. - @retval EFI_NOT_FOUND The specified file could not be found. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_WRITE_PROTECTED Attempt to create a directory. This is not possible - with the semi-hosting interface. - @retval EFI_OUT_OF_RESOURCES Not enough resources were available to open the file. - @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid. - -**/ -EFI_STATUS -FileOpen ( - IN EFI_FILE *This, - OUT EFI_FILE **NewHandle, - IN CHAR16 *FileName, - IN UINT64 OpenMode, - IN UINT64 Attributes - ); - -/** - Close a specified file handle. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file - handle to close. - - @retval EFI_SUCCESS The file was closed. - @retval EFI_INVALID_PARAMETER The parameter "This" is NULL. - -**/ -EFI_STATUS -FileClose ( - IN EFI_FILE *This - ); - -/** - Close and delete a file. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is the file - handle to delete. - - @retval EFI_SUCCESS The file was closed and deleted. - @retval EFI_WARN_DELETE_FAILURE The handle was closed, but the file was not deleted. - @retval EFI_INVALID_PARAMETER The parameter "This" is NULL. - -**/ -EFI_STATUS -FileDelete ( - IN EFI_FILE *This - ); - -/** - Read data from an open file. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle to read data from. - @param[in out] BufferSize On input, the size of the Buffer. On output, the - amount of data returned in Buffer. In both cases, - the size is measured in bytes. - @param[out] Buffer The buffer into which the data is read. - - @retval EFI_SUCCESS The data was read. - @retval EFI_DEVICE_ERROR On entry, the current file position is - beyond the end of the file, or the semi-hosting - interface reported an error while performing the - read operation. - @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer" - is NULL. -**/ -EFI_STATUS -FileRead ( - IN EFI_FILE *This, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer - ); - -/** - Write data to an open file. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle to write data to. - @param[in out] BufferSize On input, the size of the Buffer. On output, the - size of the data actually written. In both cases, - the size is measured in bytes. - @param[in] Buffer The buffer of data to write. - - @retval EFI_SUCCESS The data was written. - @retval EFI_ACCESS_DENIED Attempt to write into a read only file or - in a file opened in read only mode. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer" - is NULL. - -**/ -EFI_STATUS -FileWrite ( - IN EFI_FILE *This, - IN OUT UINTN *BufferSize, - IN VOID *Buffer - ); - -/** - Return a file's current position. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is - the file handle to get the current position on. - @param[out] Position The address to return the file's current position value. - - @retval EFI_SUCCESS The position was returned. - @retval EFI_INVALID_PARAMETER Position is a NULL pointer. - -**/ -EFI_STATUS -FileGetPosition ( - IN EFI_FILE *File, - OUT UINT64 *Position - ); - -/** - Set a file's current position. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that is - the file handle to set the requested position on. - @param[in] Position The byte position from the start of the file to set. - - @retval EFI_SUCCESS The position was set. - @retval EFI_DEVICE_ERROR The semi-hosting positionning operation failed. - @retval EFI_UNSUPPORTED The seek request for nonzero is not valid on open - directories. - -**/ -EFI_STATUS -FileSetPosition ( - IN EFI_FILE *File, - IN UINT64 Position - ); - -/** - Return information about a file or a file system. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle the requested information is for. - @param[in] InformationType The type identifier for the information being requested : - EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or - EFI_FILE_SYSTEM_VOLUME_LABEL_ID - @param[in out] BufferSize The size, in bytes, of Buffer. - @param[out] Buffer A pointer to the data buffer to return. The type of the - data inside the buffer is indicated by InformationType. - - @retval EFI_SUCCESS The information was returned. - @retval EFI_UNSUPPORTED The InformationType is not known. - @retval EFI_BUFFER_TOO_SMALL The BufferSize is too small to return the information. - BufferSize has been updated with the size needed to - complete the request. - @retval EFI_INVALID_PARAMETER The parameter "This" or the parameter "Buffer" - is NULL. - -**/ -EFI_STATUS -FileGetInfo ( - IN EFI_FILE *This, - IN EFI_GUID *InformationType, - IN OUT UINTN *BufferSize, - OUT VOID *Buffer - ); - -/** - Set information about a file or a file system. - - @param[in] This A pointer to the EFI_FILE_PROTOCOL instance that - is the file handle the information is for. - @param[in] InformationType The type identifier for the information being set : - EFI_FILE_INFO_ID or EFI_FILE_SYSTEM_INFO_ID or - EFI_FILE_SYSTEM_VOLUME_LABEL_ID - @param[in] BufferSize The size, in bytes, of Buffer. - @param[in] Buffer A pointer to the data buffer to write. The type of the - data inside the buffer is indicated by InformationType. - - @retval EFI_SUCCESS The information was set. - @retval EFI_UNSUPPORTED The InformationType is not known. - @retval EFI_DEVICE_ERROR The last issued semi-hosting operation failed. - @retval EFI_ACCESS_DENIED An attempt is being made to change the - EFI_FILE_DIRECTORY Attribute. - @retval EFI_ACCESS_DENIED InformationType is EFI_FILE_INFO_ID and - the file is a read-only file or has been - opened in read-only mode and an attempt is - being made to modify a field other than - Attribute. - @retval EFI_ACCESS_DENIED An attempt is made to change the name of a file - to a file that is already present. - @retval EFI_WRITE_PROTECTED An attempt is being made to modify a - read-only attribute. - @retval EFI_BAD_BUFFER_SIZE The size of the buffer is lower than that indicated by - the data inside the buffer. - @retval EFI_OUT_OF_RESOURCES An allocation needed to process the request failed. - @retval EFI_INVALID_PARAMETER At least one of the parameters is invalid. - -**/ -EFI_STATUS -FileSetInfo ( - IN EFI_FILE *This, - IN EFI_GUID *InformationType, - IN UINTN BufferSize, - IN VOID *Buffer - ); - -EFI_STATUS -FileFlush ( - IN EFI_FILE *File - ); - -#endif // __SEMIHOST_FS_H__ - diff --git a/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf b/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf deleted file mode 100644 index 164df2d85e..0000000000 --- a/ArmPkg/Filesystem/SemihostFs/SemihostFs.inf +++ /dev/null @@ -1,48 +0,0 @@ -#/** @file -# Support a Semi Host file system over a debuggers JTAG -# -# Copyright (c) 2009, Apple Inc. All rights reserved.
-# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = SemihostFs - FILE_GUID = C5B9C74A-6D72-4719-99AB-C59F199091EB - MODULE_TYPE = UEFI_DRIVER - VERSION_STRING = 1.0 - - ENTRY_POINT = SemihostFsEntryPoint - -[Sources.ARM, Sources.AARCH64] - Arm/SemihostFs.c - -[Packages] - MdePkg/MdePkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - BaseLib - MemoryAllocationLib - SemihostLib - UefiDriverEntryPoint - UefiLib - -[Guids] - gEfiFileSystemInfoGuid - gEfiFileInfoGuid - gEfiFileSystemVolumeLabelInfoIdGuid - -[Protocols] - gEfiSimpleFileSystemProtocolGuid - gEfiDevicePathProtocolGuid - diff --git a/ArmPkg/Include/AsmMacroExport.inc b/ArmPkg/Include/AsmMacroExport.inc deleted file mode 100644 index 818d6b2c22..0000000000 --- a/ArmPkg/Include/AsmMacroExport.inc +++ /dev/null @@ -1,29 +0,0 @@ -;%HEADER% -;/** @file -; Macros to centralize the EXPORT, AREA, and definition of an assembly -; function. The AREA prefix is required to put the function in its own -; section so that removal of unused functions in the final link is performed. -; This provides equivalent functionality to the compiler's --split-sections -; option. -; -; Copyright (c) 2015 HP Development Company, L.P. -; -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -;**/ - - - MACRO - RVCT_ASM_EXPORT $func - EXPORT $func - AREA s_$func, CODE, READONLY -$func - MEND - - END diff --git a/ArmPkg/Include/AsmMacroIoLib.h b/ArmPkg/Include/AsmMacroIoLib.h deleted file mode 100644 index 16d2a30729..0000000000 --- a/ArmPkg/Include/AsmMacroIoLib.h +++ /dev/null @@ -1,45 +0,0 @@ -/** @file - Macros to work around lack of Apple support for LDR register, =expr - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
- Copyright (c) 2016, Linaro Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#ifndef __MACRO_IO_LIB_H__ -#define __MACRO_IO_LIB_H__ - -#define _ASM_FUNC(Name, Section) \ - .global Name ; \ - .section #Section, "ax" ; \ - .type Name, %function ; \ - .p2align 2 ; \ - Name: - -#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name) - -#define MOV32(Reg, Val) \ - movw Reg, #(Val) & 0xffff ; \ - movt Reg, #(Val) >> 16 - -#define ADRL(Reg, Sym) \ - movw Reg, #:lower16:(Sym) - (. + 16) ; \ - movt Reg, #:upper16:(Sym) - (. + 12) ; \ - add Reg, Reg, pc - -#define LDRL(Reg, Sym) \ - movw Reg, #:lower16:(Sym) - (. + 16) ; \ - movt Reg, #:upper16:(Sym) - (. + 12) ; \ - ldr Reg, [pc, Reg] - -#endif diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc deleted file mode 100644 index ce7a1488da..0000000000 --- a/ArmPkg/Include/AsmMacroIoLib.inc +++ /dev/null @@ -1,39 +0,0 @@ -;%HEADER% -;/** @file -; Macros to work around lack of Apple support for LDR register, =expr -; -; Copyright (c) 2009, Apple Inc. All rights reserved.
-; Copyright (c) 2011-2012, ARM Ltd. All rights reserved.
-; -; This program and the accompanying materials -; are licensed and made available under the terms and conditions of the BSD License -; which accompanies this distribution. The full text of the license may be found at -; http://opensource.org/licenses/bsd-license.php -; -; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -; -;**/ - - - MACRO - adrll $Reg, $Symbol - add $Reg, pc, #-8 - RELOC R_ARM_ALU_PC_G0_NC, $Symbol - add $Reg, $Reg, #-4 - RELOC R_ARM_ALU_PC_G1_NC, $Symbol - add $Reg, $Reg, #0 - RELOC R_ARM_ALU_PC_G2, $Symbol - MEND - - MACRO - ldrl $Reg, $Symbol - add $Reg, pc, #-8 - RELOC R_ARM_ALU_PC_G0_NC, $Symbol - add $Reg, $Reg, #-4 - RELOC R_ARM_ALU_PC_G1_NC, $Symbol - ldr $Reg, [$Reg, #0] - RELOC R_ARM_LDR_PC_G2, $Symbol - MEND - - END diff --git a/ArmPkg/Include/AsmMacroIoLibV8.h b/ArmPkg/Include/AsmMacroIoLibV8.h deleted file mode 100644 index db43d3b52e..0000000000 --- a/ArmPkg/Include/AsmMacroIoLibV8.h +++ /dev/null @@ -1,63 +0,0 @@ -/** @file - Macros to work around lack of Clang support for LDR register, =expr - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
- Copyright (c) 2016, Linaro Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#ifndef __MACRO_IO_LIBV8_H__ -#define __MACRO_IO_LIBV8_H__ - -// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1 -// This only selects between EL1 and EL2, else we die. -// Provide the Macro with a safe temp xreg to use. -#define EL1_OR_EL2(SAFE_XREG) \ - mrs SAFE_XREG, CurrentEL ;\ - cmp SAFE_XREG, #0x8 ;\ - b.gt . ;\ - b.eq 2f ;\ - cbnz SAFE_XREG, 1f ;\ - b . ;// We should never get here - - -// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1 -// This only selects between EL1 and EL2 and EL3, else we die. -// Provide the Macro with a safe temp xreg to use. -#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \ - mrs SAFE_XREG, CurrentEL ;\ - cmp SAFE_XREG, #0x8 ;\ - b.gt 3f ;\ - b.eq 2f ;\ - cbnz SAFE_XREG, 1f ;\ - b . ;// We should never get here - -#define _ASM_FUNC(Name, Section) \ - .global Name ; \ - .section #Section, "ax" ; \ - .type Name, %function ; \ - Name: - -#define ASM_FUNC(Name) _ASM_FUNC(ASM_PFX(Name), .text. ## Name) - -#define MOV32(Reg, Val) \ - movz Reg, (Val) >> 16, lsl #16 ; \ - movk Reg, (Val) & 0xffff - -#define MOV64(Reg, Val) \ - movz Reg, (Val) >> 48, lsl #48 ; \ - movk Reg, ((Val) >> 32) & 0xffff, lsl #32 ; \ - movk Reg, ((Val) >> 16) & 0xffff, lsl #16 ; \ - movk Reg, (Val) & 0xffff - -#endif // __MACRO_IO_LIBV8_H__ diff --git a/ArmPkg/Include/Chipset/AArch64.h b/ArmPkg/Include/Chipset/AArch64.h deleted file mode 100644 index cebfc5da42..0000000000 --- a/ArmPkg/Include/Chipset/AArch64.h +++ /dev/null @@ -1,238 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2015, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __AARCH64_H__ -#define __AARCH64_H__ - -#include - -// ARM Interrupt ID in Exception Table -#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_AARCH64_IRQ - -// CPACR - Coprocessor Access Control Register definitions -#define CPACR_TTA_EN (1UL << 28) -#define CPACR_FPEN_EL1 (1UL << 20) -#define CPACR_FPEN_FULL (3UL << 20) -#define CPACR_CP_FULL_ACCESS 0x300000 - -// Coprocessor Trap Register (CPTR) -#define AARCH64_CPTR_TFP (1 << 10) - -// ID_AA64PFR0 - AArch64 Processor Feature Register 0 definitions -#define AARCH64_PFR0_FP (0xF << 16) -#define AARCH64_PFR0_GIC (0xF << 24) - -// SCR - Secure Configuration Register definitions -#define SCR_NS (1 << 0) -#define SCR_IRQ (1 << 1) -#define SCR_FIQ (1 << 2) -#define SCR_EA (1 << 3) -#define SCR_FW (1 << 4) -#define SCR_AW (1 << 5) - -// MIDR - Main ID Register definitions -#define ARM_CPU_TYPE_SHIFT 4 -#define ARM_CPU_TYPE_MASK 0xFFF -#define ARM_CPU_TYPE_AEMv8 0xD0F -#define ARM_CPU_TYPE_A53 0xD03 -#define ARM_CPU_TYPE_A57 0xD07 -#define ARM_CPU_TYPE_A72 0xD08 -#define ARM_CPU_TYPE_A15 0xC0F -#define ARM_CPU_TYPE_A9 0xC09 -#define ARM_CPU_TYPE_A7 0xC07 -#define ARM_CPU_TYPE_A5 0xC05 - -#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) ) -#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF)) - -// Hypervisor Configuration Register -#define ARM_HCR_FMO BIT3 -#define ARM_HCR_IMO BIT4 -#define ARM_HCR_AMO BIT5 -#define ARM_HCR_TSC BIT19 -#define ARM_HCR_TGE BIT27 - -// Exception Syndrome Register -#define AARCH64_ESR_EC(Ecr) ((0x3F << 26) & (Ecr)) -#define AARCH64_ESR_ISS(Ecr) ((0x1FFFFFF) & (Ecr)) - -#define AARCH64_ESR_EC_SMC32 (0x13 << 26) -#define AARCH64_ESR_EC_SMC64 (0x17 << 26) - -// AArch64 Exception Level -#define AARCH64_EL3 0xC -#define AARCH64_EL2 0x8 -#define AARCH64_EL1 0x4 - -// Saved Program Status Register definitions -#define SPSR_A BIT8 -#define SPSR_I BIT7 -#define SPSR_F BIT6 - -#define SPSR_AARCH32 BIT4 - -#define SPSR_AARCH32_MODE_USER 0x0 -#define SPSR_AARCH32_MODE_FIQ 0x1 -#define SPSR_AARCH32_MODE_IRQ 0x2 -#define SPSR_AARCH32_MODE_SVC 0x3 -#define SPSR_AARCH32_MODE_ABORT 0x7 -#define SPSR_AARCH32_MODE_UNDEF 0xB -#define SPSR_AARCH32_MODE_SYS 0xF - -// Counter-timer Hypervisor Control register definitions -#define CNTHCTL_EL2_EL1PCTEN BIT0 -#define CNTHCTL_EL2_EL1PCEN BIT1 - -#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 11)-1) - -// Vector table offset definitions -#define ARM_VECTOR_CUR_SP0_SYNC 0x000 -#define ARM_VECTOR_CUR_SP0_IRQ 0x080 -#define ARM_VECTOR_CUR_SP0_FIQ 0x100 -#define ARM_VECTOR_CUR_SP0_SERR 0x180 - -#define ARM_VECTOR_CUR_SPx_SYNC 0x200 -#define ARM_VECTOR_CUR_SPx_IRQ 0x280 -#define ARM_VECTOR_CUR_SPx_FIQ 0x300 -#define ARM_VECTOR_CUR_SPx_SERR 0x380 - -#define ARM_VECTOR_LOW_A64_SYNC 0x400 -#define ARM_VECTOR_LOW_A64_IRQ 0x480 -#define ARM_VECTOR_LOW_A64_FIQ 0x500 -#define ARM_VECTOR_LOW_A64_SERR 0x580 - -#define ARM_VECTOR_LOW_A32_SYNC 0x600 -#define ARM_VECTOR_LOW_A32_IRQ 0x680 -#define ARM_VECTOR_LOW_A32_FIQ 0x700 -#define ARM_VECTOR_LOW_A32_SERR 0x780 - -#define VECTOR_BASE(tbl) \ - .section .text.##tbl##,"ax"; \ - .align 11; \ - .org 0x0; \ - GCC_ASM_EXPORT(tbl); \ - ASM_PFX(tbl): \ - -#define VECTOR_ENTRY(tbl, off) \ - .org off - -#define VECTOR_END(tbl) \ - .org 0x800; \ - .previous - -VOID -EFIAPI -ArmEnableSWPInstruction ( - VOID - ); - -UINTN -EFIAPI -ArmReadCbar ( - VOID - ); - -UINTN -EFIAPI -ArmReadTpidrurw ( - VOID - ); - -VOID -EFIAPI -ArmWriteTpidrurw ( - UINTN Value - ); - -UINTN -EFIAPI -ArmGetTCR ( - VOID - ); - -VOID -EFIAPI -ArmSetTCR ( - UINTN Value - ); - -UINTN -EFIAPI -ArmGetMAIR ( - VOID - ); - -VOID -EFIAPI -ArmSetMAIR ( - UINTN Value - ); - -VOID -EFIAPI -ArmDisableAlignmentCheck ( - VOID - ); - -VOID -EFIAPI -ArmEnableAlignmentCheck ( - VOID - ); - -VOID -EFIAPI -ArmDisableStackAlignmentCheck ( - VOID - ); - -VOID -EFIAPI -ArmEnableStackAlignmentCheck ( - VOID - ); - -VOID -EFIAPI -ArmDisableAllExceptions ( - VOID - ); - -VOID -ArmWriteHcr ( - IN UINTN Hcr - ); - -UINTN -ArmReadHcr ( - VOID - ); - -UINTN -ArmReadCurrentEL ( - VOID - ); - -UINT64 -PageAttributeToGcdAttribute ( - IN UINT64 PageAttributes - ); - -UINTN -ArmWriteCptr ( - IN UINT64 Cptr - ); - -#endif // __AARCH64_H__ diff --git a/ArmPkg/Include/Chipset/AArch64Mmu.h b/ArmPkg/Include/Chipset/AArch64Mmu.h deleted file mode 100644 index ff77b16b25..0000000000 --- a/ArmPkg/Include/Chipset/AArch64Mmu.h +++ /dev/null @@ -1,204 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2013, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __AARCH64_MMU_H_ -#define __AARCH64_MMU_H_ - -// -// Memory Attribute Indirection register Definitions -// -#define MAIR_ATTR_DEVICE_MEMORY 0x0ULL -#define MAIR_ATTR_NORMAL_MEMORY_NON_CACHEABLE 0x44ULL -#define MAIR_ATTR_NORMAL_MEMORY_WRITE_THROUGH 0xBBULL -#define MAIR_ATTR_NORMAL_MEMORY_WRITE_BACK 0xFFULL - -#define MAIR_ATTR(n,value) ((value) << (((n) >> 2)*8)) - -// -// Long-descriptor Translation Table format -// - -// Return the smallest offset from the table level. -// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0 -#define TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel) (12 + ((3 - (TableLevel)) * 9)) - -#define TT_BLOCK_ENTRY_SIZE_AT_LEVEL(Level) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(Level)) - -// Get the associated entry in the given Translation Table -#define TT_GET_ENTRY_FOR_ADDRESS(TranslationTable, Level, Address) \ - ((UINTN)(TranslationTable) + ((((UINTN)(Address) >> TT_ADDRESS_OFFSET_AT_LEVEL(Level)) & (BIT9-1)) * sizeof(UINT64))) - -// Return the smallest address granularity from the table level. -// The first offset starts at 12bit. There are 4 levels of 9-bit address range from level 3 to level 0 -#define TT_ADDRESS_AT_LEVEL(TableLevel) (1ULL << TT_ADDRESS_OFFSET_AT_LEVEL(TableLevel)) - -#define TT_LAST_BLOCK_ADDRESS(TranslationTable, EntryCount) \ - ((UINT64*)((EFI_PHYSICAL_ADDRESS)(TranslationTable) + (((EntryCount) - 1) * sizeof(UINT64)))) - -// There are 512 entries per table when 4K Granularity -#define TT_ENTRY_COUNT 512 -#define TT_ALIGNMENT_BLOCK_ENTRY BIT12 -#define TT_ALIGNMENT_DESCRIPTION_TABLE BIT12 - -#define TT_ADDRESS_MASK_BLOCK_ENTRY (0xFFFFFFFFFULL << 12) -#define TT_ADDRESS_MASK_DESCRIPTION_TABLE (0xFFFFFFFFFULL << 12) - -#define TT_TYPE_MASK 0x3 -#define TT_TYPE_TABLE_ENTRY 0x3 -#define TT_TYPE_BLOCK_ENTRY 0x1 -#define TT_TYPE_BLOCK_ENTRY_LEVEL3 0x3 - -#define TT_ATTR_INDX_MASK (0x7 << 2) -#define TT_ATTR_INDX_DEVICE_MEMORY (0x0 << 2) -#define TT_ATTR_INDX_MEMORY_NON_CACHEABLE (0x1 << 2) -#define TT_ATTR_INDX_MEMORY_WRITE_THROUGH (0x2 << 2) -#define TT_ATTR_INDX_MEMORY_WRITE_BACK (0x3 << 2) - -#define TT_AP_MASK (0x3UL << 6) -#define TT_AP_NO_RW (0x0UL << 6) -#define TT_AP_RW_RW (0x1UL << 6) -#define TT_AP_NO_RO (0x2UL << 6) -#define TT_AP_RO_RO (0x3UL << 6) - -#define TT_NS BIT5 -#define TT_AF BIT10 - -#define TT_SH_NON_SHAREABLE (0x0 << 8) -#define TT_SH_OUTER_SHAREABLE (0x2 << 8) -#define TT_SH_INNER_SHAREABLE (0x3 << 8) -#define TT_SH_MASK (0x3 << 8) - -#define TT_PXN_MASK BIT53 -#define TT_UXN_MASK BIT54 // EL1&0 -#define TT_XN_MASK BIT54 // EL2 / EL3 - -#define TT_ATTRIBUTES_MASK ((0xFFFULL << 52) | (0x3FFULL << 2)) - -#define TT_TABLE_PXN BIT59 -#define TT_TABLE_UXN BIT60 // EL1&0 -#define TT_TABLE_XN BIT60 // EL2 / EL3 -#define TT_TABLE_NS BIT63 - -#define TT_TABLE_AP_MASK (BIT62 | BIT61) -#define TT_TABLE_AP_NO_PERMISSION (0x0ULL << 61) -#define TT_TABLE_AP_EL0_NO_ACCESS (0x1ULL << 61) -#define TT_TABLE_AP_NO_WRITE_ACCESS (0x2ULL << 61) - -// -// Translation Control Register -// -#define TCR_T0SZ_MASK 0x3FUL - -#define TCR_PS_4GB (0UL << 16) -#define TCR_PS_64GB (1UL << 16) -#define TCR_PS_1TB (2UL << 16) -#define TCR_PS_4TB (3UL << 16) -#define TCR_PS_16TB (4UL << 16) -#define TCR_PS_256TB (5UL << 16) - -#define TCR_TG0_4KB (0UL << 14) -#define TCR_TG1_4KB (2UL << 30) - -#define TCR_IPS_4GB (0ULL << 32) -#define TCR_IPS_64GB (1ULL << 32) -#define TCR_IPS_1TB (2ULL << 32) -#define TCR_IPS_4TB (3ULL << 32) -#define TCR_IPS_16TB (4ULL << 32) -#define TCR_IPS_256TB (5ULL << 32) - -#define TCR_EPD1 (1UL << 23) - -#define TTBR_ASID_FIELD (48) -#define TTBR_ASID_MASK (0xFF << TTBR_ASID_FIELD) -#define TTBR_BADDR_MASK (0xFFFFFFFFFFFF ) // The width of this field depends on the values in TxSZ. Addr occupies bottom 48bits - -#define TCR_EL1_T0SZ_FIELD (0) -#define TCR_EL1_EPD0_FIELD (7) -#define TCR_EL1_IRGN0_FIELD (8) -#define TCR_EL1_ORGN0_FIELD (10) -#define TCR_EL1_SH0_FIELD (12) -#define TCR_EL1_TG0_FIELD (14) -#define TCR_EL1_T1SZ_FIELD (16) -#define TCR_EL1_A1_FIELD (22) -#define TCR_EL1_EPD1_FIELD (23) -#define TCR_EL1_IRGN1_FIELD (24) -#define TCR_EL1_ORGN1_FIELD (26) -#define TCR_EL1_SH1_FIELD (28) -#define TCR_EL1_TG1_FIELD (30) -#define TCR_EL1_IPS_FIELD (32) -#define TCR_EL1_AS_FIELD (36) -#define TCR_EL1_TBI0_FIELD (37) -#define TCR_EL1_TBI1_FIELD (38) -#define TCR_EL1_T0SZ_MASK (0x1FUL << TCR_EL1_T0SZ_FIELD) -#define TCR_EL1_EPD0_MASK (0x01UL << TCR_EL1_EPD0_FIELD) -#define TCR_EL1_IRGN0_MASK (0x03UL << TCR_EL1_IRGN0_FIELD) -#define TCR_EL1_ORGN0_MASK (0x03UL << TCR_EL1_ORGN0_FIELD) -#define TCR_EL1_SH0_MASK (0x03UL << TCR_EL1_SH0_FIELD) -#define TCR_EL1_TG0_MASK (0x01UL << TCR_EL1_TG0_FIELD) -#define TCR_EL1_T1SZ_MASK (0x1FUL << TCR_EL1_T1SZ_FIELD) -#define TCR_EL1_A1_MASK (0x01UL << TCR_EL1_A1_FIELD) -#define TCR_EL1_EPD1_MASK (0x01UL << TCR_EL1_EPD1_FIELD) -#define TCR_EL1_IRGN1_MASK (0x03UL << TCR_EL1_IRGN1_FIELD) -#define TCR_EL1_ORGN1_MASK (0x03UL << TCR_EL1_ORGN1_FIELD) -#define TCR_EL1_SH1_MASK (0x03UL << TCR_EL1_SH1_FIELD) -#define TCR_EL1_TG1_MASK (0x01UL << TCR_EL1_TG1_FIELD) -#define TCR_EL1_IPS_MASK (0x07UL << TCR_EL1_IPS_FIELD) -#define TCR_EL1_AS_MASK (0x01UL << TCR_EL1_AS_FIELD) -#define TCR_EL1_TBI0_MASK (0x01UL << TCR_EL1_TBI0_FIELD) -#define TCR_EL1_TBI1_MASK (0x01UL << TCR_EL1_TBI1_FIELD) - - -#define TCR_EL23_T0SZ_FIELD (0) -#define TCR_EL23_IRGN0_FIELD (8) -#define TCR_EL23_ORGN0_FIELD (10) -#define TCR_EL23_SH0_FIELD (12) -#define TCR_EL23_TG0_FIELD (14) -#define TCR_EL23_PS_FIELD (16) -#define TCR_EL23_T0SZ_MASK (0x1FUL << TCR_EL23_T0SZ_FIELD) -#define TCR_EL23_IRGN0_MASK (0x03UL << TCR_EL23_IRGN0_FIELD) -#define TCR_EL23_ORGN0_MASK (0x03UL << TCR_EL23_ORGN0_FIELD) -#define TCR_EL23_SH0_MASK (0x03UL << TCR_EL23_SH0_FIELD) -#define TCR_EL23_TG0_MASK (0x01UL << TCR_EL23_TG0_FIELD) -#define TCR_EL23_PS_MASK (0x07UL << TCR_EL23_PS_FIELD) - - -#define TCR_RGN_OUTER_NON_CACHEABLE (0x0UL << 10) -#define TCR_RGN_OUTER_WRITE_BACK_ALLOC (0x1UL << 10) -#define TCR_RGN_OUTER_WRITE_THROUGH (0x2UL << 10) -#define TCR_RGN_OUTER_WRITE_BACK_NO_ALLOC (0x3UL << 10) - -#define TCR_RGN_INNER_NON_CACHEABLE (0x0UL << 8) -#define TCR_RGN_INNER_WRITE_BACK_ALLOC (0x1UL << 8) -#define TCR_RGN_INNER_WRITE_THROUGH (0x2UL << 8) -#define TCR_RGN_INNER_WRITE_BACK_NO_ALLOC (0x3UL << 8) - -#define TCR_SH_NON_SHAREABLE (0x0UL << 12) -#define TCR_SH_OUTER_SHAREABLE (0x2UL << 12) -#define TCR_SH_INNER_SHAREABLE (0x3UL << 12) - -#define TCR_PASZ_32BITS_4GB (0x0UL) -#define TCR_PASZ_36BITS_64GB (0x1UL) -#define TCR_PASZ_40BITS_1TB (0x2UL) -#define TCR_PASZ_42BITS_4TB (0x3UL) -#define TCR_PASZ_44BITS_16TB (0x4UL) -#define TCR_PASZ_48BITS_256TB (0x5UL) - -// The value written to the T*SZ fields are defined as 2^(64-T*SZ). So a 39Bit -// Virtual address range for 512GB of virtual space sets T*SZ to 25 -#define INPUT_ADDRESS_SIZE_TO_TxSZ(a) (64 - a) - -// Uses LPAE Page Table format - -#endif // __AARCH64_MMU_H_ - diff --git a/ArmPkg/Include/Chipset/ArmCortexA5x.h b/ArmPkg/Include/Chipset/ArmCortexA5x.h deleted file mode 100644 index ba3d5197e9..0000000000 --- a/ArmPkg/Include/Chipset/ArmCortexA5x.h +++ /dev/null @@ -1,50 +0,0 @@ -/** @file - - Copyright (c) 2012-2014, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_CORTEX_A5x_H__ -#define __ARM_CORTEX_A5x_H__ - -// -// Cortex A5x feature bit definitions -// -#define A5X_FEATURE_SMP (1 << 6) - -// -// Helper functions to access CPU Extended Control Register -// -UINT64 -EFIAPI -ArmReadCpuExCr ( - VOID - ); - -VOID -EFIAPI -ArmWriteCpuExCr ( - IN UINT64 Val - ); - -VOID -EFIAPI -ArmSetCpuExCrBit ( - IN UINT64 Bits - ); - -VOID -EFIAPI -ArmUnsetCpuExCrBit ( - IN UINT64 Bits - ); - -#endif diff --git a/ArmPkg/Include/Chipset/ArmCortexA9.h b/ArmPkg/Include/Chipset/ArmCortexA9.h deleted file mode 100644 index af9a300714..0000000000 --- a/ArmPkg/Include/Chipset/ArmCortexA9.h +++ /dev/null @@ -1,65 +0,0 @@ -/** @file - - Copyright (c) 2011, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_CORTEX_A9_H__ -#define __ARM_CORTEX_A9_H__ - -#include - -// -// Cortex A9 feature bit definitions -// -#define A9_FEATURE_PARITY (1<<9) -#define A9_FEATURE_AOW (1<<8) -#define A9_FEATURE_EXCL (1<<7) -#define A9_FEATURE_SMP (1<<6) -#define A9_FEATURE_FOZ (1<<3) -#define A9_FEATURE_DPREF (1<<2) -#define A9_FEATURE_HINT (1<<1) -#define A9_FEATURE_FWD (1<<0) - -// -// Cortex A9 Watchdog -// -#define ARM_A9_WATCHDOG_REGION 0x600 - -#define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20 -#define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28 - -#define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3) -#define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3) -#define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1) -#define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1) -#define ARM_A9_WATCHDOG_ENABLE 1 - -// -// SCU register offsets & masks -// -#define A9_SCU_CONTROL_OFFSET 0x0 -#define A9_SCU_CONFIG_OFFSET 0x4 -#define A9_SCU_INVALL_OFFSET 0xC -#define A9_SCU_FILT_START_OFFSET 0x40 -#define A9_SCU_FILT_END_OFFSET 0x44 -#define A9_SCU_SACR_OFFSET 0x50 -#define A9_SCU_SSACR_OFFSET 0x54 - - -UINTN -EFIAPI -ArmGetScuBaseAddress ( - VOID - ); - -#endif - diff --git a/ArmPkg/Include/Chipset/ArmV7.h b/ArmPkg/Include/Chipset/ArmV7.h deleted file mode 100644 index ee4ac4374b..0000000000 --- a/ArmPkg/Include/Chipset/ArmV7.h +++ /dev/null @@ -1,129 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011-2015, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_V7_H__ -#define __ARM_V7_H__ - -#include - -// ARM Interrupt ID in Exception Table -#define ARM_ARCH_EXCEPTION_IRQ EXCEPT_ARM_IRQ - -// ID_PFR1 - ARM Processor Feature Register 1 definitions -#define ARM_PFR1_SEC (0xFUL << 4) -#define ARM_PFR1_TIMER (0xFUL << 16) -#define ARM_PFR1_GIC (0xFUL << 28) - -// Domain Access Control Register -#define DOMAIN_ACCESS_CONTROL_MASK(a) (3UL << (2 * (a))) -#define DOMAIN_ACCESS_CONTROL_NONE(a) (0UL << (2 * (a))) -#define DOMAIN_ACCESS_CONTROL_CLIENT(a) (1UL << (2 * (a))) -#define DOMAIN_ACCESS_CONTROL_RESERVED(a) (2UL << (2 * (a))) -#define DOMAIN_ACCESS_CONTROL_MANAGER(a) (3UL << (2 * (a))) - -// CPSR - Coprocessor Status Register definitions -#define CPSR_MODE_USER 0x10 -#define CPSR_MODE_FIQ 0x11 -#define CPSR_MODE_IRQ 0x12 -#define CPSR_MODE_SVC 0x13 -#define CPSR_MODE_ABORT 0x17 -#define CPSR_MODE_HYP 0x1A -#define CPSR_MODE_UNDEFINED 0x1B -#define CPSR_MODE_SYSTEM 0x1F -#define CPSR_MODE_MASK 0x1F -#define CPSR_ASYNC_ABORT (1 << 8) -#define CPSR_IRQ (1 << 7) -#define CPSR_FIQ (1 << 6) - - -// CPACR - Coprocessor Access Control Register definitions -#define CPACR_CP_DENIED(cp) 0x00 -#define CPACR_CP_PRIV(cp) ((0x1 << ((cp) << 1)) & 0x0FFFFFFF) -#define CPACR_CP_FULL(cp) ((0x3 << ((cp) << 1)) & 0x0FFFFFFF) -#define CPACR_ASEDIS (1 << 31) -#define CPACR_D32DIS (1 << 30) -#define CPACR_CP_FULL_ACCESS 0x0FFFFFFF - -// NSACR - Non-Secure Access Control Register definitions -#define NSACR_CP(cp) ((1 << (cp)) & 0x3FFF) -#define NSACR_NSD32DIS (1 << 14) -#define NSACR_NSASEDIS (1 << 15) -#define NSACR_PLE (1 << 16) -#define NSACR_TL (1 << 17) -#define NSACR_NS_SMP (1 << 18) -#define NSACR_RFR (1 << 19) - -// SCR - Secure Configuration Register definitions -#define SCR_NS (1 << 0) -#define SCR_IRQ (1 << 1) -#define SCR_FIQ (1 << 2) -#define SCR_EA (1 << 3) -#define SCR_FW (1 << 4) -#define SCR_AW (1 << 5) - -// MIDR - Main ID Register definitions -#define ARM_CPU_TYPE_SHIFT 4 -#define ARM_CPU_TYPE_MASK 0xFFF -#define ARM_CPU_TYPE_AEMv8 0xD0F -#define ARM_CPU_TYPE_A53 0xD03 -#define ARM_CPU_TYPE_A57 0xD07 -#define ARM_CPU_TYPE_A15 0xC0F -#define ARM_CPU_TYPE_A12 0xC0D -#define ARM_CPU_TYPE_A9 0xC09 -#define ARM_CPU_TYPE_A7 0xC07 -#define ARM_CPU_TYPE_A5 0xC05 - -#define ARM_CPU_REV_MASK ((0xF << 20) | (0xF) ) -#define ARM_CPU_REV(rn, pn) ((((rn) & 0xF) << 20) | ((pn) & 0xF)) - -#define ARM_VECTOR_TABLE_ALIGNMENT ((1 << 5)-1) - -VOID -EFIAPI -ArmEnableSWPInstruction ( - VOID - ); - -UINTN -EFIAPI -ArmReadCbar ( - VOID - ); - -UINTN -EFIAPI -ArmReadTpidrurw ( - VOID - ); - -VOID -EFIAPI -ArmWriteTpidrurw ( - UINTN Value - ); - -UINT32 -EFIAPI -ArmReadNsacr ( - VOID - ); - -VOID -EFIAPI -ArmWriteNsacr ( - IN UINT32 Nsacr - ); - -#endif // __ARM_V7_H__ diff --git a/ArmPkg/Include/Chipset/ArmV7Mmu.h b/ArmPkg/Include/Chipset/ArmV7Mmu.h deleted file mode 100644 index 4d913824b4..0000000000 --- a/ArmPkg/Include/Chipset/ArmV7Mmu.h +++ /dev/null @@ -1,244 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2013, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARMV7_MMU_H_ -#define __ARMV7_MMU_H_ - -#define TTBR_NOT_OUTER_SHAREABLE BIT5 -#define TTBR_RGN_OUTER_NON_CACHEABLE 0 -#define TTBR_RGN_OUTER_WRITE_BACK_ALLOC BIT3 -#define TTBR_RGN_OUTER_WRITE_THROUGH BIT4 -#define TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC (BIT3|BIT4) -#define TTBR_SHAREABLE BIT1 -#define TTBR_NON_SHAREABLE 0 -#define TTBR_INNER_CACHEABLE BIT0 -#define TTBR_INNER_NON_CACHEABLE 0 -#define TTBR_RGN_INNER_NON_CACHEABLE 0 -#define TTBR_RGN_INNER_WRITE_BACK_ALLOC BIT6 -#define TTBR_RGN_INNER_WRITE_THROUGH BIT0 -#define TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC (BIT0|BIT6) - -#define TTBR_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE) -#define TTBR_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE) -#define TTBR_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_INNER_NON_CACHEABLE ) -#define TTBR_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_INNER_CACHEABLE | TTBR_SHAREABLE) - -#define TTBR_MP_WRITE_THROUGH ( TTBR_RGN_OUTER_WRITE_THROUGH | TTBR_RGN_INNER_WRITE_THROUGH | TTBR_SHAREABLE) -#define TTBR_MP_WRITE_BACK_NO_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_NO_ALLOC | TTBR_RGN_INNER_WRITE_BACK_NO_ALLOC | TTBR_SHAREABLE) -#define TTBR_MP_NON_CACHEABLE ( TTBR_RGN_OUTER_NON_CACHEABLE | TTBR_RGN_INNER_NON_CACHEABLE ) -#define TTBR_MP_WRITE_BACK_ALLOC ( TTBR_RGN_OUTER_WRITE_BACK_ALLOC | TTBR_RGN_INNER_WRITE_BACK_ALLOC | TTBR_SHAREABLE) - - -#define TRANSLATION_TABLE_SECTION_COUNT 4096 -#define TRANSLATION_TABLE_SECTION_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT) -#define TRANSLATION_TABLE_SECTION_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_SECTION_COUNT) -#define TRANSLATION_TABLE_SECTION_ALIGNMENT_MASK (TRANSLATION_TABLE_SECTION_ALIGNMENT - 1) - -#define TRANSLATION_TABLE_PAGE_COUNT 256 -#define TRANSLATION_TABLE_PAGE_SIZE (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT) -#define TRANSLATION_TABLE_PAGE_ALIGNMENT (sizeof(UINT32) * TRANSLATION_TABLE_PAGE_COUNT) -#define TRANSLATION_TABLE_PAGE_ALIGNMENT_MASK (TRANSLATION_TABLE_PAGE_ALIGNMENT - 1) - -#define TRANSLATION_TABLE_ENTRY_FOR_VIRTUAL_ADDRESS(table, address) ((UINT32 *)(table) + (((UINTN)(address)) >> 20)) - -// Translation table descriptor types -#define TT_DESCRIPTOR_SECTION_TYPE_MASK ((1UL << 18) | (3UL << 0)) -#define TT_DESCRIPTOR_SECTION_TYPE_FAULT (0UL << 0) -#define TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE (1UL << 0) -#define TT_DESCRIPTOR_SECTION_TYPE_SECTION ((0UL << 18) | (2UL << 0)) -#define TT_DESCRIPTOR_SECTION_TYPE_SUPERSECTION ((1UL << 18) | (2UL << 0)) -#define TT_DESCRIPTOR_SECTION_TYPE_IS_PAGE_TABLE(Desc) (((Desc) & 3UL) == TT_DESCRIPTOR_SECTION_TYPE_PAGE_TABLE) - -// Translation table descriptor types -#define TT_DESCRIPTOR_PAGE_TYPE_MASK (3UL << 0) -#define TT_DESCRIPTOR_PAGE_TYPE_FAULT (0UL << 0) -#define TT_DESCRIPTOR_PAGE_TYPE_PAGE (2UL << 0) -#define TT_DESCRIPTOR_PAGE_TYPE_PAGE_XN (3UL << 0) -#define TT_DESCRIPTOR_PAGE_TYPE_LARGEPAGE (1UL << 0) - -// Section descriptor definitions -#define TT_DESCRIPTOR_SECTION_SIZE (0x00100000) - -#define TT_DESCRIPTOR_SECTION_NS_MASK (1UL << 19) -#define TT_DESCRIPTOR_SECTION_NS (1UL << 19) - -#define TT_DESCRIPTOR_SECTION_NG_MASK (1UL << 17) -#define TT_DESCRIPTOR_SECTION_NG_GLOBAL (0UL << 17) -#define TT_DESCRIPTOR_SECTION_NG_LOCAL (1UL << 17) - -#define TT_DESCRIPTOR_PAGE_NG_MASK (1UL << 11) -#define TT_DESCRIPTOR_PAGE_NG_GLOBAL (0UL << 11) -#define TT_DESCRIPTOR_PAGE_NG_LOCAL (1UL << 11) - -#define TT_DESCRIPTOR_SECTION_S_MASK (1UL << 16) -#define TT_DESCRIPTOR_SECTION_S_NOT_SHARED (0UL << 16) -#define TT_DESCRIPTOR_SECTION_S_SHARED (1UL << 16) - -#define TT_DESCRIPTOR_PAGE_S_MASK (1UL << 10) -#define TT_DESCRIPTOR_PAGE_S_NOT_SHARED (0UL << 10) -#define TT_DESCRIPTOR_PAGE_S_SHARED (1UL << 10) - -#define TT_DESCRIPTOR_SECTION_AP_MASK ((1UL << 15) | (3UL << 10)) -#define TT_DESCRIPTOR_SECTION_AP_NO_NO ((0UL << 15) | (0UL << 10)) -#define TT_DESCRIPTOR_SECTION_AP_RW_NO ((0UL << 15) | (1UL << 10)) -#define TT_DESCRIPTOR_SECTION_AP_RW_RO ((0UL << 15) | (2UL << 10)) -#define TT_DESCRIPTOR_SECTION_AP_RW_RW ((0UL << 15) | (3UL << 10)) -#define TT_DESCRIPTOR_SECTION_AP_RO_NO ((1UL << 15) | (1UL << 10)) -#define TT_DESCRIPTOR_SECTION_AP_RO_RO ((1UL << 15) | (3UL << 10)) - -#define TT_DESCRIPTOR_PAGE_AP_MASK ((1UL << 9) | (3UL << 4)) -#define TT_DESCRIPTOR_PAGE_AP_NO_NO ((0UL << 9) | (0UL << 4)) -#define TT_DESCRIPTOR_PAGE_AP_RW_NO ((0UL << 9) | (1UL << 4)) -#define TT_DESCRIPTOR_PAGE_AP_RW_RO ((0UL << 9) | (2UL << 4)) -#define TT_DESCRIPTOR_PAGE_AP_RW_RW ((0UL << 9) | (3UL << 4)) -#define TT_DESCRIPTOR_PAGE_AP_RO_NO ((1UL << 9) | (1UL << 4)) -#define TT_DESCRIPTOR_PAGE_AP_RO_RO ((1UL << 9) | (3UL << 4)) - -#define TT_DESCRIPTOR_SECTION_XN_MASK (0x1UL << 4) -#define TT_DESCRIPTOR_PAGE_XN_MASK (0x1UL << 0) -#define TT_DESCRIPTOR_LARGEPAGE_XN_MASK (0x1UL << 15) - -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHEABLE_MASK (1UL << 3) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2)) - -#define TT_DESCRIPTOR_PAGE_SIZE (0x00001000) - -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK ((3UL << 6) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHEABLE_MASK (1UL << 3) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 6) | (0UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 6) | (0UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 6) | (1UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 6) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 6) | (0UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 6) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 6) | (0UL << 3) | (0UL << 2)) - -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK ((3UL << 12) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_STRONGLY_ORDERED ((0UL << 12) | (0UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_SHAREABLE_DEVICE ((0UL << 12) | (0UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC ((0UL << 12) | (1UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_NO_ALLOC ((0UL << 12) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_CACHEABLE ((1UL << 12) | (0UL << 3) | (0UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_WRITE_BACK_ALLOC ((1UL << 12) | (1UL << 3) | (1UL << 2)) -#define TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_NON_SHAREABLE_DEVICE ((2UL << 12) | (0UL << 3) | (0UL << 2)) - -#define TT_DESCRIPTOR_CONVERT_TO_PAGE_AP(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_AP_MASK) >> 6) & TT_DESCRIPTOR_PAGE_AP_MASK) -#define TT_DESCRIPTOR_CONVERT_TO_PAGE_NG(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_NG_MASK) >> 6) & TT_DESCRIPTOR_PAGE_NG_MASK) -#define TT_DESCRIPTOR_CONVERT_TO_PAGE_S(Desc) ((((Desc) & TT_DESCRIPTOR_SECTION_S_MASK) >> 6) & TT_DESCRIPTOR_PAGE_S_MASK) -#define TT_DESCRIPTOR_CONVERT_TO_PAGE_XN(Desc,IsLargePage) ((IsLargePage)? \ - ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) << 11) & TT_DESCRIPTOR_LARGEPAGE_XN_MASK): \ - ((((Desc) & TT_DESCRIPTOR_SECTION_XN_MASK) >> 4) & TT_DESCRIPTOR_PAGE_XN_MASK)) -#define TT_DESCRIPTOR_CONVERT_TO_PAGE_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \ - (((Desc) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK): \ - (((((Desc) & (0x3 << 12)) >> 6) | (Desc & (0x3 << 2))))) - -#define TT_DESCRIPTOR_CONVERT_TO_SECTION_AP(Desc) ((((Desc) & TT_DESCRIPTOR_PAGE_AP_MASK) << 6) & TT_DESCRIPTOR_SECTION_AP_MASK) - -#define TT_DESCRIPTOR_CONVERT_TO_SECTION_CACHE_POLICY(Desc,IsLargePage) (IsLargePage? \ - (((Desc) & TT_DESCRIPTOR_LARGEPAGE_CACHE_POLICY_MASK) & TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK): \ - (((((Desc) & (0x3 << 6)) << 6) | (Desc & (0x3 << 2))))) - -#define TT_DESCRIPTOR_SECTION_ATTRIBUTE_MASK (TT_DESCRIPTOR_SECTION_NS_MASK | TT_DESCRIPTOR_SECTION_NG_MASK | \ - TT_DESCRIPTOR_SECTION_S_MASK | TT_DESCRIPTOR_SECTION_AP_MASK | \ - TT_DESCRIPTOR_SECTION_XN_MASK | TT_DESCRIPTOR_SECTION_CACHE_POLICY_MASK) - -#define TT_DESCRIPTOR_PAGE_ATTRIBUTE_MASK (TT_DESCRIPTOR_PAGE_NG_MASK | TT_DESCRIPTOR_PAGE_S_MASK | \ - TT_DESCRIPTOR_PAGE_AP_MASK | TT_DESCRIPTOR_PAGE_XN_MASK | \ - TT_DESCRIPTOR_PAGE_CACHE_POLICY_MASK) - -#define TT_DESCRIPTOR_SECTION_DOMAIN_MASK (0x0FUL << 5) -#define TT_DESCRIPTOR_SECTION_DOMAIN(a) (((a) & 0x0FUL) << 5) - -#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK (0xFFF00000) -#define TT_DESCRIPTOR_SECTION_PAGETABLE_ADDRESS_MASK (0xFFFFFC00) -#define TT_DESCRIPTOR_SECTION_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_SECTION_BASE_ADDRESS_MASK) -#define TT_DESCRIPTOR_SECTION_BASE_SHIFT 20 - -#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK (0xFFFFF000) -#define TT_DESCRIPTOR_PAGE_INDEX_MASK (0x000FF000) -#define TT_DESCRIPTOR_PAGE_BASE_ADDRESS(a) ((a) & TT_DESCRIPTOR_PAGE_BASE_ADDRESS_MASK) -#define TT_DESCRIPTOR_PAGE_BASE_SHIFT 12 - -#define TT_DESCRIPTOR_SECTION_WRITE_BACK(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_BACK_ALLOC) -#define TT_DESCRIPTOR_SECTION_WRITE_THROUGH(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC) -#define TT_DESCRIPTOR_SECTION_DEVICE(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_XN_MASK | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_SHAREABLE_DEVICE) -#define TT_DESCRIPTOR_SECTION_UNCACHED(NonSecure) (TT_DESCRIPTOR_SECTION_TYPE_SECTION | \ - ((NonSecure) ? TT_DESCRIPTOR_SECTION_NS : 0) | \ - TT_DESCRIPTOR_SECTION_NG_GLOBAL | \ - TT_DESCRIPTOR_SECTION_S_NOT_SHARED | \ - TT_DESCRIPTOR_SECTION_DOMAIN(0) | \ - TT_DESCRIPTOR_SECTION_AP_RW_RW | \ - TT_DESCRIPTOR_SECTION_CACHE_POLICY_NON_CACHEABLE) - -#define TT_DESCRIPTOR_PAGE_WRITE_BACK (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \ - TT_DESCRIPTOR_PAGE_NG_GLOBAL | \ - TT_DESCRIPTOR_PAGE_S_SHARED | \ - TT_DESCRIPTOR_PAGE_AP_RW_RW | \ - TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_BACK_ALLOC) -#define TT_DESCRIPTOR_PAGE_WRITE_THROUGH (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \ - TT_DESCRIPTOR_PAGE_NG_GLOBAL | \ - TT_DESCRIPTOR_PAGE_S_SHARED | \ - TT_DESCRIPTOR_PAGE_AP_RW_RW | \ - TT_DESCRIPTOR_PAGE_CACHE_POLICY_WRITE_THROUGH_NO_ALLOC) -#define TT_DESCRIPTOR_PAGE_DEVICE (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \ - TT_DESCRIPTOR_PAGE_NG_GLOBAL | \ - TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \ - TT_DESCRIPTOR_PAGE_AP_RW_RW | \ - TT_DESCRIPTOR_PAGE_XN_MASK | \ - TT_DESCRIPTOR_PAGE_CACHE_POLICY_SHAREABLE_DEVICE) -#define TT_DESCRIPTOR_PAGE_UNCACHED (TT_DESCRIPTOR_PAGE_TYPE_PAGE | \ - TT_DESCRIPTOR_PAGE_NG_GLOBAL | \ - TT_DESCRIPTOR_PAGE_S_NOT_SHARED | \ - TT_DESCRIPTOR_PAGE_AP_RW_RW | \ - TT_DESCRIPTOR_PAGE_CACHE_POLICY_NON_CACHEABLE) - -// First Level Descriptors -typedef UINT32 ARM_FIRST_LEVEL_DESCRIPTOR; - -// Second Level Descriptors -typedef UINT32 ARM_PAGE_TABLE_ENTRY; - -UINT32 -ConvertSectionAttributesToPageAttributes ( - IN UINT32 SectionAttributes, - IN BOOLEAN IsLargePage - ); - -#endif diff --git a/ArmPkg/Include/Guid/ArmMpCoreInfo.h b/ArmPkg/Include/Guid/ArmMpCoreInfo.h deleted file mode 100644 index 07dec5dc48..0000000000 --- a/ArmPkg/Include/Guid/ArmMpCoreInfo.h +++ /dev/null @@ -1,66 +0,0 @@ -/** @file -* -* Copyright (c) 2011, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_MP_CORE_INFO_GUID_H_ -#define __ARM_MP_CORE_INFO_GUID_H_ - -#define MAX_CPUS_PER_MPCORE_SYSTEM 0x04 -#define SCU_CONFIG_REG_OFFSET 0x04 -#define MPIDR_U_BIT_MASK 0x40000000 - -typedef struct { - UINT32 ClusterId; - UINT32 CoreId; - - // MP Core Mailbox - EFI_PHYSICAL_ADDRESS MailboxSetAddress; - EFI_PHYSICAL_ADDRESS MailboxGetAddress; - EFI_PHYSICAL_ADDRESS MailboxClearAddress; - UINT64 MailboxClearValue; -} ARM_CORE_INFO; - -typedef struct{ - UINT64 Signature; - UINT32 Length; - UINT32 Revision; - UINT64 OemId; - UINT64 OemTableId; - UINTN OemRevision; - UINTN CreatorId; - UINTN CreatorRevision; - EFI_GUID Identifier; - UINTN DataLen; -} ARM_PROCESSOR_TABLE_HEADER; - -typedef struct { - ARM_PROCESSOR_TABLE_HEADER Header; - UINTN NumberOfEntries; - ARM_CORE_INFO *ArmCpus; -} ARM_PROCESSOR_TABLE; - - -#define ARM_MP_CORE_INFO_GUID \ - { 0xa4ee0728, 0xe5d7, 0x4ac5, {0xb2, 0x1e, 0x65, 0x8e, 0xd8, 0x57, 0xe8, 0x34} } - -#define EFI_ARM_PROCESSOR_TABLE_SIGNATURE SIGNATURE_64 ('C', 'P', 'U', 'T', 'A', 'B', 'L', 'E') -#define EFI_ARM_PROCESSOR_TABLE_REVISION 0x00010000 //1.0 -#define EFI_ARM_PROCESSOR_TABLE_OEM_ID SIGNATURE_64('A','R','M',' ', 'L', 't', 'd', ' ') -#define EFI_ARM_PROCESSOR_TABLE_OEM_TABLE_ID SIGNATURE_64('V', 'E', 'R', 'S', 'A', 'T', 'I', 'L') -#define EFI_ARM_PROCESSOR_TABLE_OEM_REVISION 0x00000001 -#define EFI_ARM_PROCESSOR_TABLE_CREATOR_ID 0xA5A5A5A5 -#define EFI_ARM_PROCESSOR_TABLE_CREATOR_REVISION 0x01000001 - -extern EFI_GUID gArmMpCoreInfoGuid; - -#endif /* MPCOREINFO_H_ */ diff --git a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h b/ArmPkg/Include/IndustryStandard/ArmStdSmc.h deleted file mode 100644 index 593a3ce729..0000000000 --- a/ArmPkg/Include/IndustryStandard/ArmStdSmc.h +++ /dev/null @@ -1,96 +0,0 @@ -/** @file -* -* Copyright (c) 2012-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_STD_SMC_H__ -#define __ARM_STD_SMC_H__ - -/* - * SMC function IDs for Standard Service queries - */ - -#define ARM_SMC_ID_STD_CALL_COUNT 0x8400ff00 -#define ARM_SMC_ID_STD_UID 0x8400ff01 -/* 0x8400ff02 is reserved */ -#define ARM_SMC_ID_STD_REVISION 0x8400ff03 - -/* - * The 'Standard Service Call UID' is supposed to return the Standard - * Service UUID. This is a 128-bit value. - */ -#define ARM_SMC_STD_UUID0 0x108d905b -#define ARM_SMC_STD_UUID1 0x47e8f863 -#define ARM_SMC_STD_UUID2 0xfbc02dae -#define ARM_SMC_STD_UUID3 0xe2f64156 - -/* - * ARM Standard Service Calls revision numbers - * The current revision is: 0.1 - */ -#define ARM_SMC_STD_REVISION_MAJOR 0x0 -#define ARM_SMC_STD_REVISION_MINOR 0x1 - -/* - * Power State Coordination Interface (PSCI) calls cover a subset of the - * Standard Service Call range. - * The list below is not exhaustive. - */ -#define ARM_SMC_ID_PSCI_VERSION 0x84000000 -#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64 0xc4000001 -#define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32 0x84000001 -#define ARM_SMC_ID_PSCI_CPU_OFF 0x84000002 -#define ARM_SMC_ID_PSCI_CPU_ON_AARCH64 0xc4000003 -#define ARM_SMC_ID_PSCI_CPU_ON_AARCH32 0x84000003 -#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64 0xc4000004 -#define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32 0x84000004 -#define ARM_SMC_ID_PSCI_MIGRATE_AARCH64 0xc4000005 -#define ARM_SMC_ID_PSCI_MIGRATE_AARCH32 0x84000005 -#define ARM_SMC_ID_PSCI_SYSTEM_OFF 0x84000008 -#define ARM_SMC_ID_PSCI_SYSTEM_RESET 0x84000009 - -/* The current PSCI version is: 0.2 */ -#define ARM_SMC_PSCI_VERSION_MAJOR 0 -#define ARM_SMC_PSCI_VERSION_MINOR 2 -#define ARM_SMC_PSCI_VERSION \ - ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR) - -/* PSCI return error codes */ -#define ARM_SMC_PSCI_RET_SUCCESS 0 -#define ARM_SMC_PSCI_RET_NOT_SUPPORTED -1 -#define ARM_SMC_PSCI_RET_INVALID_PARAMS -2 -#define ARM_SMC_PSCI_RET_DENIED -3 -#define ARM_SMC_PSCI_RET_ALREADY_ON -4 -#define ARM_SMC_PSCI_RET_ON_PENDING -5 -#define ARM_SMC_PSCI_RET_INTERN_FAIL -6 -#define ARM_SMC_PSCI_RET_NOT_PRESENT -7 -#define ARM_SMC_PSCI_RET_DISABLED -8 - -#define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \ - ((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF)) - -#define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \ - ((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF)) - -#define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId) ((TargetId) & 0xFF) -#define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId) (((TargetId) >> 8) & 0xFF) - -#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0 0 -#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1 1 -#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2 2 -#define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3 3 - -#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON 0 -#define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF 1 -#define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING 2 - -#endif diff --git a/ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h b/ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h deleted file mode 100644 index 71b4327ebf..0000000000 --- a/ArmPkg/Include/IndustryStandard/ArmTrustZoneSmc.h +++ /dev/null @@ -1,161 +0,0 @@ -/** @file -* -* Copyright (c) 2012-2013, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_TRUSTZONE_SMC_H__ -#define __ARM_TRUSTZONE_SMC_H__ - -#define ARM_TRUSTZONE_UID_4LETTERID 0x1 -#define ARM_TRUSTZONE_UID_MD5 0x2 - -#define ARM_TRUSTZONE_ARM_UID 0x40524d48 // "ARMH" - -#define IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,Region) (((UINTN)(Rx) >= (UINTN)ARM_TRUSTZONE_##Region##_SMC_ID_START) && ((UINTN)(Rx) <= (UINTN)ARM_TRUSTZONE_##Region##_SMC_ID_END)) - -#define IS_ARM_TRUSTZONE_DEPRECIATED_SMC(Rx) ((UINTN)(Rx) <= (UINTN)ARM_TRUSTZONE_DEPRECIATED_SMC_ID_END) -#define IS_ARM_TRUSTZONE_TRUSTED_OS_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,TRUSTED_OS) -#define IS_ARM_TRUSTZONE_ARM_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,ARM_FAST) -#define IS_ARM_TRUSTZONE_SIP_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,SIP_FAST) -#define IS_ARM_TRUSTZONE_ODM_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,ODM_FAST) -#define IS_ARM_TRUSTZONE_OEM_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,OEM_FAST) -#define IS_ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,TRUSTED_USER_FAST) -#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC(Rx,TRUSTED_OS_FAST) - -#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,Region) ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_PRESENCE) -#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,Region) (((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID) || \ - ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+1) || \ - ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+2) || \ - ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+3) || \ - ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_UID+4)) -#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,Region) (((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_REVISION) || \ - ((Rx) == ARM_TRUSTZONE_##Region##_SMC_ID_REVISION+1)) -#define IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,Region) (((Rx) >= ARM_TRUSTZONE_##Region##_SMC_ID_RPC_START) && \ - ((Rx) <= ARM_TRUSTZONE_##Region##_SMC_ID_RPC_END)) - -#define ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,Region) ((Rx) - ARM_TRUSTZONE_##Region##_SMC_ID_UID) -#define ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,Region) ((Rx) - ARM_TRUSTZONE_##Region##_SMC_ID_REVISION) -#define ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,Region) ((Rx) - ARM_TRUSTZONE_##Region##_SMC_ID_RPC_START) - -#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,TRUSTED_OS) - -#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,ARM_FAST) -#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,ARM_FAST) -#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,ARM_FAST) -#define IS_ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,ARM_FAST) -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,ARM_FAST) -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,ARM_FAST) -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,ARM_FAST) - -#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,ODM_FAST) -#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,ODM_FAST) -#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,ODM_FAST) -#define IS_ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,ODM_FAST) -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,ODM_FAST) -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,ODM_FAST) -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,ODM_FAST) - -#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,OEM_FAST) -#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,OEM_FAST) -#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,OEM_FAST) -#define IS_ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,OEM_FAST) -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,OEM_FAST) -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,OEM_FAST) -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,OEM_FAST) - -#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,SIP_FAST) -#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,SIP_FAST) -#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,SIP_FAST) -#define IS_ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,SIP_FAST) -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,SIP_FAST) -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,SIP_FAST) -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,SIP_FAST) - -#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,TRUSTED_USER_FAST) - -#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_PRESENCE(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_PRESENCE(Rx,TRUSTED_OS_FAST) -#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_UID(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID(Rx,TRUSTED_OS_FAST) -#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_REVISION(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION(Rx,TRUSTED_OS_FAST) -#define IS_ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC(Rx) IS_ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC(Rx,TRUSTED_OS_FAST) -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_UID_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_UID_INDEX(Rx,TRUSTED_OS_FAST) -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_REVISION_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_REVISION_INDEX(Rx,TRUSTED_OS_FAST) -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC_INDEX(Rx) ARM_TRUSTZONE_SUPPORTED_SMC_ID_RPC_INDEX(Rx,TRUSTED_OS_FAST) - - -#define ARM_TRUSTZONE_DEPRECIATED_SMC_ID_START 0x00000000 -#define ARM_TRUSTZONE_DEPRECIATED_SMC_ID_END 0x01FFFFFF - - -#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_START 0x02000000 -#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_END 0x1FFFFFFF - -#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_RPC_START 0x02000000 -#define ARM_TRUSTZONE_TRUSTED_OS_SMC_ID_RPC_END 0x1FFFFFFF - - -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_START 0x80000000 -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_END 0x80FFFFFF - -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC_START 0x80000000 -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_RPC_END 0x80FFFEFF -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_PRESENCE 0x80FFFF00 -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_UID 0x80FFFF10 -#define ARM_TRUSTZONE_ARM_FAST_SMC_ID_REVISION 0x80FFFF20 - - -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_START 0x81000000 -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_END 0x81FFFFFF - -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC_START 0x81000000 -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_RPC_END 0x81FFFEFF -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_PRESENCE 0x81FFFF00 -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_UID 0x81FFFF10 -#define ARM_TRUSTZONE_SIP_FAST_SMC_ID_REVISION 0x81FFFF20 - - -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_START 0x82000000 -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_END 0x82FFFFFF - -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC_START 0x82000000 -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_RPC_END 0x82FFFEFF -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_PRESENCE 0x82FFFF00 -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_UID 0x82FFFF10 -#define ARM_TRUSTZONE_ODM_FAST_SMC_ID_REVISION 0x82FFFF20 - - -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_START 0x83000000 -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_END 0x83FFFFFF - -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC_START 0x83000000 -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_RPC_END 0x83FFFEFF -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_PRESENCE 0x83FFFF00 -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_UID 0x83FFFF10 -#define ARM_TRUSTZONE_OEM_FAST_SMC_ID_REVISION 0x83FFFF20 - - -#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_START 0xF0000000 -#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_END 0xF1FFFFFF - -#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_RPC_START 0xF0000000 -#define ARM_TRUSTZONE_TRUSTED_USER_FAST_SMC_ID_RPC_END 0xF1FFFEFF - - -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_START 0xF2000000 -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_END 0xFFFFFFFF - -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC_START 0xF2000000 -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_RPC_END 0xFFFFFEFF -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_PRESENCE 0xF2FFFF00 -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_UID 0xF2FFFF10 -#define ARM_TRUSTZONE_TRUSTED_OS_FAST_SMC_ID_REVISION 0xF2FFFF20 - -#endif diff --git a/ArmPkg/Include/Library/ArmDisassemblerLib.h b/ArmPkg/Include/Library/ArmDisassemblerLib.h deleted file mode 100644 index d6a493f2cb..0000000000 --- a/ArmPkg/Include/Library/ArmDisassemblerLib.h +++ /dev/null @@ -1,43 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_DISASSEBLER_LIB_H__ -#define __ARM_DISASSEBLER_LIB_H__ - -/** - Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to - point to next instructin. - - We cheat and only decode instructions that access - memory. If the instruction is not found we dump the instruction in hex. - - @param OpCodePtrPtr Pointer to pointer of ARM Thumb instruction to disassemble. - @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream - @param Extended TRUE dump hex for instruction too. - @param ItBlock Size of IT Block - @param Buf Buffer to sprintf disassembly into. - @param Size Size of Buf in bytes. - -**/ -VOID -DisassembleInstruction ( - IN UINT8 **OpCodePtr, - IN BOOLEAN Thumb, - IN BOOLEAN Extended, - IN OUT UINT32 *ItBlock, - OUT CHAR8 *Buf, - OUT UINTN Size - ); - -#endif diff --git a/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h b/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h deleted file mode 100644 index 805025baa1..0000000000 --- a/ArmPkg/Include/Library/ArmGenericTimerCounterLib.h +++ /dev/null @@ -1,85 +0,0 @@ -/** @file - - Copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.
- Copyright (c) 2014, Linaro Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_GENERIC_TIMER_COUNTER_LIB_H__ -#define __ARM_GENERIC_TIMER_COUNTER_LIB_H__ - -VOID -EFIAPI -ArmGenericTimerEnableTimer ( - VOID - ); - -VOID -EFIAPI -ArmGenericTimerDisableTimer ( - VOID - ); - -VOID -EFIAPI -ArmGenericTimerSetTimerFreq ( - IN UINTN FreqInHz - ); - -UINTN -EFIAPI -ArmGenericTimerGetTimerFreq ( - VOID - ); - -VOID -EFIAPI -ArmGenericTimerSetTimerVal ( - IN UINTN Value - ); - -UINTN -EFIAPI -ArmGenericTimerGetTimerVal ( - VOID - ); - -UINT64 -EFIAPI -ArmGenericTimerGetSystemCount ( - VOID - ); - -UINTN -EFIAPI -ArmGenericTimerGetTimerCtrlReg ( - VOID - ); - -VOID -EFIAPI -ArmGenericTimerSetTimerCtrlReg ( - UINTN Value - ); - -UINT64 -EFIAPI -ArmGenericTimerGetCompareVal ( - VOID - ); - -VOID -EFIAPI -ArmGenericTimerSetCompareVal ( - IN UINT64 Value - ); - -#endif diff --git a/ArmPkg/Include/Library/ArmGicArchLib.h b/ArmPkg/Include/Library/ArmGicArchLib.h deleted file mode 100644 index e6964a2d57..0000000000 --- a/ArmPkg/Include/Library/ArmGicArchLib.h +++ /dev/null @@ -1,33 +0,0 @@ -/** @file -* -* Copyright (c) 2015, Linaro Ltd. All rights reserved. -* -* This program and the accompanying materials are licensed and made available -* under the terms and conditions of the BSD License which accompanies this -* distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_GIC_ARCH_LIB_H__ -#define __ARM_GIC_ARCH_LIB_H__ - -// -// GIC definitions -// -typedef enum { - ARM_GIC_ARCH_REVISION_2, - ARM_GIC_ARCH_REVISION_3 -} ARM_GIC_ARCH_REVISION; - - -ARM_GIC_ARCH_REVISION -EFIAPI -ArmGicGetSupportedArchRevision ( - VOID - ); - -#endif diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/ArmGicLib.h deleted file mode 100644 index 4364f3ffef..0000000000 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ /dev/null @@ -1,317 +0,0 @@ -/** @file -* -* Copyright (c) 2011-2015, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARMGIC_H -#define __ARMGIC_H - -#include - -// -// GIC Distributor -// -#define ARM_GIC_ICDDCR 0x000 // Distributor Control Register -#define ARM_GIC_ICDICTR 0x004 // Interrupt Controller Type Register -#define ARM_GIC_ICDIIDR 0x008 // Implementer Identification Register - -// Each reg base below repeats for Number of interrupts / 4 (see GIC spec) -#define ARM_GIC_ICDISR 0x080 // Interrupt Security Registers -#define ARM_GIC_ICDISER 0x100 // Interrupt Set-Enable Registers -#define ARM_GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers -#define ARM_GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers -#define ARM_GIC_ICDICPR 0x280 // Interrupt Clear-Pending Registers -#define ARM_GIC_ICDABR 0x300 // Active Bit Registers - -// Each reg base below repeats for Number of interrupts / 4 -#define ARM_GIC_ICDIPR 0x400 // Interrupt Priority Registers - -// Each reg base below repeats for Number of interrupts -#define ARM_GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers -#define ARM_GIC_ICDICFR 0xC00 // Interrupt Configuration Registers - -#define ARM_GIC_ICDPPISR 0xD00 // PPI Status register - -// just one of these -#define ARM_GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register - -// GICv3 specific registers -#define ARM_GICD_IROUTER 0x6100 // Interrupt Routing Registers - -// GICD_CTLR bits -#define ARM_GIC_ICDDCR_ARE (1 << 4) // Affinity Routing Enable (ARE) -#define ARM_GIC_ICDDCR_DS (1 << 6) // Disable Security (DS) - -// -// GIC Redistributor -// - -#define ARM_GICR_CTLR_FRAME_SIZE SIZE_64KB -#define ARM_GICR_SGI_PPI_FRAME_SIZE SIZE_64KB - -// GIC Redistributor Control frame -#define ARM_GICR_TYPER 0x0008 // Redistributor Type Register - -// GIC SGI & PPI Redistributor frame -#define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers -#define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers - -// -// GIC Cpu interface -// -#define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register -#define ARM_GIC_ICCPMR 0x04 // Interrupt Priority Mask Register -#define ARM_GIC_ICCBPR 0x08 // Binary Point Register -#define ARM_GIC_ICCIAR 0x0C // Interrupt Acknowledge Register -#define ARM_GIC_ICCEIOR 0x10 // End Of Interrupt Register -#define ARM_GIC_ICCRPR 0x14 // Running Priority Register -#define ARM_GIC_ICCPIR 0x18 // Highest Pending Interrupt Register -#define ARM_GIC_ICCABPR 0x1C // Aliased Binary Point Register -#define ARM_GIC_ICCIIDR 0xFC // Identification Register - -#define ARM_GIC_ICDSGIR_FILTER_TARGETLIST 0x0 -#define ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE 0x1 -#define ARM_GIC_ICDSGIR_FILTER_ITSELF 0x2 - -// Bit-masks to configure the CPU Interface Control register -#define ARM_GIC_ICCICR_ENABLE_SECURE 0x01 -#define ARM_GIC_ICCICR_ENABLE_NS 0x02 -#define ARM_GIC_ICCICR_ACK_CTL 0x04 -#define ARM_GIC_ICCICR_SIGNAL_SECURE_TO_FIQ 0x08 -#define ARM_GIC_ICCICR_USE_SBPR 0x10 - -// Bit Mask for GICC_IIDR -#define ARM_GIC_ICCIIDR_GET_PRODUCT_ID(IccIidr) (((IccIidr) >> 20) & 0xFFF) -#define ARM_GIC_ICCIIDR_GET_ARCH_VERSION(IccIidr) (((IccIidr) >> 16) & 0xF) -#define ARM_GIC_ICCIIDR_GET_REVISION(IccIidr) (((IccIidr) >> 12) & 0xF) -#define ARM_GIC_ICCIIDR_GET_IMPLEMENTER(IccIidr) ((IccIidr) & 0xFFF) - -// Bit Mask for -#define ARM_GIC_ICCIAR_ACKINTID 0x3FF - -UINTN -EFIAPI -ArmGicGetInterfaceIdentification ( - IN INTN GicInterruptInterfaceBase - ); - -// -// GIC Secure interfaces -// -VOID -EFIAPI -ArmGicSetupNonSecure ( - IN UINTN MpId, - IN INTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase - ); - -VOID -EFIAPI -ArmGicSetSecureInterrupts ( - IN UINTN GicDistributorBase, - IN UINTN* GicSecureInterruptMask, - IN UINTN GicSecureInterruptMaskSize - ); - -VOID -EFIAPI -ArmGicEnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ); - -VOID -EFIAPI -ArmGicDisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ); - -VOID -EFIAPI -ArmGicEnableDistributor ( - IN INTN GicDistributorBase - ); - -VOID -EFIAPI -ArmGicDisableDistributor ( - IN INTN GicDistributorBase - ); - -UINTN -EFIAPI -ArmGicGetMaxNumInterrupts ( - IN INTN GicDistributorBase - ); - -VOID -EFIAPI -ArmGicSendSgiTo ( - IN INTN GicDistributorBase, - IN INTN TargetListFilter, - IN INTN CPUTargetList, - IN INTN SgiId - ); - -/* - * Acknowledge and return the value of the Interrupt Acknowledge Register - * - * InterruptId is returned separately from the register value because in - * the GICv2 the register value contains the CpuId and InterruptId while - * in the GICv3 the register value is only the InterruptId. - * - * @param GicInterruptInterfaceBase Base Address of the GIC CPU Interface - * @param InterruptId InterruptId read from the Interrupt Acknowledge Register - * - * @retval value returned by the Interrupt Acknowledge Register - * - */ -UINTN -EFIAPI -ArmGicAcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase, - OUT UINTN *InterruptId - ); - -VOID -EFIAPI -ArmGicEndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source - ); - -UINTN -EFIAPI -ArmGicSetPriorityMask ( - IN INTN GicInterruptInterfaceBase, - IN INTN PriorityMask - ); - -VOID -EFIAPI -ArmGicEnableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source - ); - -VOID -EFIAPI -ArmGicDisableInterrupt ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source - ); - -BOOLEAN -EFIAPI -ArmGicIsInterruptEnabled ( - IN UINTN GicDistributorBase, - IN UINTN GicRedistributorBase, - IN UINTN Source - ); - -// -// GIC revision 2 specific declarations -// - -// Interrupts from 1020 to 1023 are considered as special interrupts (eg: spurious interrupts) -#define ARM_GIC_IS_SPECIAL_INTERRUPTS(Interrupt) (((Interrupt) >= 1020) && ((Interrupt) <= 1023)) - -VOID -EFIAPI -ArmGicV2SetupNonSecure ( - IN UINTN MpId, - IN INTN GicDistributorBase, - IN INTN GicInterruptInterfaceBase - ); - -VOID -EFIAPI -ArmGicV2EnableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ); - -VOID -EFIAPI -ArmGicV2DisableInterruptInterface ( - IN INTN GicInterruptInterfaceBase - ); - -UINTN -EFIAPI -ArmGicV2AcknowledgeInterrupt ( - IN UINTN GicInterruptInterfaceBase - ); - -VOID -EFIAPI -ArmGicV2EndOfInterrupt ( - IN UINTN GicInterruptInterfaceBase, - IN UINTN Source - ); - -// -// GIC revision 3 specific declarations -// - -#define ICC_SRE_EL2_SRE (1 << 0) - -#define ARM_GICD_IROUTER_IRM BIT31 - -UINT32 -EFIAPI -ArmGicV3GetControlSystemRegisterEnable ( - VOID - ); - -VOID -EFIAPI -ArmGicV3SetControlSystemRegisterEnable ( - IN UINT32 ControlSystemRegisterEnable - ); - -VOID -EFIAPI -ArmGicV3EnableInterruptInterface ( - VOID - ); - -VOID -EFIAPI -ArmGicV3DisableInterruptInterface ( - VOID - ); - -UINTN -EFIAPI -ArmGicV3AcknowledgeInterrupt ( - VOID - ); - -VOID -EFIAPI -ArmGicV3EndOfInterrupt ( - IN UINTN Source - ); - -VOID -ArmGicV3SetBinaryPointer ( - IN UINTN BinaryPoint - ); - -VOID -ArmGicV3SetPriorityMask ( - IN UINTN Priority - ); - -#endif diff --git a/ArmPkg/Include/Library/ArmHvcLib.h b/ArmPkg/Include/Library/ArmHvcLib.h deleted file mode 100644 index 4e9d1c4011..0000000000 --- a/ArmPkg/Include/Library/ArmHvcLib.h +++ /dev/null @@ -1,46 +0,0 @@ -/** @file -* -* Copyright (c) 2012-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_HVC_LIB__ -#define __ARM_HVC_LIB__ - -/** - * The size of the HVC arguments are different between AArch64 and AArch32. - * The native size is used for the arguments. - */ -typedef struct { - UINTN Arg0; - UINTN Arg1; - UINTN Arg2; - UINTN Arg3; - UINTN Arg4; - UINTN Arg5; - UINTN Arg6; - UINTN Arg7; -} ARM_HVC_ARGS; - -/** - Trigger an HVC call - - HVC calls can take up to 8 arguments and return up to 4 return values. - Therefore, the 4 first fields in the ARM_HVC_ARGS structure are used - for both input and output values. - -**/ -VOID -ArmCallHvc ( - IN OUT ARM_HVC_ARGS *Args - ); - -#endif diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h deleted file mode 100644 index 24ffe9f1aa..0000000000 --- a/ArmPkg/Include/Library/ArmLib.h +++ /dev/null @@ -1,722 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2016, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_LIB__ -#define __ARM_LIB__ - -#include - -#ifdef MDE_CPU_ARM - #include -#elif defined(MDE_CPU_AARCH64) - #include -#else - #error "Unknown chipset." -#endif - -#define EFI_MEMORY_CACHETYPE_MASK (EFI_MEMORY_UC | EFI_MEMORY_WC | \ - EFI_MEMORY_WT | EFI_MEMORY_WB | \ - EFI_MEMORY_UCE) - -/** - * The UEFI firmware must not use the ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_* attributes. - * - * The Non Secure memory attribute (ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_*) should only - * be used in Secure World to distinguished Secure to Non-Secure memory. - */ -typedef enum { - ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED = 0, - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_UNCACHED_UNBUFFERED, - ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK, - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_BACK, - ARM_MEMORY_REGION_ATTRIBUTE_WRITE_THROUGH, - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_WRITE_THROUGH, - ARM_MEMORY_REGION_ATTRIBUTE_DEVICE, - ARM_MEMORY_REGION_ATTRIBUTE_NONSECURE_DEVICE -} ARM_MEMORY_REGION_ATTRIBUTES; - -#define IS_ARM_MEMORY_REGION_ATTRIBUTES_SECURE(attr) ((UINT32)(attr) & 1) - -typedef struct { - EFI_PHYSICAL_ADDRESS PhysicalBase; - EFI_VIRTUAL_ADDRESS VirtualBase; - UINT64 Length; - ARM_MEMORY_REGION_ATTRIBUTES Attributes; -} ARM_MEMORY_REGION_DESCRIPTOR; - -typedef VOID (*CACHE_OPERATION)(VOID); -typedef VOID (*LINE_OPERATION)(UINTN); - -// -// ARM Processor Mode -// -typedef enum { - ARM_PROCESSOR_MODE_USER = 0x10, - ARM_PROCESSOR_MODE_FIQ = 0x11, - ARM_PROCESSOR_MODE_IRQ = 0x12, - ARM_PROCESSOR_MODE_SUPERVISOR = 0x13, - ARM_PROCESSOR_MODE_ABORT = 0x17, - ARM_PROCESSOR_MODE_HYP = 0x1A, - ARM_PROCESSOR_MODE_UNDEFINED = 0x1B, - ARM_PROCESSOR_MODE_SYSTEM = 0x1F, - ARM_PROCESSOR_MODE_MASK = 0x1F -} ARM_PROCESSOR_MODE; - -// -// ARM Cpu IDs -// -#define ARM_CPU_IMPLEMENTER_MASK (0xFFU << 24) -#define ARM_CPU_IMPLEMENTER_ARMLTD (0x41U << 24) -#define ARM_CPU_IMPLEMENTER_DEC (0x44U << 24) -#define ARM_CPU_IMPLEMENTER_MOT (0x4DU << 24) -#define ARM_CPU_IMPLEMENTER_QUALCOMM (0x51U << 24) -#define ARM_CPU_IMPLEMENTER_MARVELL (0x56U << 24) - -#define ARM_CPU_PRIMARY_PART_MASK (0xFFF << 4) -#define ARM_CPU_PRIMARY_PART_CORTEXA5 (0xC05 << 4) -#define ARM_CPU_PRIMARY_PART_CORTEXA7 (0xC07 << 4) -#define ARM_CPU_PRIMARY_PART_CORTEXA8 (0xC08 << 4) -#define ARM_CPU_PRIMARY_PART_CORTEXA9 (0xC09 << 4) -#define ARM_CPU_PRIMARY_PART_CORTEXA15 (0xC0F << 4) - -// -// ARM MP Core IDs -// -#define ARM_CORE_AFF0 0xFF -#define ARM_CORE_AFF1 (0xFF << 8) -#define ARM_CORE_AFF2 (0xFF << 16) -#define ARM_CORE_AFF3 (0xFFULL << 32) - -#define ARM_CORE_MASK ARM_CORE_AFF0 -#define ARM_CLUSTER_MASK ARM_CORE_AFF1 -#define GET_CORE_ID(MpId) ((MpId) & ARM_CORE_MASK) -#define GET_CLUSTER_ID(MpId) (((MpId) & ARM_CLUSTER_MASK) >> 8) -#define GET_MPID(ClusterId, CoreId) (((ClusterId) << 8) | (CoreId)) -#define PRIMARY_CORE_ID (PcdGet32(PcdArmPrimaryCore) & ARM_CORE_MASK) - -UINTN -EFIAPI -ArmDataCacheLineLength ( - VOID - ); - -UINTN -EFIAPI -ArmInstructionCacheLineLength ( - VOID - ); - -UINTN -EFIAPI -ArmCacheWritebackGranule ( - VOID - ); - -UINTN -EFIAPI -ArmIsArchTimerImplemented ( - VOID - ); - -UINTN -EFIAPI -ArmReadIdPfr0 ( - VOID - ); - -UINTN -EFIAPI -ArmReadIdPfr1 ( - VOID - ); - -UINTN -EFIAPI -ArmCacheInfo ( - VOID - ); - -BOOLEAN -EFIAPI -ArmIsMpCore ( - VOID - ); - -VOID -EFIAPI -ArmInvalidateDataCache ( - VOID - ); - - -VOID -EFIAPI -ArmCleanInvalidateDataCache ( - VOID - ); - -VOID -EFIAPI -ArmCleanDataCache ( - VOID - ); - -VOID -EFIAPI -ArmInvalidateInstructionCache ( - VOID - ); - -VOID -EFIAPI -ArmInvalidateDataCacheEntryByMVA ( - IN UINTN Address - ); - -VOID -EFIAPI -ArmCleanDataCacheEntryToPoUByMVA ( - IN UINTN Address - ); - -VOID -EFIAPI -ArmInvalidateInstructionCacheEntryToPoUByMVA ( - IN UINTN Address - ); - -VOID -EFIAPI -ArmCleanDataCacheEntryByMVA ( -IN UINTN Address -); - -VOID -EFIAPI -ArmCleanInvalidateDataCacheEntryByMVA ( - IN UINTN Address - ); - -VOID -EFIAPI -ArmInvalidateDataCacheEntryBySetWay ( - IN UINTN SetWayFormat - ); - -VOID -EFIAPI -ArmCleanDataCacheEntryBySetWay ( - IN UINTN SetWayFormat - ); - -VOID -EFIAPI -ArmCleanInvalidateDataCacheEntryBySetWay ( - IN UINTN SetWayFormat - ); - -VOID -EFIAPI -ArmEnableDataCache ( - VOID - ); - -VOID -EFIAPI -ArmDisableDataCache ( - VOID - ); - -VOID -EFIAPI -ArmEnableInstructionCache ( - VOID - ); - -VOID -EFIAPI -ArmDisableInstructionCache ( - VOID - ); - -VOID -EFIAPI -ArmEnableMmu ( - VOID - ); - -VOID -EFIAPI -ArmDisableMmu ( - VOID - ); - -VOID -EFIAPI -ArmEnableCachesAndMmu ( - VOID - ); - -VOID -EFIAPI -ArmDisableCachesAndMmu ( - VOID - ); - -VOID -EFIAPI -ArmEnableInterrupts ( - VOID - ); - -UINTN -EFIAPI -ArmDisableInterrupts ( - VOID - ); - -BOOLEAN -EFIAPI -ArmGetInterruptState ( - VOID - ); - -VOID -EFIAPI -ArmEnableAsynchronousAbort ( - VOID - ); - -UINTN -EFIAPI -ArmDisableAsynchronousAbort ( - VOID - ); - -VOID -EFIAPI -ArmEnableIrq ( - VOID - ); - -UINTN -EFIAPI -ArmDisableIrq ( - VOID - ); - -VOID -EFIAPI -ArmEnableFiq ( - VOID - ); - -UINTN -EFIAPI -ArmDisableFiq ( - VOID - ); - -BOOLEAN -EFIAPI -ArmGetFiqState ( - VOID - ); - -/** - * Invalidate Data and Instruction TLBs - */ -VOID -EFIAPI -ArmInvalidateTlb ( - VOID - ); - -VOID -EFIAPI -ArmUpdateTranslationTableEntry ( - IN VOID *TranslationTableEntry, - IN VOID *Mva - ); - -VOID -EFIAPI -ArmSetDomainAccessControl ( - IN UINT32 Domain - ); - -VOID -EFIAPI -ArmSetTTBR0 ( - IN VOID *TranslationTableBase - ); - -VOID -EFIAPI -ArmSetTTBCR ( - IN UINT32 Bits - ); - -VOID * -EFIAPI -ArmGetTTBR0BaseAddress ( - VOID - ); - -BOOLEAN -EFIAPI -ArmMmuEnabled ( - VOID - ); - -VOID -EFIAPI -ArmEnableBranchPrediction ( - VOID - ); - -VOID -EFIAPI -ArmDisableBranchPrediction ( - VOID - ); - -VOID -EFIAPI -ArmSetLowVectors ( - VOID - ); - -VOID -EFIAPI -ArmSetHighVectors ( - VOID - ); - -VOID -EFIAPI -ArmDataMemoryBarrier ( - VOID - ); - -VOID -EFIAPI -ArmDataSynchronizationBarrier ( - VOID - ); - -VOID -EFIAPI -ArmInstructionSynchronizationBarrier ( - VOID - ); - -VOID -EFIAPI -ArmWriteVBar ( - IN UINTN VectorBase - ); - -UINTN -EFIAPI -ArmReadVBar ( - VOID - ); - -VOID -EFIAPI -ArmWriteAuxCr ( - IN UINT32 Bit - ); - -UINT32 -EFIAPI -ArmReadAuxCr ( - VOID - ); - -VOID -EFIAPI -ArmSetAuxCrBit ( - IN UINT32 Bits - ); - -VOID -EFIAPI -ArmUnsetAuxCrBit ( - IN UINT32 Bits - ); - -VOID -EFIAPI -ArmCallSEV ( - VOID - ); - -VOID -EFIAPI -ArmCallWFE ( - VOID - ); - -VOID -EFIAPI -ArmCallWFI ( - - VOID - ); - -UINTN -EFIAPI -ArmReadMpidr ( - VOID - ); - -UINTN -EFIAPI -ArmReadMidr ( - VOID - ); - -UINT32 -EFIAPI -ArmReadCpacr ( - VOID - ); - -VOID -EFIAPI -ArmWriteCpacr ( - IN UINT32 Access - ); - -VOID -EFIAPI -ArmEnableVFP ( - VOID - ); - -/** - Get the Secure Configuration Register value - - @return Value read from the Secure Configuration Register - -**/ -UINT32 -EFIAPI -ArmReadScr ( - VOID - ); - -/** - Set the Secure Configuration Register - - @param Value Value to write to the Secure Configuration Register - -**/ -VOID -EFIAPI -ArmWriteScr ( - IN UINT32 Value - ); - -UINT32 -EFIAPI -ArmReadMVBar ( - VOID - ); - -VOID -EFIAPI -ArmWriteMVBar ( - IN UINT32 VectorMonitorBase - ); - -UINT32 -EFIAPI -ArmReadSctlr ( - VOID - ); - -UINTN -EFIAPI -ArmReadHVBar ( - VOID - ); - -VOID -EFIAPI -ArmWriteHVBar ( - IN UINTN HypModeVectorBase - ); - - -// -// Helper functions for accessing CPU ACTLR -// - -UINTN -EFIAPI -ArmReadCpuActlr ( - VOID - ); - -VOID -EFIAPI -ArmWriteCpuActlr ( - IN UINTN Val - ); - -VOID -EFIAPI -ArmSetCpuActlrBit ( - IN UINTN Bits - ); - -VOID -EFIAPI -ArmUnsetCpuActlrBit ( - IN UINTN Bits - ); - -// -// Accessors for the architected generic timer registers -// - -#define ARM_ARCH_TIMER_ENABLE (1 << 0) -#define ARM_ARCH_TIMER_IMASK (1 << 1) -#define ARM_ARCH_TIMER_ISTATUS (1 << 2) - -UINTN -EFIAPI -ArmReadCntFrq ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntFrq ( - UINTN FreqInHz - ); - -UINT64 -EFIAPI -ArmReadCntPct ( - VOID - ); - -UINTN -EFIAPI -ArmReadCntkCtl ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntkCtl ( - UINTN Val - ); - -UINTN -EFIAPI -ArmReadCntpTval ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntpTval ( - UINTN Val - ); - -UINTN -EFIAPI -ArmReadCntpCtl ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntpCtl ( - UINTN Val - ); - -UINTN -EFIAPI -ArmReadCntvTval ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntvTval ( - UINTN Val - ); - -UINTN -EFIAPI -ArmReadCntvCtl ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntvCtl ( - UINTN Val - ); - -UINT64 -EFIAPI -ArmReadCntvCt ( - VOID - ); - -UINT64 -EFIAPI -ArmReadCntpCval ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntpCval ( - UINT64 Val - ); - -UINT64 -EFIAPI -ArmReadCntvCval ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntvCval ( - UINT64 Val - ); - -UINT64 -EFIAPI -ArmReadCntvOff ( - VOID - ); - -VOID -EFIAPI -ArmWriteCntvOff ( - UINT64 Val - ); - -#endif // __ARM_LIB__ diff --git a/ArmPkg/Include/Library/ArmMmuLib.h b/ArmPkg/Include/Library/ArmMmuLib.h deleted file mode 100644 index fb7fd00641..0000000000 --- a/ArmPkg/Include/Library/ArmMmuLib.h +++ /dev/null @@ -1,72 +0,0 @@ -/** @file - - Copyright (c) 2015 - 2016, Linaro Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __ARM_MMU_LIB__ -#define __ARM_MMU_LIB__ - -#include - -#include - -EFI_STATUS -EFIAPI -ArmConfigureMmu ( - IN ARM_MEMORY_REGION_DESCRIPTOR *MemoryTable, - OUT VOID **TranslationTableBase OPTIONAL, - OUT UINTN *TranslationTableSize OPTIONAL - ); - -EFI_STATUS -EFIAPI -ArmSetMemoryRegionNoExec ( - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length - ); - -EFI_STATUS -EFIAPI -ArmClearMemoryRegionNoExec ( - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length - ); - -EFI_STATUS -EFIAPI -ArmSetMemoryRegionReadOnly ( - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length - ); - -EFI_STATUS -EFIAPI -ArmClearMemoryRegionReadOnly ( - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length - ); - -VOID -EFIAPI -ArmReplaceLiveTranslationEntry ( - IN UINT64 *Entry, - IN UINT64 Value - ); - -EFI_STATUS -ArmSetMemoryAttributes ( - IN EFI_PHYSICAL_ADDRESS BaseAddress, - IN UINT64 Length, - IN UINT64 Attributes - ); - -#endif diff --git a/ArmPkg/Include/Library/ArmSmcLib.h b/ArmPkg/Include/Library/ArmSmcLib.h deleted file mode 100644 index 168e3bb426..0000000000 --- a/ArmPkg/Include/Library/ArmSmcLib.h +++ /dev/null @@ -1,46 +0,0 @@ -/** @file -* -* Copyright (c) 2012-2014, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_SMC_LIB__ -#define __ARM_SMC_LIB__ - -/** - * The size of the SMC arguments are different between AArch64 and AArch32. - * The native size is used for the arguments. - */ -typedef struct { - UINTN Arg0; - UINTN Arg1; - UINTN Arg2; - UINTN Arg3; - UINTN Arg4; - UINTN Arg5; - UINTN Arg6; - UINTN Arg7; -} ARM_SMC_ARGS; - -/** - Trigger an SMC call - - SMC calls can take up to 7 arguments and return up to 4 return values. - Therefore, the 4 first fields in the ARM_SMC_ARGS structure are used - for both input and output values. - -**/ -VOID -ArmCallSmc ( - IN OUT ARM_SMC_ARGS *Args - ); - -#endif diff --git a/ArmPkg/Include/Library/BdsLib.h b/ArmPkg/Include/Library/BdsLib.h deleted file mode 100644 index c58f47eb2a..0000000000 --- a/ArmPkg/Include/Library/BdsLib.h +++ /dev/null @@ -1,209 +0,0 @@ -/** @file -* -* Copyright (c) 2013-2015, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __BDS_ENTRY_H__ -#define __BDS_ENTRY_H__ - -/** - This is defined by the UEFI specs, don't change it -**/ -typedef struct { - UINT16 LoadOptionIndex; - EFI_LOAD_OPTION *LoadOption; - UINTN LoadOptionSize; - - UINT32 Attributes; - UINT16 FilePathListLength; - CHAR16 *Description; - EFI_DEVICE_PATH_PROTOCOL *FilePathList; - - VOID* OptionalData; - UINTN OptionalDataSize; -} BDS_LOAD_OPTION; - -/** - Connect a Device Path and return the handle of the driver that support this DevicePath - - @param DevicePath Device Path of the File to connect - @param Handle Handle of the driver that support this DevicePath - @param RemainingDevicePath Remaining DevicePath nodes that do not match the driver DevicePath - - @retval EFI_SUCCESS A driver that matches the Device Path has been found - @retval EFI_NOT_FOUND No handles match the search. - @retval EFI_INVALID_PARAMETER DevicePath or Handle is NULL - -**/ -EFI_STATUS -BdsConnectDevicePath ( - IN EFI_DEVICE_PATH_PROTOCOL* DevicePath, - OUT EFI_HANDLE *Handle, - OUT EFI_DEVICE_PATH_PROTOCOL **RemainingDevicePath - ); - -/** - Connect all DXE drivers - - @retval EFI_SUCCESS All drivers have been connected - @retval EFI_NOT_FOUND No handles match the search. - @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results. - -**/ -EFI_STATUS -BdsConnectAllDrivers ( - VOID - ); - -/** - Return the value of a global variable defined by its VariableName. - The variable must be defined with the VendorGuid gEfiGlobalVariableGuid. - - @param VariableName A Null-terminated string that is the name of the vendor's - variable. - @param DefaultValue Value returned by the function if the variable does not exist - @param DataSize On input, the size in bytes of the return Data buffer. - On output the size of data returned in Data. - @param Value Value read from the UEFI Variable or copy of the default value - if the UEFI Variable does not exist - - @retval EFI_SUCCESS All drivers have been connected - @retval EFI_NOT_FOUND No handles match the search. - @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results. - -**/ -EFI_STATUS -GetGlobalEnvironmentVariable ( - IN CONST CHAR16* VariableName, - IN VOID* DefaultValue, - IN OUT UINTN* Size, - OUT VOID** Value - ); - -/** - Return the value of the variable defined by its VariableName and VendorGuid - - @param VariableName A Null-terminated string that is the name of the vendor's - variable. - @param VendorGuid A unique identifier for the vendor. - @param DefaultValue Value returned by the function if the variable does not exist - @param DataSize On input, the size in bytes of the return Data buffer. - On output the size of data returned in Data. - @param Value Value read from the UEFI Variable or copy of the default value - if the UEFI Variable does not exist - - @retval EFI_SUCCESS All drivers have been connected - @retval EFI_NOT_FOUND No handles match the search. - @retval EFI_OUT_OF_RESOURCES There is not resource pool memory to store the matching results. - -**/ -EFI_STATUS -GetEnvironmentVariable ( - IN CONST CHAR16* VariableName, - IN EFI_GUID* VendorGuid, - IN VOID* DefaultValue, - IN OUT UINTN* Size, - OUT VOID** Value - ); - -EFI_STATUS -BootOptionFromLoadOptionIndex ( - IN UINT16 LoadOptionIndex, - OUT BDS_LOAD_OPTION** BdsLoadOption - ); - -EFI_STATUS -BootOptionFromLoadOptionVariable ( - IN CHAR16* BootVariableName, - OUT BDS_LOAD_OPTION** BdsLoadOption - ); - -EFI_STATUS -BootOptionToLoadOptionVariable ( - IN BDS_LOAD_OPTION* BdsLoadOption - ); - -UINT16 -BootOptionAllocateBootIndex ( - VOID - ); - -/** - Start an EFI Application from a Device Path - - @param ParentImageHandle Handle of the calling image - @param DevicePath Location of the EFI Application - - @retval EFI_SUCCESS All drivers have been connected - @retval EFI_NOT_FOUND The Linux kernel Device Path has not been found - @retval EFI_OUT_OF_RESOURCES There is not enough resource memory to store the matching results. - -**/ -EFI_STATUS -BdsStartEfiApplication ( - IN EFI_HANDLE ParentImageHandle, - IN EFI_DEVICE_PATH_PROTOCOL *DevicePath, - IN UINTN LoadOptionsSize, - IN VOID* LoadOptions - ); - -EFI_STATUS -BdsLoadImage ( - IN EFI_DEVICE_PATH *DevicePath, - IN EFI_ALLOCATE_TYPE Type, - IN OUT EFI_PHYSICAL_ADDRESS* Image, - OUT UINTN *FileSize - ); - -/** - * Call BS.ExitBootServices with the appropriate Memory Map information - */ -EFI_STATUS -ShutdownUefiBootServices ( - VOID - ); - -/** - Locate an EFI application in a the Firmware Volumes by its name - - @param EfiAppGuid Guid of the EFI Application into the Firmware Volume - @param DevicePath EFI Device Path of the EFI application - - @return EFI_SUCCESS The function completed successfully. - @return EFI_NOT_FOUND The protocol could not be located. - @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol. - -**/ -EFI_STATUS -LocateEfiApplicationInFvByName ( - IN CONST CHAR16* EfiAppName, - OUT EFI_DEVICE_PATH **DevicePath - ); - -/** - Locate an EFI application in a the Firmware Volumes by its GUID - - @param EfiAppGuid Guid of the EFI Application into the Firmware Volume - @param DevicePath EFI Device Path of the EFI application - - @return EFI_SUCCESS The function completed successfully. - @return EFI_NOT_FOUND The protocol could not be located. - @return EFI_OUT_OF_RESOURCES There are not enough resources to find the protocol. - -**/ -EFI_STATUS -LocateEfiApplicationInFvByGuid ( - IN CONST EFI_GUID *EfiAppGuid, - OUT EFI_DEVICE_PATH **DevicePath - ); - -#endif diff --git a/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h b/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h deleted file mode 100644 index 5c7d7e2600..0000000000 --- a/ArmPkg/Include/Library/DefaultExceptionHandlerLib.h +++ /dev/null @@ -1,31 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __DEFAULT_EXCEPTION_HANDLER_LIB_H__ -#define __DEFAULT_EXCEPTION_HANDLER_LIB_H__ - -/** - This is the default action to take on an unexpected exception - - @param ExceptionType Type of the exception - @param SystemContext Register state at the time of the Exception - -**/ -VOID -DefaultExceptionHandler ( - IN EFI_EXCEPTION_TYPE ExceptionType, - IN OUT EFI_SYSTEM_CONTEXT SystemContext - ); - -#endif diff --git a/ArmPkg/Include/Library/SemihostLib.h b/ArmPkg/Include/Library/SemihostLib.h deleted file mode 100644 index 4a91593e31..0000000000 --- a/ArmPkg/Include/Library/SemihostLib.h +++ /dev/null @@ -1,138 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Portions copyright (c) 2011, 2012, ARM Ltd. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __SEMIHOSTING_H__ -#define __SEMIHOSTING_H__ - -/* - * - * Please refer to ARM RVDS 3.0 Compiler and Libraries Guide for more information - * about the semihosting interface. - * - */ - -#define SEMIHOST_FILE_MODE_READ (0 << 2) -#define SEMIHOST_FILE_MODE_WRITE (1 << 2) -#define SEMIHOST_FILE_MODE_APPEND (2 << 2) -#define SEMIHOST_FILE_MODE_UPDATE (1 << 1) -#define SEMIHOST_FILE_MODE_BINARY (1 << 0) -#define SEMIHOST_FILE_MODE_ASCII (0 << 0) - -BOOLEAN -SemihostConnectionSupported ( - VOID - ); - -RETURN_STATUS -SemihostFileOpen ( - IN CHAR8 *FileName, - IN UINT32 Mode, - OUT UINTN *FileHandle - ); - -RETURN_STATUS -SemihostFileSeek ( - IN UINTN FileHandle, - IN UINTN Offset - ); - -RETURN_STATUS -SemihostFileRead ( - IN UINTN FileHandle, - IN OUT UINTN *Length, - OUT VOID *Buffer - ); - -RETURN_STATUS -SemihostFileWrite ( - IN UINTN FileHandle, - IN OUT UINTN *Length, - IN VOID *Buffer - ); - -RETURN_STATUS -SemihostFileClose ( - IN UINTN FileHandle - ); - -RETURN_STATUS -SemihostFileLength ( - IN UINTN FileHandle, - OUT UINTN *Length - ); - -/** - Get a temporary name for a file from the host running the debug agent. - - @param[out] Buffer Pointer to the buffer where the temporary name has to - be stored - @param[in] Identifier File name identifier (integer in the range 0 to 255) - @param[in] Length Length of the buffer to store the temporary name - - @retval RETURN_SUCCESS Temporary name returned - @retval RETURN_INVALID_PARAMETER Invalid buffer address - @retval RETURN_ABORTED Temporary name not returned - -**/ -RETURN_STATUS -SemihostFileTmpName( - OUT VOID *Buffer, - IN UINT8 Identifier, - IN UINTN Length - ); - -RETURN_STATUS -SemihostFileRemove ( - IN CHAR8 *FileName - ); - -/** - Rename a specified file. - - @param[in] FileName Name of the file to rename. - @param[in] NewFileName The new name of the file. - - @retval RETURN_SUCCESS File Renamed - @retval RETURN_INVALID_PARAMETER Either the current or the new name is not specified - @retval RETURN_ABORTED Rename failed - -**/ -RETURN_STATUS -SemihostFileRename( - IN CHAR8 *FileName, - IN CHAR8 *NewFileName - ); - -CHAR8 -SemihostReadCharacter ( - VOID - ); - -VOID -SemihostWriteCharacter ( - IN CHAR8 Character - ); - -VOID -SemihostWriteString ( - IN CHAR8 *String - ); - -UINT32 -SemihostSystem ( - IN CHAR8 *CommandLine - ); - -#endif // __SEMIHOSTING_H__ diff --git a/ArmPkg/Include/Library/UncachedMemoryAllocationLib.h b/ArmPkg/Include/Library/UncachedMemoryAllocationLib.h deleted file mode 100644 index a49d8d3ac9..0000000000 --- a/ArmPkg/Include/Library/UncachedMemoryAllocationLib.h +++ /dev/null @@ -1,665 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#ifndef __UNCACHED_MEMORY_ALLOCATION_LIB_H__ -#define __UNCACHED_MEMORY_ALLOCATION_LIB_H__ - -/** - Converts a cached or uncached address to a physical address suitable for use in SoC registers. - - @param VirtualAddress The pointer to convert. - - @return The physical address of the supplied virtual pointer. - -**/ -EFI_PHYSICAL_ADDRESS -ConvertToPhysicalAddress ( - IN VOID *VirtualAddress - ); - -/** - Converts a cached or uncached address to a cached address. - - @param Address The pointer to convert. - - @return The address of the cached memory location corresponding to the input address. - -**/ -VOID * -ConvertToCachedAddress ( - IN VOID *Address - ); - -/** - Converts a cached or uncached address to an uncached address. - - @param Address The pointer to convert. - - @return The address of the uncached memory location corresponding to the input address. - -**/ -VOID * -ConvertToUncachedAddress ( - IN VOID *Address - ); - -/** - Allocates one or more 4KB pages of type EfiBootServicesData. - - Allocates the number of 4KB pages of type EfiBootServicesData and returns a pointer to the - allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL - is returned. If there is not enough memory remaining to satisfy the request, then NULL is - returned. - - @param Pages The number of 4 KB pages to allocate. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocatePages ( - IN UINTN Pages - ); - -/** - Allocates one or more 4KB pages of type EfiRuntimeServicesData. - - Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the - allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL - is returned. If there is not enough memory remaining to satisfy the request, then NULL is - returned. - - @param Pages The number of 4 KB pages to allocate. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateRuntimePages ( - IN UINTN Pages - ); - -/** - Allocates one or more 4KB pages of type EfiReservedMemoryType. - - Allocates the number of 4KB pages of type EfiReservedMemoryType and returns a pointer to the - allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL - is returned. If there is not enough memory remaining to satisfy the request, then NULL is - returned. - - @param Pages The number of 4 KB pages to allocate. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateReservedPages ( - IN UINTN Pages - ); - -/** - Frees one or more 4KB pages that were previously allocated with one of the page allocation - functions in the Memory Allocation Library. - - Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer - must have been allocated on a previous call to the page allocation services of the Memory - Allocation Library. - If Buffer was not allocated with a page allocation function in the Memory Allocation Library, - then ASSERT(). - If Pages is zero, then ASSERT(). - - @param Buffer Pointer to the buffer of pages to free. - @param Pages The number of 4 KB pages to free. - -**/ -VOID -EFIAPI -UncachedFreePages ( - IN VOID *Buffer, - IN UINTN Pages - ); - -/** - Allocates one or more 4KB pages of type EfiBootServicesData at a specified alignment. - - Allocates the number of 4KB pages specified by Pages of type EfiBootServicesData with an - alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is - returned. If there is not enough memory at the specified alignment remaining to satisfy the - request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param Pages The number of 4 KB pages to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedPages ( - IN UINTN Pages, - IN UINTN Alignment - ); - -/** - Allocates one or more 4KB pages of type EfiRuntimeServicesData at a specified alignment. - - Allocates the number of 4KB pages specified by Pages of type EfiRuntimeServicesData with an - alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is - returned. If there is not enough memory at the specified alignment remaining to satisfy the - request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param Pages The number of 4 KB pages to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedRuntimePages ( - IN UINTN Pages, - IN UINTN Alignment - ); - -/** - Allocates one or more 4KB pages of type EfiReservedMemoryType at a specified alignment. - - Allocates the number of 4KB pages specified by Pages of type EfiReservedMemoryType with an - alignment specified by Alignment. The allocated buffer is returned. If Pages is 0, then NULL is - returned. If there is not enough memory at the specified alignment remaining to satisfy the - request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param Pages The number of 4 KB pages to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedReservedPages ( - IN UINTN Pages, - IN UINTN Alignment - ); - -/** - Frees one or more 4KB pages that were previously allocated with one of the aligned page - allocation functions in the Memory Allocation Library. - - Frees the number of 4KB pages specified by Pages from the buffer specified by Buffer. Buffer - must have been allocated on a previous call to the aligned page allocation services of the Memory - Allocation Library. - If Buffer was not allocated with an aligned page allocation function in the Memory Allocation - Library, then ASSERT(). - If Pages is zero, then ASSERT(). - - @param Buffer Pointer to the buffer of pages to free. - @param Pages The number of 4 KB pages to free. - -**/ -VOID -EFIAPI -UncachedFreeAlignedPages ( - IN VOID *Buffer, - IN UINTN Pages - ); - -/** - Allocates a buffer of type EfiBootServicesData. - - Allocates the number bytes specified by AllocationSize of type EfiBootServicesData and returns a - pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is - returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. - - @param AllocationSize The number of bytes to allocate. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocatePool ( - IN UINTN AllocationSize - ); - -/** - Allocates a buffer of type EfiRuntimeServicesData. - - Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData and returns - a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is - returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. - - @param AllocationSize The number of bytes to allocate. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateRuntimePool ( - IN UINTN AllocationSize - ); - -/** - Allocates a buffer of type EfieservedMemoryType. - - Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType and returns - a pointer to the allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is - returned. If there is not enough memory remaining to satisfy the request, then NULL is returned. - - @param AllocationSize The number of bytes to allocate. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateReservedPool ( - IN UINTN AllocationSize - ); - -/** - Allocates and zeros a buffer of type EfiBootServicesData. - - Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, clears the - buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a - valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the - request, then NULL is returned. - - @param AllocationSize The number of bytes to allocate and zero. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateZeroPool ( - IN UINTN AllocationSize - ); - -/** - Allocates and zeros a buffer of type EfiRuntimeServicesData. - - Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, clears the - buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a - valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the - request, then NULL is returned. - - @param AllocationSize The number of bytes to allocate and zero. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateRuntimeZeroPool ( - IN UINTN AllocationSize - ); - -/** - Allocates and zeros a buffer of type EfiReservedMemoryType. - - Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, clears the - buffer with zeros, and returns a pointer to the allocated buffer. If AllocationSize is 0, then a - valid buffer of 0 size is returned. If there is not enough memory remaining to satisfy the - request, then NULL is returned. - - @param AllocationSize The number of bytes to allocate and zero. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateReservedZeroPool ( - IN UINTN AllocationSize - ); - -/** - Copies a buffer to an allocated buffer of type EfiBootServicesData. - - Allocates the number bytes specified by AllocationSize of type EfiBootServicesData, copies - AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the - allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there - is not enough memory remaining to satisfy the request, then NULL is returned. - If Buffer is NULL, then ASSERT(). - If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). - - @param AllocationSize The number of bytes to allocate and zero. - @param Buffer The buffer to copy to the allocated buffer. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateCopyPool ( - IN UINTN AllocationSize, - IN CONST VOID *Buffer - ); - -/** - Copies a buffer to an allocated buffer of type EfiRuntimeServicesData. - - Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData, copies - AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the - allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there - is not enough memory remaining to satisfy the request, then NULL is returned. - If Buffer is NULL, then ASSERT(). - If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). - - @param AllocationSize The number of bytes to allocate and zero. - @param Buffer The buffer to copy to the allocated buffer. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateRuntimeCopyPool ( - IN UINTN AllocationSize, - IN CONST VOID *Buffer - ); - -/** - Copies a buffer to an allocated buffer of type EfiReservedMemoryType. - - Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType, copies - AllocationSize bytes from Buffer to the newly allocated buffer, and returns a pointer to the - allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there - is not enough memory remaining to satisfy the request, then NULL is returned. - If Buffer is NULL, then ASSERT(). - If AllocationSize is greater than (MAX_ADDRESS ? Buffer + 1), then ASSERT(). - - @param AllocationSize The number of bytes to allocate and zero. - @param Buffer The buffer to copy to the allocated buffer. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateReservedCopyPool ( - IN UINTN AllocationSize, - IN CONST VOID *Buffer - ); - -/** - Frees a buffer that was previously allocated with one of the pool allocation functions in the - Memory Allocation Library. - - Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the - pool allocation services of the Memory Allocation Library. - If Buffer was not allocated with a pool allocation function in the Memory Allocation Library, - then ASSERT(). - - @param Buffer Pointer to the buffer to free. - -**/ -VOID -EFIAPI -UncachedFreePool ( - IN VOID *Buffer - ); - -/** - Allocates a buffer of type EfiBootServicesData at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an - alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, - then a valid buffer of 0 size is returned. If there is not enough memory at the specified - alignment remaining to satisfy the request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedPool ( - IN UINTN AllocationSize, - IN UINTN Alignment - ); - -/** - Allocates a buffer of type EfiRuntimeServicesData at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an - alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, - then a valid buffer of 0 size is returned. If there is not enough memory at the specified - alignment remaining to satisfy the request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedRuntimePool ( - IN UINTN AllocationSize, - IN UINTN Alignment - ); - -/** - Allocates a buffer of type EfieservedMemoryType at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an - alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, - then a valid buffer of 0 size is returned. If there is not enough memory at the specified - alignment remaining to satisfy the request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedReservedPool ( - IN UINTN AllocationSize, - IN UINTN Alignment - ); - -/** - Allocates and zeros a buffer of type EfiBootServicesData at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiBootServicesData with an - alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the - allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there - is not enough memory at the specified alignment remaining to satisfy the request, then NULL is - returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedZeroPool ( - IN UINTN AllocationSize, - IN UINTN Alignment - ); - -/** - Allocates and zeros a buffer of type EfiRuntimeServicesData at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData with an - alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the - allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there - is not enough memory at the specified alignment remaining to satisfy the request, then NULL is - returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedRuntimeZeroPool ( - IN UINTN AllocationSize, - IN UINTN Alignment - ); - -/** - Allocates and zeros a buffer of type EfieservedMemoryType at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfieservedMemoryType with an - alignment specified by Alignment, clears the buffer with zeros, and returns a pointer to the - allocated buffer. If AllocationSize is 0, then a valid buffer of 0 size is returned. If there - is not enough memory at the specified alignment remaining to satisfy the request, then NULL is - returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedReservedZeroPool ( - IN UINTN AllocationSize, - IN UINTN Alignment - ); - -/** - Copies a buffer to an allocated buffer of type EfiBootServicesData at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiBootServicesData type with an - alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, - then a valid buffer of 0 size is returned. If there is not enough memory at the specified - alignment remaining to satisfy the request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Buffer The buffer to copy to the allocated buffer. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedCopyPool ( - IN UINTN AllocationSize, - IN CONST VOID *Buffer, - IN UINTN Alignment - ); - -/** - Copies a buffer to an allocated buffer of type EfiRuntimeServicesData at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiRuntimeServicesData type with an - alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, - then a valid buffer of 0 size is returned. If there is not enough memory at the specified - alignment remaining to satisfy the request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Buffer The buffer to copy to the allocated buffer. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedRuntimeCopyPool ( - IN UINTN AllocationSize, - IN CONST VOID *Buffer, - IN UINTN Alignment - ); - -/** - Copies a buffer to an allocated buffer of type EfiReservedMemoryType at a specified alignment. - - Allocates the number bytes specified by AllocationSize of type EfiReservedMemoryType type with an - alignment specified by Alignment. The allocated buffer is returned. If AllocationSize is 0, - then a valid buffer of 0 size is returned. If there is not enough memory at the specified - alignment remaining to satisfy the request, then NULL is returned. - If Alignment is not a power of two and Alignment is not zero, then ASSERT(). - - @param AllocationSize The number of bytes to allocate. - @param Buffer The buffer to copy to the allocated buffer. - @param Alignment The requested alignment of the allocation. Must be a power of two. - If Alignment is zero, then byte alignment is used. - - @return A pointer to the allocated buffer or NULL if allocation fails. - -**/ -VOID * -EFIAPI -UncachedAllocateAlignedReservedCopyPool ( - IN UINTN AllocationSize, - IN CONST VOID *Buffer, - IN UINTN Alignment - ); - -/** - Frees a buffer that was previously allocated with one of the aligned pool allocation functions - in the Memory Allocation Library. - - Frees the buffer specified by Buffer. Buffer must have been allocated on a previous call to the - aligned pool allocation services of the Memory Allocation Library. - If Buffer was not allocated with an aligned pool allocation function in the Memory Allocation - Library, then ASSERT(). - - @param Buffer Pointer to the buffer to free. - -**/ -VOID -EFIAPI -UncachedFreeAlignedPool ( - IN VOID *Buffer - ); - -VOID -EFIAPI -UncachedSafeFreePool ( - IN VOID *Buffer - ); - -#endif // __UNCACHED_MEMORY_ALLOCATION_LIB_H__ diff --git a/ArmPkg/Include/Ppi/ArmMpCoreInfo.h b/ArmPkg/Include/Ppi/ArmMpCoreInfo.h deleted file mode 100644 index fdacd811b8..0000000000 --- a/ArmPkg/Include/Ppi/ArmMpCoreInfo.h +++ /dev/null @@ -1,58 +0,0 @@ -/** @file -* -* Copyright (c) 2011, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php -* -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -* -**/ - -#ifndef __ARM_MP_CORE_INFO_PPI_H__ -#define __ARM_MP_CORE_INFO_PPI_H__ - -#include - -#define ARM_MP_CORE_INFO_PPI_GUID \ - { 0x6847cc74, 0xe9ec, 0x4f8f, {0xa2, 0x9d, 0xab, 0x44, 0xe7, 0x54, 0xa8, 0xfc} } - -/** - This service of the EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI that migrates temporary RAM into - permanent memory. - - @param PeiServices Pointer to the PEI Services Table. - @param TemporaryMemoryBase Source Address in temporary memory from which the SEC or PEIM will copy the - Temporary RAM contents. - @param PermanentMemoryBase Destination Address in permanent memory into which the SEC or PEIM will copy the - Temporary RAM contents. - @param CopySize Amount of memory to migrate from temporary to permanent memory. - - @retval EFI_SUCCESS The data was successfully returned. - @retval EFI_INVALID_PARAMETER PermanentMemoryBase + CopySize > TemporaryMemoryBase when - TemporaryMemoryBase > PermanentMemoryBase. - -**/ -typedef -EFI_STATUS -(EFIAPI * ARM_MP_CORE_INFO_GET) ( - OUT UINTN *ArmCoreCount, - OUT ARM_CORE_INFO **ArmCoreTable -); - -/// -/// This service abstracts the ability to migrate contents of the platform early memory store. -/// Note: The name EFI_PEI_TEMPORARY_RAM_SUPPORT_PPI is different from the current PI 1.2 spec. -/// This PPI was optional. -/// -typedef struct { - ARM_MP_CORE_INFO_GET GetMpCoreInfo; -} ARM_MP_CORE_INFO_PPI; - -extern EFI_GUID gArmMpCoreInfoPpiGuid; -extern EFI_GUID gArmMpCoreInfoGuid; - -#endif diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c deleted file mode 100644 index b81293c5cf..0000000000 --- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.c +++ /dev/null @@ -1,292 +0,0 @@ -/** @file - Generic ARM implementation of TimerLib.h - - Copyright (c) 2011-2016, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - - -#include -#include -#include -#include -#include -#include -#include - -#define TICKS_PER_MICRO_SEC (PcdGet32 (PcdArmArchTimerFreqInHz)/1000000U) - -// Select appropriate multiply function for platform architecture. -#ifdef MDE_CPU_ARM -#define MultU64xN MultU64x32 -#else -#define MultU64xN MultU64x64 -#endif - - -RETURN_STATUS -EFIAPI -TimerConstructor ( - VOID - ) -{ - // - // Check if the ARM Generic Timer Extension is implemented. - // - if (ArmIsArchTimerImplemented ()) { - - // - // Check if Architectural Timer frequency is pre-determined by the platform - // (ie. nonzero). - // - if (PcdGet32 (PcdArmArchTimerFreqInHz) != 0) { - // - // Check if ticks/uS is not 0. The Architectural timer runs at constant - // frequency, irrespective of CPU frequency. According to Generic Timer - // Ref manual, lower bound of the frequency is in the range of 1-10MHz. - // - ASSERT (TICKS_PER_MICRO_SEC); - -#ifdef MDE_CPU_ARM - // - // Only set the frequency for ARMv7. We expect the secure firmware to - // have already done it. - // If the security extension is not implemented, set Timer Frequency - // here. - // - if ((ArmReadIdPfr1 () & ARM_PFR1_SEC) == 0x0) { - ArmGenericTimerSetTimerFreq (PcdGet32 (PcdArmArchTimerFreqInHz)); - } -#endif - } - - // - // Architectural Timer Frequency must be set in Secure privileged - // mode (if secure extension is supported). - // If the reset value (0) is returned, just ASSERT. - // - ASSERT (ArmGenericTimerGetTimerFreq () != 0); - - } else { - DEBUG ((EFI_D_ERROR, "ARM Architectural Timer is not available in the CPU, hence this library cannot be used.\n")); - ASSERT (0); - } - - return RETURN_SUCCESS; -} - -/** - A local utility function that returns the PCD value, if specified. - Otherwise it defaults to ArmGenericTimerGetTimerFreq. - - @return The timer frequency. - -**/ -STATIC -UINTN -EFIAPI -GetPlatformTimerFreq ( - ) -{ - UINTN TimerFreq; - - TimerFreq = PcdGet32 (PcdArmArchTimerFreqInHz); - if (TimerFreq == 0) { - TimerFreq = ArmGenericTimerGetTimerFreq (); - } - return TimerFreq; -} - - -/** - Stalls the CPU for the number of microseconds specified by MicroSeconds. - - @param MicroSeconds The minimum number of microseconds to delay. - - @return The value of MicroSeconds input. - -**/ -UINTN -EFIAPI -MicroSecondDelay ( - IN UINTN MicroSeconds - ) -{ - UINT64 TimerTicks64; - UINT64 SystemCounterVal; - - // Calculate counter ticks that represent requested delay: - // = MicroSeconds x TICKS_PER_MICRO_SEC - // = MicroSeconds x Frequency.10^-6 - TimerTicks64 = DivU64x32 ( - MultU64xN ( - MicroSeconds, - GetPlatformTimerFreq () - ), - 1000000U - ); - - // Read System Counter value - SystemCounterVal = ArmGenericTimerGetSystemCount (); - - TimerTicks64 += SystemCounterVal; - - // Wait until delay count expires. - while (SystemCounterVal < TimerTicks64) { - SystemCounterVal = ArmGenericTimerGetSystemCount (); - } - - return MicroSeconds; -} - - -/** - Stalls the CPU for at least the given number of nanoseconds. - - Stalls the CPU for the number of nanoseconds specified by NanoSeconds. - - When the timer frequency is 1MHz, each tick corresponds to 1 microsecond. - Therefore, the nanosecond delay will be rounded up to the nearest 1 microsecond. - - @param NanoSeconds The minimum number of nanoseconds to delay. - - @return The value of NanoSeconds inputed. - -**/ -UINTN -EFIAPI -NanoSecondDelay ( - IN UINTN NanoSeconds - ) -{ - UINTN MicroSeconds; - - // Round up to 1us Tick Number - MicroSeconds = NanoSeconds / 1000; - MicroSeconds += ((NanoSeconds % 1000) == 0) ? 0 : 1; - - MicroSecondDelay (MicroSeconds); - - return NanoSeconds; -} - -/** - Retrieves the current value of a 64-bit free running performance counter. - - The counter can either count up by 1 or count down by 1. If the physical - performance counter counts by a larger increment, then the counter values - must be translated. The properties of the counter can be retrieved from - GetPerformanceCounterProperties(). - - @return The current value of the free running performance counter. - -**/ -UINT64 -EFIAPI -GetPerformanceCounter ( - VOID - ) -{ - // Just return the value of system count - return ArmGenericTimerGetSystemCount (); -} - -/** - Retrieves the 64-bit frequency in Hz and the range of performance counter - values. - - If StartValue is not NULL, then the value that the performance counter starts - with immediately after is it rolls over is returned in StartValue. If - EndValue is not NULL, then the value that the performance counter end with - immediately before it rolls over is returned in EndValue. The 64-bit - frequency of the performance counter in Hz is always returned. If StartValue - is less than EndValue, then the performance counter counts up. If StartValue - is greater than EndValue, then the performance counter counts down. For - example, a 64-bit free running counter that counts up would have a StartValue - of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter - that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0. - - @param StartValue The value the performance counter starts with when it - rolls over. - @param EndValue The value that the performance counter ends with before - it rolls over. - - @return The frequency in Hz. - -**/ -UINT64 -EFIAPI -GetPerformanceCounterProperties ( - OUT UINT64 *StartValue, OPTIONAL - OUT UINT64 *EndValue OPTIONAL - ) -{ - if (StartValue != NULL) { - // Timer starts at 0 - *StartValue = (UINT64)0ULL ; - } - - if (EndValue != NULL) { - // Timer counts up. - *EndValue = 0xFFFFFFFFFFFFFFFFUL; - } - - return (UINT64)ArmGenericTimerGetTimerFreq (); -} - -/** - Converts elapsed ticks of performance counter to time in nanoseconds. - - This function converts the elapsed ticks of running performance counter to - time value in unit of nanoseconds. - - @param Ticks The number of elapsed ticks of running performance counter. - - @return The elapsed time in nanoseconds. - -**/ -UINT64 -EFIAPI -GetTimeInNanoSecond ( - IN UINT64 Ticks - ) -{ - UINT64 NanoSeconds; - UINT32 Remainder; - UINT32 TimerFreq; - - TimerFreq = GetPlatformTimerFreq (); - // - // Ticks - // Time = --------- x 1,000,000,000 - // Frequency - // - NanoSeconds = MultU64xN ( - DivU64x32Remainder ( - Ticks, - TimerFreq, - &Remainder), - 1000000000U - ); - - // - // Frequency < 0x100000000, so Remainder < 0x100000000, then (Remainder * 1,000,000,000) - // will not overflow 64-bit. - // - NanoSeconds += DivU64x32 ( - MultU64xN ( - (UINT64) Remainder, - 1000000000U), - TimerFreq - ); - - return NanoSeconds; -} diff --git a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf b/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf deleted file mode 100644 index 03a4b1efa6..0000000000 --- a/ArmPkg/Library/ArmArchTimerLib/ArmArchTimerLib.inf +++ /dev/null @@ -1,38 +0,0 @@ -#/** @file -# -# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
-# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmArchTimerLib - FILE_GUID = 82da1b44-d2d6-4a7d-bbf0-a0cb67964034 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = TimerLib - CONSTRUCTOR = TimerConstructor - -[Sources.common] - ArmArchTimerLib.c - -[Packages] - MdePkg/MdePkg.dec - EmbeddedPkg/EmbeddedPkg.dec - ArmPkg/ArmPkg.dec - -[LibraryClasses] - DebugLib - ArmLib - BaseLib - ArmGenericTimerCounterLib - -[Pcd] - gArmTokenSpaceGuid.PcdArmArchTimerFreqInHz diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c deleted file mode 100644 index 0759e38cd4..0000000000 --- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c +++ /dev/null @@ -1,131 +0,0 @@ -/** @file - - Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
- Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ -#include -#include -#include -#include - -STATIC -VOID -CacheRangeOperation ( - IN VOID *Start, - IN UINTN Length, - IN LINE_OPERATION LineOperation, - IN UINTN LineLength - ) -{ - UINTN ArmCacheLineAlignmentMask = LineLength - 1; - - // Align address (rounding down) - UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask); - UINTN EndAddress = (UINTN)Start + Length; - - // Perform the line operation on an address in each cache line - while (AlignedAddress < EndAddress) { - LineOperation(AlignedAddress); - AlignedAddress += LineLength; - } - ArmDataSynchronizationBarrier (); -} - -VOID -EFIAPI -InvalidateInstructionCache ( - VOID - ) -{ - ASSERT (FALSE); -} - -VOID -EFIAPI -InvalidateDataCache ( - VOID - ) -{ - ASSERT (FALSE); -} - -VOID * -EFIAPI -InvalidateInstructionCacheRange ( - IN VOID *Address, - IN UINTN Length - ) -{ - CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA, - ArmDataCacheLineLength ()); - CacheRangeOperation (Address, Length, - ArmInvalidateInstructionCacheEntryToPoUByMVA, - ArmInstructionCacheLineLength ()); - - ArmInstructionSynchronizationBarrier (); - - return Address; -} - -VOID -EFIAPI -WriteBackInvalidateDataCache ( - VOID - ) -{ - ASSERT (FALSE); -} - -VOID * -EFIAPI -WriteBackInvalidateDataCacheRange ( - IN VOID *Address, - IN UINTN Length - ) -{ - CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA, - ArmDataCacheLineLength ()); - return Address; -} - -VOID -EFIAPI -WriteBackDataCache ( - VOID - ) -{ - ASSERT (FALSE); -} - -VOID * -EFIAPI -WriteBackDataCacheRange ( - IN VOID *Address, - IN UINTN Length - ) -{ - CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA, - ArmDataCacheLineLength ()); - return Address; -} - -VOID * -EFIAPI -InvalidateDataCacheRange ( - IN VOID *Address, - IN UINTN Length - ) -{ - CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA, - ArmDataCacheLineLength ()); - return Address; -} diff --git a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf b/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf deleted file mode 100644 index d519972942..0000000000 --- a/ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf +++ /dev/null @@ -1,33 +0,0 @@ -#/** @file -# Implement CacheMaintenanceLib for ARM architectures -# -# Copyright (c) 2008, Apple Inc. All rights reserved.
-# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -# -# -#**/ - -[Defines] - INF_VERSION = 0x00010005 - BASE_NAME = ArmCacheMaintenanceLib - FILE_GUID = 1A20BE1F-33AD-450C-B49A-7123FCA8B7F9 - MODULE_TYPE = BASE - VERSION_STRING = 1.0 - LIBRARY_CLASS = CacheMaintenanceLib - -[Sources.common] - ArmCacheMaintenanceLib.c - -[Packages] - ArmPkg/ArmPkg.dec - MdePkg/MdePkg.dec - -[LibraryClasses] - ArmLib - BaseLib diff --git a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c b/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c deleted file mode 100644 index 3ecae77d33..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/Aarch64Disassembler.c +++ /dev/null @@ -1,48 +0,0 @@ -/** @file - Default exception handler - - Copyright (c) 2014, ARM Limited. All rights reserved. - - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD - License which accompanies this distribution. The full text of the license may - be found at http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -/** - Place a disassembly of of **OpCodePtr into buffer, and update OpCodePtr to - point to next instruction. - - @param OpCodePtrPtr Pointer to pointer of instruction to disassemble. - @param Thumb TRUE for Thumb(2), FALSE for ARM instruction stream - @param Extended TRUE dump hex for instruction too. - @param ItBlock Size of IT Block - @param Buf Buffer to sprintf disassembly into. - @param Size Size of Buf in bytes. - -**/ -VOID -DisassembleInstruction ( - IN UINT8 **OpCodePtr, - IN BOOLEAN Thumb, - IN BOOLEAN Extended, - IN OUT UINT32 *ItBlock, - OUT CHAR8 *Buf, - OUT UINTN Size - ) -{ - // Not yet supported for AArch64. - // Put error in the buffer as we have no return code and the buffer may be - // printed directly so needs a '\0'. - AsciiSPrint (Buf, Size, "AArch64 not supported"); - return; -} diff --git a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c b/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c deleted file mode 100644 index 29d9414a78..0000000000 --- a/ArmPkg/Library/ArmDisassemblerLib/ArmDisassembler.c +++ /dev/null @@ -1,455 +0,0 @@ -/** @file - Default exception handler - - Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.
- - This program and the accompanying materials - are licensed and made available under the terms and conditions of the BSD License - which accompanies this distribution. The full text of the license may be found at - http://opensource.org/licenses/bsd-license.php - - THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, - WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. - -**/ - -#include -#include -#include -#include - -CHAR8 *gCondition[] = { - "EQ", - "NE", - "CS", - "CC", - "MI", - "PL", - "VS", - "VC", - "HI", - "LS", - "GE", - "LT", - "GT", - "LE", - "", - "2" -}; - -#define COND(_a) gCondition[((_a) >> 28)] - -CHAR8 *gReg[] = { - "r0", - "r1", - "r2", - "r3", - "r4", - "r5", - "r6", - "r7", - "r8", - "r9", - "r10", - "r11", - "r12", - "sp", - "lr", - "pc" -}; - -CHAR8 *gLdmAdr[] = { - "DA", - "IA", - "DB", - "IB" -}; - -CHAR8 *gLdmStack[] = { - "FA", - "FD", - "EA", - "ED" -}; - -#define LDM_EXT(_reg, _off) ((_reg == 13) ? gLdmStack[(_off)] : gLdmAdr[(_off)]) - - -#define SIGN(_U) ((_U) ? "" : "-") -#define WRITE(_W) ((_W) ? "!" : "") -#define BYTE(_B) ((_B) ? "B":"") -#define USER(_B) ((_B) ? "^" : "") - -CHAR8 mMregListStr[4*15 + 1]; - -CHAR8 * -MRegList ( - UINT32 OpCode - ) -{ - UINTN Index, Start, End; - BOOLEAN First; - - mMregListStr[0] = '\0'; - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "{"); - for (Index = 0, First = TRUE; Index <= 15; Index++) { - if ((OpCode & (1 << Index)) != 0) { - Start = End = Index; - for (Index++; ((OpCode & (1 << Index)) != 0) && Index <= 15; Index++) { - End = Index; - } - - if (!First) { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, ","); - } else { - First = FALSE; - } - - if (Start == End) { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]); - AsciiStrCatS (mMregListStr, sizeof mMregListStr, ", "); - } else { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[Start]); - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "-"); - AsciiStrCatS (mMregListStr, sizeof mMregListStr, gReg[End]); - } - } - } - if (First) { - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "ERROR"); - } - AsciiStrCatS (mMregListStr, sizeof mMregListStr, "}"); - - // BugBug: Make caller pass in buffer it is cleaner - return mMregListStr; -} - -CHAR8 * -FieldMask ( - IN UINT32 Mask - ) -{ - return ""; -} - -UINT32 -RotateRight ( - IN UINT32 Op, - IN UINT32 Shift - ) -{ - return (Op >> Shift) | (Op << (32 - Shift)); -} - - -/** - Place a dissasembly of of **OpCodePtr into buffer, and update OpCodePtr to - point to next instructin. - - We cheat and only decode instructions that access - memory. If the instruction is not found we dump the instruction in hex. - - @param OpCodePtr Pointer to pointer of ARM instruction to disassemble. - @param Buf Buffer to sprintf disassembly into. - @param Size Size of Buf in bytes. - @param Extended TRUE dump hex for instruction too. - -**/ -VOID -DisassembleArmInstruction ( - IN UINT32 **OpCodePtr, - OUT CHAR8 *Buf, - OUT UINTN Size, - IN BOOLEAN Extended - ) -{ - UINT32 OpCode = **OpCodePtr; - CHAR8 *Type, *Root; - BOOLEAN I, P, U, B, W, L, S, H; - UINT32 Rn, Rd, Rm; - UINT32 imode, offset_8, offset_12; - UINT32 Index; - UINT32 shift_imm, shift; - - I = (OpCode & BIT25) == BIT25; - P = (OpCode & BIT24) == BIT24; - U = (OpCode & BIT23) == BIT23; - B = (OpCode & BIT22) == BIT22; // Also called S - W = (OpCode & BIT21) == BIT21; - L = (OpCode & BIT20) == BIT20; - S = (OpCode & BIT6) == BIT6; - H = (OpCode & BIT5) == BIT5; - Rn = (OpCode >> 16) & 0xf; - Rd = (OpCode >> 12) & 0xf; - Rm = (OpCode & 0xf); - - - if (Extended) { - Index = AsciiSPrint (Buf, Size, "0x%08x ", OpCode); - Buf += Index; - Size -= Index; - } - - // LDREX, STREX - if ((OpCode & 0x0fe000f0) == 0x01800090) { - if (L) { - // A4.1.27 LDREX{} , [] - AsciiSPrint (Buf, Size, "LDREX%a %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn]); - } else { - // A4.1.103 STREX{} , , [] - AsciiSPrint (Buf, Size, "STREX%a %a, %a, [%a]", COND (OpCode), gReg[Rd], gReg[Rn], gReg[Rn]); - } - return; - } - - // LDM/STM - if ((OpCode & 0x0e000000) == 0x08000000) { - if (L) { - // A4.1.20 LDM{} {!}, - // A4.1.21 LDM{} , ^ - // A4.1.22 LDM{} {!}, ^ - AsciiSPrint (Buf, Size, "LDM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B)); - } else { - // A4.1.97 STM{} {!}, - // A4.1.98 STM{} , ^ - AsciiSPrint (Buf, Size, "STM%a%a, %a%a, %a", COND (OpCode), LDM_EXT (Rn ,(OpCode >> 23) & 3), gReg[Rn], WRITE (W), MRegList (OpCode), USER (B)); - } - return; - } - - // LDR/STR Address Mode 2 - if ( ((OpCode & 0x0c000000) == 0x04000000) || ((OpCode & 0xfd70f000 ) == 0xf550f000) ) { - offset_12 = OpCode & 0xfff; - if ((OpCode & 0xfd70f000 ) == 0xf550f000) { - Index = AsciiSPrint (Buf, Size, "PLD"); - } else { - Index = AsciiSPrint (Buf, Size, "%a%a%a%a %a, ", L ? "LDR" : "STR", COND (OpCode), BYTE (B), (!(P) && W) ? "T":"", gReg[Rd]); - } - if (P) { - if (!I) { - // A5.2.2 [, #+/-] - // A5.2.5 [, #+/-] - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a0x%x]%a", gReg[Rn], SIGN (U), offset_12, WRITE (W)); - } else if ((OpCode & 0x03000ff0) == 0x03000000) { - // A5.2.3 [, +/-] - // A5.2.6 [, +/-]! - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a]%a", gReg[Rn], SIGN (U), WRITE (W)); - } else { - // A5.2.4 [, +/-, LSL #] - // A5.2.7 [, +/-, LSL #]! - shift_imm = (OpCode >> 7) & 0x1f; - shift = (OpCode >> 5) & 0x3; - if (shift == 0x0) { - Type = "LSL"; - } else if (shift == 0x1) { - Type = "LSR"; - if (shift_imm == 0) { - shift_imm = 32; - } - } else if (shift == 0x12) { - Type = "ASR"; - } else if (shift_imm == 0) { - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, RRX]%a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W)); - return; - } else { - Type = "ROR"; - } - - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%a, %a, #%d]%a", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm, WRITE (W)); - } - } else { // !P - if (!I) { - // A5.2.8 [], #+/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a0x%x", gReg[Rn], SIGN (U), offset_12); - } else if ((OpCode & 0x03000ff0) == 0x03000000) { - // A5.2.9 [], +/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]); - } else { - // A5.2.10 [], +/-, LSL # - shift_imm = (OpCode >> 7) & 0x1f; - shift = (OpCode >> 5) & 0x3; - - if (shift == 0x0) { - Type = "LSL"; - } else if (shift == 0x1) { - Type = "LSR"; - if (shift_imm == 0) { - shift_imm = 32; - } - } else if (shift == 0x12) { - Type = "ASR"; - } else if (shift_imm == 0) { - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, RRX", gReg[Rn], SIGN (U), gReg[Rm]); - // FIx me - return; - } else { - Type = "ROR"; - } - - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a, %a, #%d", gReg[Rn], SIGN (U), gReg[Rm], Type, shift_imm); - } - } - return; - } - - if ((OpCode & 0x0e000000) == 0x00000000) { - // LDR/STR address mode 3 - // LDR|STR{}H|SH|SB|D , - if (L) { - if (!S) { - Root = "LDR%aH %a, "; - } else if (!H) { - Root = "LDR%aSB %a, "; - } else { - Root = "LDR%aSH %a, "; - } - } else { - if (!S) { - Root = "STR%aH %a "; - } else if (!H) { - Root = "LDR%aD %a "; - } else { - Root = "STR%aD %a "; - } - } - - Index = AsciiSPrint (Buf, Size, Root, COND (OpCode), gReg[Rd]); - - S = (OpCode & BIT6) == BIT6; - H = (OpCode & BIT5) == BIT5; - offset_8 = ((OpCode >> 4) | (OpCode * 0xf)) & 0xff; - if (P & !W) { - // Immediate offset/index - if (B) { - // A5.3.2 [, #+/-] - // A5.3.4 [, #+/-]! - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%d]%a", gReg[Rn], SIGN (U), offset_8, WRITE (W)); - } else { - // A5.3.3 [, +/-] - // A5.3.5 [, +/-]! - AsciiSPrint (&Buf[Index], Size - Index, "[%a, #%a%]a", gReg[Rn], SIGN (U), gReg[Rm], WRITE (W)); - } - } else { - // Register offset/index - if (B) { - // A5.3.6 [], #+/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%d", gReg[Rn], SIGN (U), offset_8); - } else { - // A5.3.7 [], +/- - AsciiSPrint (&Buf[Index], Size - Index, "[%a], #%a%a", gReg[Rn], SIGN (U), gReg[Rm]); - } - } - return; - } - - if ((OpCode & 0x0fb000f0) == 0x01000050) { - // A4.1.108 SWP SWP{}B , , [] - // A4.1.109 SWPB SWP{}B , , [] - AsciiSPrint (Buf, Size, "SWP%a%a %a, %a, [%a]", COND (OpCode), BYTE (B), gReg[Rd], gReg[Rm], gReg[Rn]); - return; - } - - if ((OpCode & 0xfe5f0f00) == 0xf84d0500) { - // A4.1.90 SRS SRS #{!} - AsciiSPrint (Buf, Size, "SRS%a #0x%x%a", gLdmStack[(OpCode >> 23) & 3], OpCode & 0x1f, WRITE (W)); - return; - } - - if ((OpCode & 0xfe500f00) == 0xf8100500) { - // A4.1.59 RFE {!} - AsciiSPrint (Buf, Size, "RFE%a %a", gLdmStack[(OpCode >> 23) & 3], gReg[Rn], WRITE (W)); - return; - } - - if ((OpCode & 0xfff000f0) == 0xe1200070) { - // A4.1.7 BKPT - AsciiSPrint (Buf, Size, "BKPT %x", ((OpCode >> 8) | (OpCode & 0xf)) & 0xffff); - return; - } - - if ((OpCode & 0xfff10020) == 0xf1000000) { - // A4.1.16 CPS {, #} - if (((OpCode >> 6) & 0x7) == 0) { - AsciiSPrint (Buf, Size, "CPS #0x%x", (OpCode & 0x2f)); - } else { - imode = (OpCode >> 18) & 0x3; - Index = AsciiSPrint (Buf, Size, "CPS%a %a%a%a", (imode == 3) ? "ID":"IE", (OpCode & BIT8) ? "A":"", (OpCode & BIT7) ? "I":"", (OpCode & BIT6) ? "F":""); - if ((OpCode & BIT17) != 0) { - AsciiSPrint (&Buf[Index], Size - Index, ", #0x%x", OpCode & 0x1f); - } - } - return; - } - - if ((OpCode & 0x0f000000) == 0x0f000000) { - // A4.1.107 SWI{} - AsciiSPrint (Buf, Size, "SWI%a %x", COND (OpCode), OpCode & 0x00ffffff); - return; - } - - if ((OpCode & 0x0fb00000) == 0x01000000) { - // A4.1.38 MRS{} , CPSR MRS{} , SPSR - AsciiSPrint (Buf, Size, "MRS%a %a, %a", COND (OpCode), gReg[Rd], B ? "SPSR" : "CPSR"); - return; - } - - - if ((OpCode & 0x0db00000) == 0x03200000) { - // A4.1.38 MSR{} CPSR_, # MSR{} CPSR_, - if (I) { - // MSR{} CPSR_, # - AsciiSPrint (Buf, Size, "MRS%a %a_%a, #0x%x", COND (OpCode), B ? "SPSR" : "CPSR", FieldMask ((OpCode >> 16) & 0xf), RotateRight (OpCode & 0xf, ((OpCode >> 8) & 0xf) *2)); - } else { - // MSR{} CPSR_, - AsciiSPrint (Buf, Size, "MRS%a %a_%a, %a", COND (OpCode), B ? "SPSR" : "CPSR", gReg[Rd]); - } - return; - } - - if ((OpCode & 0xff000010) == 0xfe000000) { - // A4.1.13 CDP{} , , , , , - AsciiSPrint (Buf, Size, "CDP%a 0x%x, 0x%x, CR%d, CR%d, CR%d, 0x%x", COND (OpCode), (OpCode >> 8) & 0xf, (OpCode >> 20) & 0xf, Rn, Rd, Rm, (OpCode >> 5) &0x7); - return; - } - - if ((OpCode & 0x0e000000) == 0x0c000000) { - // A4.1.19 LDC and A4.1.96 SDC - if ((OpCode & 0xf0000000) == 0xf0000000) { - Index = AsciiSPrint (Buf, Size, "%a2 0x%x, CR%d, ", L ? "LDC":"SDC", (OpCode >> 8) & 0xf, Rd); - } else { - Index = AsciiSPrint (Buf, Size, "%a%a 0x%x, CR%d, ", L ? "LDC":"SDC", COND (OpCode), (OpCode >> 8) & 0xf, Rd); - } - - if (!P) { - if (!W) { - // A5.5.5.5 [],