From 6defc4db4c508adc52d7b5273ef22020b89e0ab5 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Tue, 1 Jul 2014 09:24:07 +0000 Subject: ArmPkg/CpuDxe/ArmV6: Return error status when ExceptionHandlersStart is not 32-byte aligned The function should detect and return the error in non-debug builds when the ASSERT does nothing. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15606 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPkg/Drivers/CpuDxe/ArmV6/Exception.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) (limited to 'ArmPkg') diff --git a/ArmPkg/Drivers/CpuDxe/ArmV6/Exception.c b/ArmPkg/Drivers/CpuDxe/ArmV6/Exception.c index d7d33fb492..8000626126 100644 --- a/ArmPkg/Drivers/CpuDxe/ArmV6/Exception.c +++ b/ArmPkg/Drivers/CpuDxe/ArmV6/Exception.c @@ -1,6 +1,7 @@ /** @file Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ Copyright (c) 2014, ARM Limited. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -207,9 +208,12 @@ InitializeExceptions ( //Note: On ARM processor with the Security Extension, the Vector Table can be located anywhere in the memory. // The Vector Base Address Register defines the location ArmWriteVBar (PcdGet32(PcdCpuVectorBaseAddress)); - } else { + } else { // The Vector table must be 32-byte aligned - ASSERT(((UINT32)ExceptionHandlersStart & ARM_VECTOR_TABLE_ALIGNMENT) == 0); + if (((UINT32)ExceptionHandlersStart & ARM_VECTOR_TABLE_ALIGNMENT) != 0) { + ASSERT (0); + return EFI_INVALID_PARAMETER; + } // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code. ArmWriteVBar ((UINT32)ExceptionHandlersStart); -- cgit v1.2.3