From 1cfa1957bb6979c6b7b30cd270cab44842639f56 Mon Sep 17 00:00:00 2001 From: Laszlo Ersek Date: Mon, 23 Feb 2015 16:03:21 +0000 Subject: ArmVirtualizationPkg/PciHostBridgeDxe: IO space is emulated with MMIO There is no IO space on ARM, and there are no special instructions that access it. QEMU emulates the IO space for PCI devices with a special MMIO range. We're ready to use it at this point, we just have to switch the Io(Read|Write)(8|16|32) primitives to their MMIO counterparts, because in "MdePkg/Library/BaseIoLibIntrinsic/IoLibArm.c", the IO primitives correctly ASSERT (FALSE). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek Reviewed-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16900 6f19259b-4bc3-4df7-8a09-765794883524 --- .../ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe') diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c index 85048b2f74..ea895e8d68 100644 --- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c +++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciRootBridgeIo.c @@ -1008,13 +1008,13 @@ RootBridgeIoIoRW ( if (Write) { switch (OperationWidth) { case EfiPciWidthUint8: - IoWrite8 ((UINTN)Address, *Uint8Buffer); + MmioWrite8 ((UINTN)Address, *Uint8Buffer); break; case EfiPciWidthUint16: - IoWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer)); + MmioWrite16 ((UINTN)Address, *((UINT16 *)Uint8Buffer)); break; case EfiPciWidthUint32: - IoWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); + MmioWrite32 ((UINTN)Address, *((UINT32 *)Uint8Buffer)); break; default: // @@ -1027,13 +1027,13 @@ RootBridgeIoIoRW ( } else { switch (OperationWidth) { case EfiPciWidthUint8: - *Uint8Buffer = IoRead8 ((UINTN)Address); + *Uint8Buffer = MmioRead8 ((UINTN)Address); break; case EfiPciWidthUint16: - *((UINT16 *)Uint8Buffer) = IoRead16 ((UINTN)Address); + *((UINT16 *)Uint8Buffer) = MmioRead16 ((UINTN)Address); break; case EfiPciWidthUint32: - *((UINT32 *)Uint8Buffer) = IoRead32 ((UINTN)Address); + *((UINT32 *)Uint8Buffer) = MmioRead32 ((UINTN)Address); break; default: // -- cgit v1.2.3