From 2dbcb8f0a3250395c0ea8436ac519b6908dc0ee7 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Thu, 22 Sep 2011 23:05:20 +0000 Subject: ArmPlatformPkg: Changed memory model for the stacks In the previous version, every cores had the same stack size. To avoid to waste memory with secondary core stacks, the primary core stack size is now different from the secondary cores stack size. These are the Stack PCDs and their default values: gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPlatformPkg/Documentation/ArmPlatformPkg.txt | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'ArmPlatformPkg/Documentation') diff --git a/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt b/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt index e45a3f0666..418706fdef 100644 --- a/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt +++ b/ArmPlatformPkg/Documentation/ArmPlatformPkg.txt @@ -19,18 +19,19 @@ gArmTokenSpaceGuid.PcdNormalFdBaseAddress : Base Address of your Non-Secur gArmTokenSpaceGuid.PcdNormalFdSize : Size in bytes of your Non-Secure/Normal World Firmware Device # Stacks -gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Top of Secure Stack for Secure World -gArmPlatformTokenSpaceGuid.PcdCPUCoreSecStackSize : Size of the stack for each of the 4 CPU cores -gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase : Top of Stack for Monitor World -gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize : Size of the stack for each of the 4 CPU cores -gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackBase : Top of SEC Stack for Normal World -gArmPlatformTokenSpaceGuid.PcdCPUCoresNonSecStackSize : Size of the stack for each of the 4 CPU Cores +gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase : Base of Secure Stack for Secure World +gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize : Size of the stack for the Primary Core in Secure World +gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize : Size of the stack for the Secondary Cores in Secure World +gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase : Base of Stack for Monitor World +gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize : Size of the stack for each cores +gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase : Base of SEC Stack for Normal World +gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize : Size of the stack for the Primary Core +gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize : Size of the stack for the Secondary Core # CPU / Architectural controllers gArmTokenSpaceGuid.PcdGicDistributorBase : Base address of the Distributor of your General Interrupt Controller gArmTokenSpaceGuid.PcdGicInterruptInterfaceBase : Base address of the Interface of your General Interrupt Controller gArmPlatformTokenSpaceGuid.PcdMPCoreSupport : Set to 1 when MP Core platforms -gArmPlatformTokenSpaceGuid.PcdMPCoreMaxCores : Maximum number of CPU cores on the platform (used for instance to know how many stacks we need to configure) # Memory Regions gArmPlatformTokenSpaceGuid.PcdSystemMemoryUefiRegionSize : Size of the region reserve for PI & UEFI -- cgit v1.2.3