From 6dafb3030d1f5a7c281a7cba6c6f7914b5a3b065 Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Tue, 6 Aug 2013 17:41:53 +0000 Subject: ArmPlatformPkg: PrePei Cache disable and invalidate. - Disable data cache on all cores. - Do not clean caches as there might be junk in them, invalidate only. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14527 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 29 ++++++++++++++--------------- 1 file changed, 14 insertions(+), 15 deletions(-) (limited to 'ArmPlatformPkg/PrePeiCore/PrePeiCore.c') diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c index e165fd9456..1abefaefd2 100644 --- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c @@ -1,15 +1,15 @@ /** @file * Main file supporting the transition to PEI Core in Normal World for Versatile Express * -* Copyright (c) 2011-2012, ARM Limited. All rights reserved. -* -* This program and the accompanying materials -* are licensed and made available under the terms and conditions of the BSD License -* which accompanies this distribution. The full text of the license may be found at -* http://opensource.org/licenses/bsd-license.php +* Copyright (c) 2011-2013, ARM Limited. All rights reserved. * -* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +* This program and the accompanying materials +* are licensed and made available under the terms and conditions of the BSD License +* which accompanies this distribution. The full text of the license may be found at +* http://opensource.org/licenses/bsd-license.php +* +* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. * **/ @@ -71,14 +71,13 @@ CEntryPoint ( IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint ) { - //Clean Data cache - ArmCleanInvalidateDataCache (); - - //Invalidate instruction cache + // Data Cache enabled on Primary core when MMU is enabled. + ArmDisableDataCache (); + // Invalidate Data cache + ArmInvalidateDataCache (); + // Invalidate instruction cache ArmInvalidateInstructionCache (); - - // Enable Instruction & Data caches - ArmEnableDataCache (); + // Enable Instruction Caches on all cores. ArmEnableInstructionCache (); // -- cgit v1.2.3