From bebda7ceec3d3024c76b3c2ed0c9b4e502a13d61 Mon Sep 17 00:00:00 2001 From: oliviermartin Date: Fri, 10 May 2013 12:41:27 +0000 Subject: ArmPlatformPkg/ArmPlatformLib: Added support for ArmPlatformIsPrimaryCore() Checking if a core if the primary/boot core used to be done with the macro IS_PRIMARY_CORE(). Some platforms exposes configuration registers to change the primary core. Replacing the macro IS_PRIMARY_CORE() by ArmPlatformIsPrimaryCore() allows some flexibility in the way to check the primary core. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin Reviewed-by: Leif Lindholm Acked-by: Ryan Harkin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@14344 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPlatformPkg/Sec/Arm/Helper.S | 4 ++-- ArmPlatformPkg/Sec/Arm/SecEntryPoint.S | 19 ++++++++----------- ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm | 19 ++++++++----------- ArmPlatformPkg/Sec/Sec.c | 6 +++--- ArmPlatformPkg/Sec/Sec.inf | 6 ++---- ArmPlatformPkg/Sec/SecInternal.h | 1 + 6 files changed, 24 insertions(+), 31 deletions(-) (limited to 'ArmPlatformPkg/Sec') diff --git a/ArmPlatformPkg/Sec/Arm/Helper.S b/ArmPlatformPkg/Sec/Arm/Helper.S index 4eede5faba..c99987d3a1 100644 --- a/ArmPlatformPkg/Sec/Arm/Helper.S +++ b/ArmPlatformPkg/Sec/Arm/Helper.S @@ -1,10 +1,10 @@ #======================================================================================== -# Copyright (c) 2011-2012, ARM Limited. All rights reserved. +# Copyright (c) 2011-2013, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at -# http:#opensource.org/licenses/bsd-license.php +# http://opensource.org/licenses/bsd-license.php # # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S index 92035a1ffe..07fb71fdcc 100644 --- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S +++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.S @@ -1,5 +1,5 @@ // -// Copyright (c) 2011-2012, ARM Limited. All rights reserved. +// Copyright (c) 2011-2013, ARM Limited. All rights reserved. // // This program and the accompanying materials // are licensed and made available under the terms and conditions of the BSD License @@ -19,6 +19,7 @@ .align 3 GCC_ASM_IMPORT(CEntryPoint) +GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore) GCC_ASM_IMPORT(ArmPlatformSecBootAction) GCC_ASM_IMPORT(ArmPlatformSecBootMemoryInit) GCC_ASM_IMPORT(ArmDisableInterrupts) @@ -45,13 +46,12 @@ ASM_PFX(_ModuleEntryPoint): _IdentifyCpu: // Identify CPU ID bl ASM_PFX(ArmReadMpidr) - // Get ID of this CPU in Multicore system - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1) - and r5, r0, r1 + // Keep a copy of the MpId register value + mov r9, r0 // Is it the Primary Core ? - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3) - cmp r5, r3 + bl ASM_PFX(ArmPlatformIsPrimaryCore) + cmp r0, #1 // Only the primary core initialize the memory (SMC) beq _InitMem @@ -74,9 +74,6 @@ _InitMem: // Initialize Init Boot Memory bl ASM_PFX(ArmPlatformSecBootMemoryInit) - // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack) - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5) - _SetupPrimaryCoreStack: // Get the top of the primary stacks (and the base of the secondary stacks) LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1) @@ -97,7 +94,7 @@ _SetupSecondaryCoreStack: add r1, r1, r2 // Get the Core Position (ClusterId * 4) + CoreId - GetCorePositionFromMpId(r0, r5, r2) + GetCorePositionFromMpId(r0, r9, r2) // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack add r0, r0, #1 @@ -115,7 +112,7 @@ _PrepareArguments: // Jump to SEC C code // r0 = mp_id // r1 = Boot Mode - mov r0, r5 + mov r0, r9 mov r1, r10 blx r3 diff --git a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm index 9305e8e529..f89aefd2d6 100644 --- a/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm +++ b/ArmPlatformPkg/Sec/Arm/SecEntryPoint.asm @@ -1,5 +1,5 @@ // -// Copyright (c) 2011-2012, ARM Limited. All rights reserved. +// Copyright (c) 2011-2013, ARM Limited. All rights reserved. // // This program and the accompanying materials // are licensed and made available under the terms and conditions of the BSD License @@ -18,6 +18,7 @@ INCLUDE AsmMacroIoLib.inc IMPORT CEntryPoint + IMPORT ArmPlatformIsPrimaryCore IMPORT ArmPlatformSecBootAction IMPORT ArmPlatformSecBootMemoryInit IMPORT ArmDisableInterrupts @@ -47,13 +48,12 @@ _ModuleEntryPoint FUNCTION _IdentifyCpu // Identify CPU ID bl ArmReadMpidr - // Get ID of this CPU in Multicore system - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1) - and r5, r0, r1 + // Keep a copy of the MpId register value + mov r9, r0 // Is it the Primary Core ? - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3) - cmp r5, r3 + bl ArmPlatformIsPrimaryCore + cmp r0, #1 // Only the primary core initialize the memory (SMC) beq _InitMem @@ -76,9 +76,6 @@ _InitMem // Initialize Init Boot Memory bl ArmPlatformSecBootMemoryInit - // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack) - LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5) - _SetupPrimaryCoreStack // Get the top of the primary stacks (and the base of the secondary stacks) LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1) @@ -99,7 +96,7 @@ _SetupSecondaryCoreStack add r1, r1, r2 // Get the Core Position (ClusterId * 4) + CoreId - GetCorePositionFromMpId(r0, r5, r2) + GetCorePositionFromMpId(r0, r9, r2) // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack add r0, r0, #1 @@ -117,7 +114,7 @@ _PrepareArguments // Jump to SEC C code // r0 = mp_id // r1 = Boot Mode - mov r0, r5 + mov r0, r9 mov r1, r10 blx r3 ENDFUNC diff --git a/ArmPlatformPkg/Sec/Sec.c b/ArmPlatformPkg/Sec/Sec.c index 52fa53a647..5282d68ec7 100644 --- a/ArmPlatformPkg/Sec/Sec.c +++ b/ArmPlatformPkg/Sec/Sec.c @@ -56,7 +56,7 @@ CEntryPoint ( ArmPlatformSecInitialize (MpId); // Primary CPU clears out the SCU tag RAMs, secondaries wait - if (IS_PRIMARY_CORE(MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) { + if (ArmPlatformIsPrimaryCore (MpId) && (SecBootMode == ARM_SEC_COLD_BOOT)) { if (ArmIsMpCore()) { // Signal for the initial memory is configured (event: BOOT_MEM_INIT) ArmCallSEV (); @@ -108,7 +108,7 @@ CEntryPoint ( // Enter Monitor Mode enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, SecBootMode, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1)))); } else { - if (IS_PRIMARY_CORE(MpId)) { + if (ArmPlatformIsPrimaryCore (MpId)) { SerialPrint ("Trust Zone Configuration is disabled\n\r"); } @@ -147,7 +147,7 @@ TrustedWorldInitialization ( // Setup the Trustzone Chipsets if (SecBootMode == ARM_SEC_COLD_BOOT) { - if (IS_PRIMARY_CORE(MpId)) { + if (ArmPlatformIsPrimaryCore (MpId)) { if (ArmIsMpCore()) { // Signal the secondary core the Security settings is done (event: EVENT_SECURE_INIT) ArmCallSEV (); diff --git a/ArmPlatformPkg/Sec/Sec.inf b/ArmPlatformPkg/Sec/Sec.inf index 3cf9f339e0..8e64a73142 100644 --- a/ArmPlatformPkg/Sec/Sec.inf +++ b/ArmPlatformPkg/Sec/Sec.inf @@ -38,6 +38,7 @@ [LibraryClasses] ArmCpuLib ArmLib + ArmPlatformLib ArmPlatformSecLib ArmTrustedMonitorLib BaseLib @@ -61,14 +62,11 @@ gArmTokenSpaceGuid.PcdArmNsacr gArmTokenSpaceGuid.PcdArmNonSecModeTransition - gArmTokenSpaceGuid.PcdArmPrimaryCoreMask - gArmTokenSpaceGuid.PcdArmPrimaryCore - gArmTokenSpaceGuid.PcdSecureFvBaseAddress gArmTokenSpaceGuid.PcdSecureFvSize gArmTokenSpaceGuid.PcdFvBaseAddress - + gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize diff --git a/ArmPlatformPkg/Sec/SecInternal.h b/ArmPlatformPkg/Sec/SecInternal.h index eeaf40c0c8..255059af5f 100644 --- a/ArmPlatformPkg/Sec/SecInternal.h +++ b/ArmPlatformPkg/Sec/SecInternal.h @@ -19,6 +19,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3