From 6d0ca2577c3788ee1087177df439246fe8f2b4fd Mon Sep 17 00:00:00 2001 From: Olivier Martin Date: Tue, 15 Jul 2014 09:24:25 +0000 Subject: ARM Packages: Force the SEC modules to be 2K aligned for AArch64 The AArch64 Vector Table must be aligned on a 2K boundary. The FDF specification does not support 2K alignment but support 4K. A clear comment has been added to help integrator to understand why the assertion fails when porting to a new AArch64 platform. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15659 6f19259b-4bc3-4df7-8a09-765794883524 --- ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf | 25 ++++++++++++++-------- ArmPlatformPkg/ArmPlatformPkg.fdf | 25 ++++++++++++++-------- .../ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf | 4 ++-- .../ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf | 4 ++-- .../ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf | 4 ++-- ArmPlatformPkg/PrePeiCore/PrePeiCore.c | 7 +++--- 6 files changed, 42 insertions(+), 27 deletions(-) (limited to 'ArmPlatformPkg') diff --git a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf index afc2fff48f..de6ad0bed3 100644 --- a/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf +++ b/ArmPlatformPkg/ArmPlatformPkg-2ndstage.fdf @@ -1,13 +1,13 @@ # -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php +# Copyright (c) 2011-2014, ARM Limited. All rights reserved. # -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # ################################################################################ @@ -184,11 +184,18 @@ READ_LOCK_STATUS = TRUE # ############################################################################ -[Rule.Common.SEC] +[Rule.ARM.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi } +# The AArch64 Vector Table requires a 2K alignment that is not supported by the FDF specification. +# It is the reason 4K is used instead of 2K for the module alignment. +[Rule.AARCH64.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { + TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi + } + [Rule.Common.PEI_CORE] FILE PEI_CORE = $(NAMED_GUID) { TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi diff --git a/ArmPlatformPkg/ArmPlatformPkg.fdf b/ArmPlatformPkg/ArmPlatformPkg.fdf index d7355d7dca..0eda603ecd 100644 --- a/ArmPlatformPkg/ArmPlatformPkg.fdf +++ b/ArmPlatformPkg/ArmPlatformPkg.fdf @@ -1,13 +1,13 @@ # -# Copyright (c) 2011-2013, ARM Limited. All rights reserved. -# -# This program and the accompanying materials -# are licensed and made available under the terms and conditions of the BSD License -# which accompanies this distribution. The full text of the license may be found at -# http://opensource.org/licenses/bsd-license.php +# Copyright (c) 2011-2014, ARM Limited. All rights reserved. # -# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # ################################################################################ @@ -241,11 +241,18 @@ READ_LOCK_STATUS = TRUE # ############################################################################ -[Rule.Common.SEC] +[Rule.ARM.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi } +# The AArch64 Vector Table requires a 2K alignment that is not supported by the FDF specification. +# It is the reason 4K is used instead of 2K for the module alignment. +[Rule.AARCH64.SEC] + FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { + TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi + } + [Rule.Common.PEI_CORE] FILE PEI_CORE = $(NAMED_GUID) { TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf index 97a7766483..a0316f73f8 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf @@ -1,5 +1,5 @@ # -# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved. +# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -267,7 +267,7 @@ READ_LOCK_STATUS = TRUE [Rule.Common.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { - TE TE Align = 128 $(INF_OUTPUT)/$(MODULE_NAME).efi + TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi } [Rule.Common.PEI_CORE] diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf index 4e1c5a2aee..647f9b6bbe 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4-foundation.fdf @@ -1,5 +1,5 @@ # -# Copyright (c) 2011, 2013, ARM Limited. All rights reserved. +# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -240,7 +240,7 @@ READ_LOCK_STATUS = TRUE [Rule.Common.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { - TE TE Align = 128 $(INF_OUTPUT)/$(MODULE_NAME).efi + TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi } [Rule.Common.PEI_CORE] diff --git a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf index 83ceec4f63..b495a1b947 100644 --- a/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf +++ b/ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-AEMv8Ax4.fdf @@ -1,5 +1,5 @@ # -# Copyright (c) 2011 - 2013, ARM Limited. All rights reserved. +# Copyright (c) 2011 - 2014, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License @@ -251,7 +251,7 @@ READ_LOCK_STATUS = TRUE [Rule.Common.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { - TE TE Align = 128 $(INF_OUTPUT)/$(MODULE_NAME).efi + TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi } [Rule.Common.PEI_CORE] diff --git a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c index 1abefaefd2..f33f376cf1 100644 --- a/ArmPlatformPkg/PrePeiCore/PrePeiCore.c +++ b/ArmPlatformPkg/PrePeiCore/PrePeiCore.c @@ -1,7 +1,7 @@ /** @file * Main file supporting the transition to PEI Core in Normal World for Versatile Express * -* Copyright (c) 2011-2013, ARM Limited. All rights reserved. +* Copyright (c) 2011-2014, ARM Limited. All rights reserved. * * This program and the accompanying materials * are licensed and made available under the terms and conditions of the BSD License @@ -86,8 +86,9 @@ CEntryPoint ( // // Write VBAR - The Exception Vector table must be aligned to its requirement - //TODO: Fix baseTools to ensure the Exception Vector Table is correctly aligned in AArch64 - //ASSERT(((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); + // Note: The AArch64 Vector table must be 2k-byte aligned - if this assertion fails ensure + // 'Align=4K' is defined into your FDF for this module. + ASSERT (((UINTN)PeiVectorTable & ARM_VECTOR_TABLE_ALIGNMENT) == 0); ArmWriteVBar ((UINTN)PeiVectorTable); //Note: The MMU will be enabled by MemoryPeim. Only the primary core will have the MMU on. -- cgit v1.2.3