From aca7e8b6d42533bd2977c9d36574da4df2710f45 Mon Sep 17 00:00:00 2001
From: Laszlo Ersek <lersek@redhat.com>
Date: Mon, 23 Feb 2015 16:03:06 +0000
Subject: ArmVirtualizationPkg/PciHostBridgeDxe: set Root Bridge apertures from
 PCDs

Our PciHostBridgeDxe module creates one root bridge on the one and only
host bridge. The resource apertures of the root bridge (bus range, IO
space, MMIO space) are configured with the "mResAperture" array, which at
the moment carries static values inherited from PcAtChipsetPkg.

Set the array as first thing from the PCDs that we parsed from the device
tree.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Olivier Martin <Olivier.martin@arm.com>

git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16897 6f19259b-4bc3-4df7-8a09-765794883524
---
 .../PciHostBridgeDxe/PciHostBridge.c                     | 16 +++++++++++++---
 .../PciHostBridgeDxe/PciHostBridge.h                     |  2 ++
 .../PciHostBridgeDxe/PciHostBridgeDxe.inf                | 11 +++++++++++
 3 files changed, 26 insertions(+), 3 deletions(-)

(limited to 'ArmPlatformPkg')

diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
index 2f6ef68f1d..ced7528a2e 100644
--- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
+++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.c
@@ -52,9 +52,7 @@ EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
   }
 };
 
-PCI_ROOT_BRIDGE_RESOURCE_APERTURE  mResAperture[1][1] = {
-  {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}
-};
+STATIC PCI_ROOT_BRIDGE_RESOURCE_APERTURE  mResAperture[1][1];
 
 EFI_HANDLE mDriverImageHandle;
 
@@ -106,6 +104,18 @@ InitializePciHostBridge (
  
   mDriverImageHandle = ImageHandle;
   
+  mResAperture[0][0].BusBase  = PcdGet32 (PcdPciBusMin);
+  mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);
+
+  mResAperture[0][0].MemBase  = PcdGet32 (PcdPciMmio32Base);
+  mResAperture[0][0].MemLimit = (UINT64)PcdGet32 (PcdPciMmio32Base) +
+                                PcdGet32 (PcdPciMmio32Size) - 1;
+
+  mResAperture[0][0].IoBase        = PcdGet64 (PcdPciIoBase);
+  mResAperture[0][0].IoLimit       = PcdGet64 (PcdPciIoBase) +
+                                     PcdGet64 (PcdPciIoSize) - 1;
+  mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
+
   //
   // Create Host Bridge Device Handle
   //
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h
index b69b832c9c..6e9bd84c47 100644
--- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h
+++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridge.h
@@ -36,6 +36,7 @@
 #include <Library/DevicePathLib.h>
 #include <Library/IoLib.h>
 #include <Library/PciLib.h>
+#include <Library/PcdLib.h>
 
 //
 // Hard code the host bridge number in the platform.
@@ -403,6 +404,7 @@ typedef struct {
   
   UINT64          IoBase; 
   UINT64          IoLimit;     
+  UINT64          IoTranslation;
 } PCI_ROOT_BRIDGE_RESOURCE_APERTURE;
 
 typedef enum {
diff --git a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
index 4d5bb9ca14..be3200dedb 100644
--- a/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
+++ b/ArmPlatformPkg/ArmVirtualizationPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf
@@ -23,6 +23,7 @@
 
 [Packages]
   MdePkg/MdePkg.dec
+  ArmPlatformPkg/ArmPlatformPkg.dec
 
 [LibraryClasses]
   UefiDriverEntryPoint
@@ -36,6 +37,7 @@
   DevicePathLib
   IoLib
   PciLib
+  PcdLib
 
 [Sources]
   PciHostBridge.c
@@ -48,5 +50,14 @@
   gEfiMetronomeArchProtocolGuid                         ## CONSUMES
   gEfiDevicePathProtocolGuid                            ## PRODUCES
 
+[Pcd]
+  gArmPlatformTokenSpaceGuid.PcdPciBusMin
+  gArmPlatformTokenSpaceGuid.PcdPciBusMax
+  gArmPlatformTokenSpaceGuid.PcdPciIoBase
+  gArmPlatformTokenSpaceGuid.PcdPciIoSize
+  gArmPlatformTokenSpaceGuid.PcdPciIoTranslation
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Base
+  gArmPlatformTokenSpaceGuid.PcdPciMmio32Size
+
 [depex]
   gEfiMetronomeArchProtocolGuid
-- 
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