From b4ff1d4d2cec557ae3e4bb3a3cbc12812ffd2084 Mon Sep 17 00:00:00 2001 From: Guo Mang Date: Thu, 2 Jun 2016 11:38:41 +0800 Subject: ChvRefCodePkg: Add AcpiTablesPCAT. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../Pch/SampleDevice/Audio/Audio.asl | 60 ++ .../Pch/SampleDevice/Audio/Realtek.asl | 68 ++ .../Pch/SampleDevice/Bluetooth/Broadcom.asl | 90 +++ .../Pch/SampleDevice/Camera/Camera.asl | 270 +++++++ .../Pch/SampleDevice/Camera/Camera2.asl | 815 +++++++++++++++++++++ .../Pch/SampleDevice/FingerPrint/AuthenTec.asl | 47 ++ .../Pch/SampleDevice/Gps/Broadcom.asl | 136 ++++ .../AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp1.asl | 55 ++ .../AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp2.asl | 33 + .../Pch/SampleDevice/Rfid/Impinj.asl | 88 +++ .../SampleDevice/SensorHub/STMicroelectronics.asl | 87 +++ .../Pch/SampleDevice/TouchPad/Atmel.asl | 160 ++++ .../Pch/SampleDevice/TouchPad/Synaptics.asl | 60 ++ .../Pch/SampleDevice/TouchPad/Synaptics2.asl | 60 ++ .../Pch/SampleDevice/Wifi/Broadcom.asl | 164 +++++ 15 files changed, 2193 insertions(+) create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Audio.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Realtek.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Bluetooth/Broadcom.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera2.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/FingerPrint/AuthenTec.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Gps/Broadcom.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp1.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp2.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Rfid/Impinj.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/SensorHub/STMicroelectronics.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Atmel.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics2.asl create mode 100644 ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Wifi/Broadcom.asl (limited to 'ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice') diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Audio.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Audio.asl new file mode 100644 index 0000000000..4271301048 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Audio.asl @@ -0,0 +1,60 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + //<<<>>> diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Realtek.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Realtek.asl new file mode 100644 index 0000000000..af547c4ad7 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Audio/Realtek.asl @@ -0,0 +1,68 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + // + // Realtek Audio Codec + // + Device (RTEK) //Audio Codec driver I2C + { + Name (_ADR, 0) + Name (_HID, "10EC5670") + Name (_CID, "10EC5670") + Name (_DDN, "RTEK Codec Controller " ) + Name (_UID, 1) + + Method(_CRS, 0x0, NotSerialized) + { + Name(SBUF,ResourceTemplate () + { + I2CSerialBus( + 0x1C, // SlaveAddress: bus address + , // SlaveMode: default to ControllerInitiated + 400000, // ConnectionSpeed: in Hz + , // Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C2", // ResourceSource: I2C bus controller name + , // Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + ///Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {92} // SE77 Line#0 route to IOAPIC IRQ 92 + GpioInt(Edge, ActiveHigh, ExclusiveAndWake, PullNone, 0,"\\_SB.GPO3") {77} // SE77: GPIO_ALERT from AUDIO_CODEC_INT + }) + Return (SBUF) + } + + Method (_PS3, 0, NotSerialized) // _PS3: Power State 3 + { + Store (Zero, CKC3) + } + + Method (_PS0, 0, NotSerialized) // _PS0: Power State 0 + { + Store (One, CKC3) + } + + Method (_DIS, 0, NotSerialized) // _DIS: Disable Device + { + } + + Method(_STA, 0x0, NotSerialized) + { + If (LEqual(LPES, 2)) // LPE Audio ACPI Mode = 2 + { + Return (0xF) + } + Return (0x0) + } + + } // Device (RTEK) diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Bluetooth/Broadcom.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Bluetooth/Broadcom.asl new file mode 100644 index 0000000000..e81e89f0f1 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Bluetooth/Broadcom.asl @@ -0,0 +1,90 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + // + // Bluetooth controller using serial interface + // + Device(BTH0) // Bluetooth for Android + { + Name (_HID, "BCM2E1A") // Vendor BRCM request to change to 2E1A for CHT, #4753211 + Method (_STA, 0x0, NotSerialized) + { + If (And(\_OSI("Android"),LNotEqual(BDID, CHRB))) + { + Return (0x0F) + } + Return(0) + } // _STA + + Method(_CRS, 0x0, NotSerialized) + { + Name(UBUF, ResourceTemplate () { + // UARTSerial Bus Connection Descriptor + UARTSerialBus(115200, // InitialBaudRate: in bits ber second + , // BitsPerByte: default to 8 bits + , // StopBits: Defaults to one bit + 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled + , // IsBigEndian: default to LittleEndian + , // Parity: Defaults to no parity + , // FlowControl: Defaults to no flow control + 32, // ReceiveBufferSize + 32, // TransmitBufferSize + "\\_SB.PCIO.URT1", // ResourceSource: UART bus controller name + ,) // DescriptorName: creates name for offset of resource descriptor + // Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {94} // SE60 INT Line#2, IOAPIC 94 + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {62} // GPIO SE62, COMBO_BT_WAKEUP + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {64} // GPIO SE64, COMBO_BT_RESET_N + GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, "\\_SB.GPO3", ) {60} // GPIO SE60, COMBO_UART_WAKE_R + }) + Return(UBUF) + } + } // Device BTH0 + + Device (BTH1) // Bluetooth for Windows OS + { + Name (_HID, "BCM2E64") + + Method (_STA, 0x0, NotSerialized) + { + If (Or(\_OSI("Android"),LEqual(BDID, CHRB))) + { + Return (0) + } + Return(0xF) + } // _STA + + Method(_CRS, 0x0, NotSerialized) + { + Name(BBUF, ResourceTemplate () { //For Cherrytrail CRB + // UARTSerial Bus Connection Descriptor + UARTSerialBus(115200, // InitialBaudRate: in bits ber second + , // BitsPerByte: default to 8 bits + , // StopBits: Defaults to one bit + 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled + , // IsBigEndian: default to LittleEndian + , // Parity: Defaults to no parity + , // FlowControl: Defaults to no flow control + 32, // ReceiveBufferSize + 32, // TransmitBufferSize + "\\_SB.PCI0.URT1", // ResourceSource: UART bus controller name + ,) // DescriptorName: creates name for offset of resource descriptor + //Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {94} // SE60 INT Line#2, IOAPIC 94 + GpioInt(Level, ActiveLow, Exclusive, PullNone, 0, "\\_SB.GPO3", ) {60} // GPIO SE60, COMBO_UART_WAKE_R + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {62} // GPIO SE62, COMBO_BT_WAKEUP + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {64} // GPIO SE64, COMBO_BT_RESET_N + }) + Return(BBUF) + } + } // Device BTH1 diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera.asl new file mode 100644 index 0000000000..5723c62d1e --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera.asl @@ -0,0 +1,270 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(\RCAM, IntObj) + + Device (CAMD) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "INT33F7") // _HID: Hardware ID + Name (_CID, "INT33F7") // _CID: Compatible ID + Name (_SUB, "INTL0000") // _SUB: Subsystem ID + Name (_DDN, "OV2724") // _DDN: DOS Device Name + Name (_UID, One) // _UID: Unique ID + Name (_PR0, Package (1) // _PR0: Power Resources for D0 + { + CLK0 + }) + Name (PLDB, Package (0x01) + { + Buffer (0x14) + { + /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x61, 0x0C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF + } + }) + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (PLDB) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (RCAM, 1)) { // CRD_B v2.1 OV5693 + OV2724 + Return (0x0F) + } + Return (0) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBUF, ResourceTemplate () // I2C Resource define + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0035 // N"53" DOVDD18 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x002E // N"46" AVDD28 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0034 // N"52" RESET + } + + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0030 // N"48" DVDD12 + } + I2cSerialBus (0x0036, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + Return (SBUF) + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x6A, 0xA7, 0x7B, 0x37, 0x90, 0xF3, 0xFF, 0x4A, + /* 0008 */ 0xAB, 0x38, 0x9B, 0x1B, 0xF3, 0x3A, 0x30, 0x15 + })) + { + Return ("INT33F7") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0xAA, 0xAA, 0x62, 0x3C, 0xE0, 0xD8, 0x1A, 0x40, + /* 0008 */ 0x84, 0xC3, 0xFC, 0x05, 0x65, 0x6F, 0xA2, 0x8C + })) + { + Return ("OV2724") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41, + /* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE + })) + { + Return ("3SF201T2") // IHV Part Numbe + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x2A, 0x51, 0x59, 0x29, 0x8C, 0x02, 0x46, 0x46, + /* 0008 */ 0xB7, 0x3D, 0x4D, 0x1B, 0x56, 0x72, 0xFA, 0xD8 + })) + { + Return ("BSW_ITL_RVP") + } + + If (LEqual (Arg0, Buffer (0x10) // mipiport + { + /* 0000 */ 0xD8, 0x7B, 0x3B, 0xEA, 0x9B, 0xE0, 0x39, 0x42, + /* 0008 */ 0xAD, 0x6E, 0xED, 0x52, 0x5F, 0x3F, 0x26, 0xAB + })) + { + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Return (0x1011) // BSW CR supports only single lane OV2724 sensor module + } + Return (0x1021) + } + + If (LEqual (Arg0, Buffer (0x10) // func + { + /* 0000 */ 0x92, 0xC4, 0x5A, 0xB6, 0x30, 0x9E, 0x60, 0x4D, + /* 0008 */ 0xB5, 0xB2, 0xF4, 0x97, 0xC7, 0x90, 0xD9, 0xCF + })) + { + Return (Zero) + } + + If (LEqual (Arg0, Buffer (0x10) // rom + { + /* 0000 */ 0x0F, 0xAB, 0x70, 0xE7, 0x44, 0x26, 0xAB, 0x4B, + /* 0008 */ 0x86, 0x28, 0xD6, 0x2F, 0x16, 0x83, 0xFB, 0x9D + })) + { + Return (Zero) + } + + If (LEqual (Arg0, Buffer (0x10) // power + { + /* 0000 */ 0xB2, 0x4A, 0xA5, 0x1E, 0x84, 0xCD, 0xCC, 0x48, + /* 0008 */ 0x9D, 0xD4, 0x7F, 0x59, 0x4E, 0xC3, 0xB0, 0x15 + })) + { + Return (0x2) + } + + If (LEqual (Arg0, Buffer (0x10) // mclk + { + /* 0000 */ 0x39, 0xA6, 0xC9, 0x75, 0x8A, 0x5C, 0x00, 0x4A, + /* 0008 */ 0x9F, 0x48, 0xA9, 0xC3, 0xB5, 0xDA, 0x78, 0x9F + })) + { + Return (Zero) + } + + // Dsm2PlatformStr + If(LEqual(Arg0, ToUUID("2FA9BB94-9C5D-4AEB-8E6E-27434F81E3D3"))) + { + Return ("BSW") + } + + // Dsm2PlatformSubStr + If(LEqual(Arg0, ToUUID("647A6CA2-8B29-49AC-8806-D58B3D2D3EF5"))) + { + Return ("FFD") + } + + // Dsm2SiliconStr + If(LEqual(Arg0, ToUUID("A6E922A1-F7B3-4399-B56A-406AE416843B"))) + { + Return ("BSW") + } + + // Dsm2PlatformStr + If(LEqual(Arg0, ToUUID("5960313B-0AB0-4940-8840-2CAFA420C015"))) + { + Return ("INTEL") + } + + // Dsm2Info + If(LEqual(Arg0, ToUUID("F486D39F-D657-484B-84A6-42A565712B92"))) + { + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Return (Buffer (32) // BSW CR supports only single lane OV2724 sensor module + { + 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x07, 0x01, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + Return (Buffer (32) + { + 0x01, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x07, 0x01, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + + If (LEqual (Arg0, Buffer (0x10) // I2C + { + /* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C, + /* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81 + })) + { + If (LEqual (Arg2, One)) // total number + { + Return (One) + } + + If (LEqual (Arg2, 0x02)) // bus4 cmos 0x10 400000 + { + Return (0x02003600) + } + } + + If (LEqual (Arg0, Buffer (0x10) // gpio + { + /* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F, + /* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F + })) + { + If (LEqual (Arg2, One)) // total number + { + Return (0x04) + } + + If (LEqual (Arg2, 0x02)) + { + Return (0x01003507) // 1.8V + } + If (LEqual (Arg2, 0x03)) + { + Return (0x01002E08) // 2.8V + } + + If (LEqual (Arg2, 0x04)) + { + Return (0x01003400) // RESET + } + + If (LEqual (Arg2, 0x05)) + { + Return (0x01003001) // 1.2V + } + } + + Return (Zero) + } + } diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera2.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera2.asl new file mode 100644 index 0000000000..cc0598c1bc --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Camera/Camera2.asl @@ -0,0 +1,815 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(\RCAM, IntObj) + + // + // Device CAM1-----Back Camera + // + Device (CAM1) + { + Name(_ADR, 0x00) + Name(_HID, "INTCF1A") + Name(_CID, "INTCF1A") + Name(_SUB, "INTL0000") + Name(_DDN, "Sony IMX175") + Name(_UID, 0x01) + + Name (_PR0, Package (1) // _PR0: Power Resources for D0 + { + CLK0 + }) + + Name (PLDB, Package(1) + { + Buffer(0x14) + { + 0x82,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00, + 0x69,0x0c,0x00,0x00, + 0x03,0x00,0x00,0x00, + 0xFF,0xFF,0xFF,0xFF + } + }) + + Method(_PLD,0,Serialized) + { + Return (PLDB) + } + + Method (_STA, 0, NotSerialized) { + If (LEqual (RCAM, 0)) { // Cynthiana_A IMX175 + OV2722 + Return (0x0F) + } + Return (0) + } + + Method (_CRS, 0x0, Serialized) + { + Name(SBUF,ResourceTemplate () + { + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {49} // MUX_CAM1_PWRDWN + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {52} // CAM_1_RST_N + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {48} // MUX_CAM_ACT_LED + + I2CSerialBus(0x10, //SlaveAddress: bus address + , //SlaveMode: default to ControllerInitiated + 400000, //ConnectionSpeed: in Hz + , //Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C4", //ResourceSource: I2C bus controller name + , //ResourceSourceIndex: defaults to 0 + , //ResourceUsage: Defaults to ResourceConsumer + , //Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + I2CSerialBus(0xC, //SlaveAddress: bus address + , //SlaveMode: default to ControllerInitiated + 400000, //ConnectionSpeed: in Hz + , //Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C4", //ResourceSource: I2C bus controller name + , //ResourceSourceIndex: defaults to 0 + , //ResourceUsage: Defaults to ResourceConsumer + , //Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + I2CSerialBus(0x54, //SlaveAddress: bus address + , //SlaveMode: default to ControllerInitiated + 400000, //ConnectionSpeed: in Hz + , //Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C4", //ResourceSource: I2C bus controller name + , //ResourceSourceIndex: defaults to 0 + , //ResourceUsage: Defaults to ResourceConsumer + , //Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + }) + Return (SBUF) + } + + Method(_DSM, 0x4, NotSerialized) + { + If(LEqual(Arg0, ToUUID("377BA76A-F390-4AFF-AB38-9B1BF33A3015"))) // HWID + { + Return("INTCF1A"); + } + If(LEqual(Arg0, ToUUID("3C62AAAA-D8E0-401A-84C3-FC05656FA28C"))) // Sensor CMOS Name + { + Return("IMX175") + } + If(LEqual(Arg0, ToUUID("822ACE8F-2814-4174-A56B-5F029FE079EE"))) // module name + { + Return("13P2BA807") + } + If(LEqual(Arg0, ToUUID("2959512A-028C-4646-B73D-4D1B5672FAD8"))) // Customer/platform info string + { + Return("INTEL_RVP") + } + If(LEqual(Arg0, ToUUID("918AB242-C37C-450A-9D0F-F47AB97C3DEA"))) // MIPI lanes count + { + Return(0x0104) // 4 lanes + } + If(LEqual(Arg0, ToUUID("EA3B7BD8-E09B-4239-AD6E-ED525F3F26AB"))) //MIPI Port + { + Return(0x01) // csi portx4 + } + If(LEqual(Arg0, ToUUID("B65AC492-9E30-4D60-B5B2-F497C790D9CF"))) //DIR + { + Return(0x0) // degree 0 + } + If(LEqual(Arg0, ToUUID("E770AB0F-2644-4BAB-8628-D62F1683FB9D"))) //ROM + { + Return(0x2) // eeprom + } + If(LEqual(Arg0, ToUUID("1EA54AB2-CD84-48CC-9DD4-7F594EC3B015"))) // old power option + { + Return(0x00) + } + If(LEqual(Arg0, ToUUID("8DBE2651-70C1-4C6F-AC87-A37CB46E4AF6"))) // old mclk option + { + Return(0x00) + } + If(LEqual(Arg0, ToUUID("75C9A639-5C8A-4A00-9F48-A9C3B5DA789F"))) //Reserved, default return 0x0 + { + Return(0x0) + } + If(LEqual(Arg0, ToUUID("26257549-9271-4CA4-BB43-C4899D5A4881"))) //I2c + { + if(LEqual(Arg2, 1)) // Count + { + Return(0x3); + } + if(LEqual(Arg2, 2)) // Function 1 - general + { + Return(0x04001000); + } + if(LEqual(Arg2, 3)) // Function 2 - vcm + { + Return(0x04000c01); + } + if(LEqual(Arg2, 4)) // Function 3 - eeprom + { + Return(0x04005402); + } + } + If(LEqual(Arg0, ToUUID("79234640-9E10-4FEA-A5C1-B5AA8B19756F"))) //GPIO + { + if(LEqual(Arg2, 1)) // Count + { + Return(0x1); + } + if(LEqual(Arg2, 2)) // Function 1 - RST + { + Return(0x01001800); + } + } + Return(0x00) + } + } // End CAM1 + + // + // Device CAM2---Front Camera + // + Device (CAM2) + { + Name(_ADR, 0x00) + Name(_HID, "INT33FB") + Name(_CID, "INT33FB") + Name(_SUB, "INTL0000") + Name(_DDN, "OV2722") + Name(_UID, 0x01) + Name (_PR0, Package (1) // _PR0: Power Resources for D0 + { + CLK1 + }) + + Name (PLDB, Package(1) + { + Buffer(0x14) + { + 0x82,0x00,0x00,0x00, + 0x00,0x00,0x00,0x00, + 0x61,0x0c,0x00,0x00, + 0x03,0x00,0x00,0x00, + 0xFF,0xFF,0xFF,0xFF + } + }) + + Method(_PLD,0,Serialized) + { + Return (PLDB) + } + + Method (_STA, 0, NotSerialized) + { + If (LEqual (RCAM, 0)) { // Cynthiana_A IMX175 + OV2722 + Return (0x0F) + } + Return (0) + } + + Method (_CRS, 0x0, Serialized) + { + Name(SBUF,ResourceTemplate () + { + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {54} //MUX_CAM2_PWRDWN + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {50} //CAM_2_RST_N + I2CSerialBus(0x36, //SlaveAddress: bus address + , //SlaveMode: default to ControllerInitiated + 400000, //ConnectionSpeed: in Hz + , //Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C4", //ResourceSource: I2C bus controller name + , //ResourceSourceIndex: defaults to 0 + , //ResourceUsage: Defaults to ResourceConsumer + , //Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + }) + Return (SBUF) + } + + Method(_DSM, 0x4, NotSerialized) + { + If(LEqual(Arg0, ToUUID("377BA76A-F390-4AFF-AB38-9B1BF33A3015"))) // HWID + { + Return("INT33FB"); + } + If(LEqual(Arg0, ToUUID("3C62AAAA-D8E0-401A-84C3-FC05656FA28C"))) // Sensor CMOS Name + { + Return("OV2722") + } + If(LEqual(Arg0, ToUUID("822ACE8F-2814-4174-A56B-5F029FE079EE"))) // module name + { + Return("12P2SF220") + } + If(LEqual(Arg0, ToUUID("2959512A-028C-4646-B73D-4D1B5672FAD8"))) // Customer/platform info string + { + Return("INTEL_RVP") + } + If(LEqual(Arg0, ToUUID("918AB242-C37C-450A-9D0F-F47AB97C3DEA"))) // MIPI lanes count + { + Return(0x0101) // 1 lanes + } + If(LEqual(Arg0, ToUUID("EA3B7BD8-E09B-4239-AD6E-ED525F3F26AB"))) // MIPI Port + { + Return(0x00) // csi portx1 + } + If(LEqual(Arg0, ToUUID("B65AC492-9E30-4D60-B5B2-F497C790D9CF"))) // DIR + { + Return(0x0) // degree 0 + } + If(LEqual(Arg0, ToUUID("E770AB0F-2644-4BAB-8628-D62F1683FB9D"))) // ROM + { + Return(0x0) // none + } + If(LEqual(Arg0, ToUUID("1EA54AB2-CD84-48CC-9DD4-7F594EC3B015"))) // old power option + { + Return(0x00) + } + If(LEqual(Arg0, ToUUID("8DBE2651-70C1-4C6F-AC87-A37CB46E4AF6"))) // old mclk option + { + Return(0x01) + } + If(LEqual(Arg0, ToUUID("75C9A639-5C8A-4A00-9F48-A9C3B5DA789F"))) // Reserved, default return 0x0 + { + Return(0x0) + } + If(LEqual(Arg0, ToUUID("26257549-9271-4CA4-BB43-C4899D5A4881"))) // I2C + { + if(LEqual(Arg2, 1)) // Count + { + Return(0x1); + } + if(LEqual(Arg2, 2)) // Function 1 - general + { + Return(0x04003600); + } + } + If(LEqual(Arg0, ToUUID("79234640-9E10-4FEA-A5C1-B5AA8B19756F"))) // GPIO + { + if(LEqual(Arg2, 1)) // Count + { + Return(0x2); + } + if(LEqual(Arg2, 2)) // Function 1 - RST + { + Return(0x01001600); + } + if(LEqual(Arg2, 3)) // Function 2 - PWDN + { + Return(0x01001901); + } + } + Return(0x00) + } + } // End CAM2 + + // + // Device STRA + // + Device (STRA) + { + Name(_ADR, 0x00) + Name(_HID, "INTCF1C") + Name(_CID, "INTCF1C") + Name(_SUB, "INTL0000") + Name(_DDN, "Flash LM3554") + Name(_UID, 0x01) + //Return the PowerResource of D0 & D3, used for OS + //Name(_PR0,Package(){P28X, P18X}) + + Method (_STA, 0, NotSerialized) { + If (LEqual (RCAM, 0)) { // Flash for Cynthiana_A IMX175 + OV2722 + Return (0x0F) + } + Return (0) + } + + Method (_CRS, 0x0, Serialized) + { + Name(SBUF,ResourceTemplate () + { + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {56} // MUX_FLASH_TRIG + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {47} // MUX_FLASH_TORCH + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {53} // MUX_FLASH_RESET_N + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {46} // MUX_GP_CAMERASB02 + I2CSerialBus(0x53, //SlaveAddress: bus address + , //SlaveMode: default to ControllerInitiated + 400000, //ConnectionSpeed: in Hz + , //Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C4", //ResourceSource: I2C bus controller name + , //ResourceSourceIndex: defaults to 0 + , //ResourceUsage: Defaults to ResourceConsumer + , //Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + }) + Return (SBUF) + } + + Method(_DSM, 0x4, NotSerialized) + { + If(LEqual(Arg0, ToUUID("377BA76A-F390-4AFF-AB38-9B1BF33A3015"))) //HWID + { + Return("INTCF1C"); + } + If(LEqual(Arg0, ToUUID("822ACE8F-2814-4174-A56B-5F029FE079EE"))) //module name + { + Return("LM3554") + } + If(LEqual(Arg0, ToUUID("2959512A-028C-4646-B73D-4D1B5672FAD8"))) //Customer/platform info string + { + Return("INTEL_RVP") + } + If(LEqual(Arg0, ToUUID("75C9A639-5C8A-4A00-9F48-A9C3B5DA789F"))) //Reserved, default return 0x0 + { + Return(0x0) + } + If(LEqual(Arg0, ToUUID("26257549-9271-4CA4-BB43-C4899D5A4881"))) //I2c + { + if(LEqual(Arg2, 1)) // Count + { + Return(0x1); + } + if(LEqual(Arg2, 2)) // Function 1 - general + { + Return(0x04005300); + } + } + If(LEqual(Arg0, ToUUID("79234640-9E10-4FEA-A5C1-B5AA8B19756F"))) //GPIO + { + if(LEqual(Arg2, 1)) // Count + { + Return(0x4); + } + if(LEqual(Arg2, 2)) // Function 1 - Strobe + { + Return(0x01001302); + } + if(LEqual(Arg2, 3)) // Function 2 - Torch + { + Return(0x01001403); + } + if(LEqual(Arg2, 4)) // Function 3 - Strobe + { + Return(0x01001001); + } + if(LEqual(Arg2, 5)) // Function 4 - Torch + { + Return(0x01001104); + } + } + Return(0x00) + } + } //End STRA + + // + // Device CAM3-----Rear Camera + // + Device (CAM3) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "INT33BE") // _HID: Hardware ID + Name (_CID, "INT33BE") // _CID: Compatible ID + Name (_SUB, "INTL0000") // _SUB: Subsystem ID + Name (_DDN, "OV5693") // _DDN: DOS Device Name + Name (_UID, One) // _UID: Unique ID + Name (_PR0, Package (1) // _PR0: Power Resources for D0 + { + CLK1 + }) + Name (PLDB, Package (0x01) + { + Buffer (0x14) + { + /* 0000 */ 0x82, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + /* 0008 */ 0x69, 0x0C, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, + /* 0010 */ 0xFF, 0xFF, 0xFF, 0xFF + } + }) + Method (_PLD, 0, Serialized) // _PLD: Physical Location of Device + { + Return (PLDB) + } + + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (RCAM, 1)) { // CRD_B v2.1 OV5693 + OV2724 + Return (0x0F) + } + Return (0) + } + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBUF, ResourceTemplate () // I2C Resource define + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0032 // GPIO N"50" + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0033 // GPIO dvdd12 camerasb03 N"51" + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0038 // GPIO dvdd18 camerasb04 N"56" + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x002D // GPIO avdd28 camerasb08 N"45" + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0031 // GPIO vcm camerasb06 N"49" + } + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C4", + 0x00, ResourceConsumer, , + ) + I2cSerialBus (0x000C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C4", + 0x00, ResourceConsumer, , + ) + I2cSerialBus (0x0054, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C4", + 0x00, ResourceConsumer, , + ) + }) + Return (SBUF) + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x6A, 0xA7, 0x7B, 0x37, 0x90, 0xF3, 0xFF, 0x4A, + /* 0008 */ 0xAB, 0x38, 0x9B, 0x1B, 0xF3, 0x3A, 0x30, 0x15 + })) + { + Return ("INT33BE") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0xAA, 0xAA, 0x62, 0x3C, 0xE0, 0xD8, 0x1A, 0x40, + /* 0008 */ 0x84, 0xC3, 0xFC, 0x05, 0x65, 0x6F, 0xA2, 0x8C + })) + { + Return ("OV5693") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41, + /* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE + })) + { + Return ("13P2BA540") // IHV Part Numbe + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x2A, 0x51, 0x59, 0x29, 0x8C, 0x02, 0x46, 0x46, + /* 0008 */ 0xB7, 0x3D, 0x4D, 0x1B, 0x56, 0x72, 0xFA, 0xD8 + })) + { + Return ("BSW_ITL_RVP") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0xD8, 0x7B, 0x3B, 0xEA, 0x9B, 0xE0, 0x39, 0x42, + /* 0008 */ 0xAD, 0x6E, 0xED, 0x52, 0x5F, 0x3F, 0x26, 0xAB + })) + { + Return (0x1020) + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x92, 0xC4, 0x5A, 0xB6, 0x30, 0x9E, 0x60, 0x4D, + /* 0008 */ 0xB5, 0xB2, 0xF4, 0x97, 0xC7, 0x90, 0xD9, 0xCF + })) + { + Return (Zero) + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x0F, 0xAB, 0x70, 0xE7, 0x44, 0x26, 0xAB, 0x4B, + /* 0008 */ 0x86, 0x28, 0xD6, 0x2F, 0x16, 0x83, 0xFB, 0x9D + })) + { + Return (One) + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0xB2, 0x4A, 0xA5, 0x1E, 0x84, 0xCD, 0xCC, 0x48, + /* 0008 */ 0x9D, 0xD4, 0x7F, 0x59, 0x4E, 0xC3, 0xB0, 0x15 + })) + { + Return (0x2) + } + + If (LEqual (Arg0, Buffer (0x10) // mclk + { + /* 0000 */ 0x39, 0xA6, 0xC9, 0x75, 0x8A, 0x5C, 0x00, 0x4A, + /* 0008 */ 0x9F, 0x48, 0xA9, 0xC3, 0xB5, 0xDA, 0x78, 0x9F + })) + { + Return ("AD5823") + } + + //Dsm2PlatformStr + If(LEqual(Arg0, ToUUID("2FA9BB94-9C5D-4AEB-8E6E-27434F81E3D3"))) + { + Return ("BSW") + } + + //Dsm2PlatformSubStr + If(LEqual(Arg0, ToUUID("647A6CA2-8B29-49AC-8806-D58B3D2D3EF5"))) + { + Return ("FFD") + } + + //Dsm2SiliconStr + If(LEqual(Arg0, ToUUID("A6E922A1-F7B3-4399-B56A-406AE416843B"))) + { + Return ("BSW") + } + + //Dsm2PlatformStr + If(LEqual(Arg0, ToUUID("5960313B-0AB0-4940-8840-2CAFA420C015"))) + { + Return ("INTEL") + } + + //Dsm2Info + If(LEqual(Arg0, ToUUID("F486D39F-D657-484B-84A6-42A565712B92"))) + { + Return (Buffer (32) + { + 0x01, 0x00, 0x02, 0x00, 0x00, 0x00, 0x02, 0x02, + 0x07, 0x01, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 + }) + } + + If (LEqual (Arg0, Buffer (0x10) // I2C + { + /* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C, + /* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81 + })) + { + If (LEqual (Arg2, One)) + { + Return (0x03) + } + + If (LEqual (Arg2, 0x02)) + { + Return (0x04001000) + } + + If (LEqual (Arg2, 0x03)) + { + Return (0x04000C01) + } + + If (LEqual (Arg2, 0x04)) + { + Return (0x04005402) + } + } + + If (LEqual (Arg0, Buffer (0x10) // GPIO + { + /* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F, + /* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F + })) + { + If (LEqual (Arg2, One)) + { + Return (0x5) // total number + } + + If (LEqual (Arg2, 0x02)) + { + Return (0x01003200) // GPIO N"50" HIGH POWER EFFECITVE + } + If (LEqual (Arg2, 0x03)) + { + Return (0x01003301) // GPIO N"51" HIGH POWER 12 EFFECITVE + } + If (LEqual (Arg2, 0x04)) + { + Return (0x01003807) // GPIO N"56" HIGH POWER 18 EFFECITVE + } + If (LEqual (Arg2, 0x05)) + { + Return (0x01002D08) // GPIO N"45" HIGH POWER 28 EFFECITVE + } + If (LEqual (Arg2, 0x06)) + { + Return (0x01003109) // GPIO N"49" HIGH POWER 28 EFFECITVE + } + } + Return (Zero) + } + } + + // + // Device STRB + // + Device (STRB) + { + Name (_ADR, Zero) // _ADR: Address + Name (_HID, "INTCF1C") // _HID: Hardware ID + Name (_CID, "INTCF1C") // _CID: Compatible ID + Name (_SUB, "INTL0000") // _SUB: Subsystem ID + Name (_DDN, "Flash LM3554") // _DDN: DOS Device Name + Name (_UID, One) // _UID: Unique ID + Method (_STA, 0, NotSerialized) // _STA: Status + { + If (LEqual (RCAM, 1)) { // Flash for CRD_B v2.1 OV5693 + OV2724 + Return (0x0F) + } + Return (0) + } + + Method (_CRS, 0, Serialized) // _CRS: Current Resource Settings + { + Name (SBUF, ResourceTemplate () + { + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0036 + } + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x002F + } + + GpioIo (Exclusive, PullDefault, 0x0000, 0x0000, IoRestrictionOutputOnly, + "\\_SB.GPO1", 0x00, ResourceConsumer, , + ) + { // Pin list + 0x0037 //for camera led camerasb11 + } + + I2cSerialBus (0x0053, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\\_SB.PCI0.I2C4", + 0x00, ResourceConsumer, , + ) + }) + Return (SBUF) + } + + Method (_DSM, 4, NotSerialized) // _DSM: Device-Specific Method + { + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x6A, 0xA7, 0x7B, 0x37, 0x90, 0xF3, 0xFF, 0x4A, + /* 0008 */ 0xAB, 0x38, 0x9B, 0x1B, 0xF3, 0x3A, 0x30, 0x15 + })) + { + Return ("INTCF1C") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x8F, 0xCE, 0x2A, 0x82, 0x14, 0x28, 0x74, 0x41, + /* 0008 */ 0xA5, 0x6B, 0x5F, 0x02, 0x9F, 0xE0, 0x79, 0xEE + })) + { + Return ("LM3554") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x2A, 0x51, 0x59, 0x29, 0x8C, 0x02, 0x46, 0x46, + /* 0008 */ 0xB7, 0x3D, 0x4D, 0x1B, 0x56, 0x72, 0xFA, 0xD8 + })) + { + Return ("BSW_ITL_RVP") + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x39, 0xA6, 0xC9, 0x75, 0x8A, 0x5C, 0x00, 0x4A, + /* 0008 */ 0x9F, 0x48, 0xA9, 0xC3, 0xB5, 0xDA, 0x78, 0x9F + })) + { + Return (Zero) + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x49, 0x75, 0x25, 0x26, 0x71, 0x92, 0xA4, 0x4C, + /* 0008 */ 0xBB, 0x43, 0xC4, 0x89, 0x9D, 0x5A, 0x48, 0x81 + })) + { + If (LEqual (Arg2, One)) + { + Return (One) + } + + If (LEqual (Arg2, 0x02)) + { + Return (0x04005300) + } + } + + If (LEqual (Arg0, Buffer (0x10) + { + /* 0000 */ 0x40, 0x46, 0x23, 0x79, 0x10, 0x9E, 0xEA, 0x4F, + /* 0008 */ 0xA5, 0xC1, 0xB5, 0xAA, 0x8B, 0x19, 0x75, 0x6F + })) + { + If (LEqual (Arg2, One)) + { + Return (0x03) + } + + If (LEqual (Arg2, 0x02)) + { + Return (0x01003601) + } + + If (LEqual (Arg2, 0x03)) + { + Return (0x01002F02) + } + If (LEqual (Arg2, 0x04)) + { + Return (0x01003705) + } + } + + Return (Zero) + } + } // End STRB diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/FingerPrint/AuthenTec.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/FingerPrint/AuthenTec.asl new file mode 100644 index 0000000000..496701cfd7 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/FingerPrint/AuthenTec.asl @@ -0,0 +1,47 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + Device(FPNT) + { + Name(_HID, "AUTH2750") // AuthenTec AES2750 + Name(_DDN, "AuthenTec AES2750") + Method(_CRS, 0x0, NotSerialized) + { + // SpiSerial Bus Connection Descriptor + Name(UBUF, ResourceTemplate () { + SPISerialBus( + 1, // Device selection + PolarityLow, // Device selection polarity + FourWireMode, // wiremode + 8, // databit len + ControllerInitiated, // slave mode + 8000000, // Connection speed + ClockPolarityLow, // Clock polarity + ClockPhaseSecond, // clock phase + "\\_SB.PCI0.SPI1", // ResourceSource: SPI bus controller name + 0, // ResourceSourceIndex + ResourceConsumer, // Resource usage + , // DescriptorName: creates name for offset of resource descriptor + ) // Vendor Data + Interrupt (ResourceConsumer, Edge, ActiveHigh, Exclusive, , , ) {72} + //GpioInt(Edge, ActiveHigh, Exclusive, PullNone, 0, "\\_SB.GPO2", ) {1} + }) + Return (UBUF) + } + Method (_STA, 0x0, NotSerialized) + { + Return (0x0) + } + } // Device(FPNT) diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Gps/Broadcom.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Gps/Broadcom.asl new file mode 100644 index 0000000000..1896f38d97 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Gps/Broadcom.asl @@ -0,0 +1,136 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + Device(GPS0) // GPS for Android OS + { + Name(_HID, "BCM4752") + Name(_HRV, 0) + Name (UART, One) + Name (ENAB, Zero) + Name (HSTW, One) + + Method(_STA, 0x0, NotSerialized) + { + If (And(\_OSI("Android"),LNotEqual(BDID, CHRB))) + { + Return (0x0F) + } + Return(0) + } + + Method(_CRS, 0x0, NotSerialized) + { + // UARTSerial Bus Connection Descriptor + + Name(UBUF, ResourceTemplate () { // Resource for BSW RVP board + UARTSerialBus( + 115200, // InitialBaudRate: in bits ber second + , // BitsPerByte: default to 8 bits + , // StopBits: Defaults to one bit + 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled + , // IsBigEndian: default to LittleEndian + , // Parity: Defaults to no parity + FlowControlHardware, // FlowControl: Defaults to no flow control + 32, // ReceiveBufferSize + 32, // TransmitBufferSize + "\\_SB.PCI0.URT2", // ResourceSource: UART bus controller name + ,) // DescriptorName: creates name for offset of resource descriptor + + GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, "\\_SB.GPO3", ) {7} // GPS_HOSTREQ SE07 + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {3} // GPS_R_WAKEUP SE03 + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {6} // COMBO_GPS_RESET_N SE06 + }) + Name(RBUF, ResourceTemplate () { // Resource for BSW CR board + UARTSerialBus( + 115200, // InitialBaudRate: in bits ber second + , // BitsPerByte: default to 8 bits + , // StopBits: Defaults to one bit + 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled + , // IsBigEndian: default to LittleEndian + , // Parity: Defaults to no parity + FlowControlHardware, // FlowControl: Defaults to no flow control + 32, // ReceiveBufferSize + 32, // TransmitBufferSize + "\\_SB.PCI0.URT2", // ResourceSource: UART bus controller name + ,) // DescriptorName: creates name for offset of resource descriptor + + GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, "\\_SB.GPO3", ) {7} // GPS_HOSTREQ SE07 + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {3} // GPS_R_WAKEUP N03 + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {7} // COMBO_GPS_RESET_N N07 + }) + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Return (RBUF) + } + Return (UBUF) + } + } // Device GPS0 + Device(GPS1)//GPS for Windows OS. + { + Name(_HID, "BCM4752") // Vendor: test GPS device for CHT + Name(_HRV, 1) + + Method(_STA, 0x0, NotSerialized) + { + If (OR(\_OSI("Android"),LEqual(BDID, CHRB))) + { + Return (0) + } + Return(0xF) + } + + Method(_CRS, 0x0, NotSerialized) + { + // UARTSerial Bus Connection Descriptor + + Name(BBUF, ResourceTemplate () { // Resource for BSW RVP board + UARTSerialBus( + 115200, // InitialBaudRate: in bits ber second + , // BitsPerByte: default to 8 bits + , // StopBits: Defaults to one bit + 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled + , // IsBigEndian: default to LittleEndian + , // Parity: Defaults to no parity + FlowControlHardware, // FlowControl: Defaults to no flow control + 32, // ReceiveBufferSize + 32, // TransmitBufferSize + "\\_SB.PCI0.URT2", // ResourceSource: UART bus controller name + ,) // DescriptorName: creates name for offset of resource descriptor + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {6} // COMBO_GPS_RESET_N SE06 + //Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {62} // GPS_HOSTREQ SE07 Line1 maps to direct IRQ 62 + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO3", ) {3} // GPS_R_WAKEUP SE03 + }) + Name(CBUF, ResourceTemplate () { // Resource for BSW CR board + UARTSerialBus( + 115200, // InitialBaudRate: in bits ber second + , // BitsPerByte: default to 8 bits + , // StopBits: Defaults to one bit + 0xfc, // LinesInUse: 8 1-bit flags to declare line enabled + , // IsBigEndian: default to LittleEndian + , // Parity: Defaults to no parity + FlowControlHardware, // FlowControl: Defaults to no flow control + 32, // ReceiveBufferSize + 32, // TransmitBufferSize + "\\_SB.PCI0.URT2", // ResourceSource: UART bus controller name + ,) // DescriptorName: creates name for offset of resource descriptor + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {7} // COMBO_GPS_RESET_N N07 + //Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {62} // GPS_HOSTREQ SE07 Line1 maps to direct IRQ 62 + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {3} // GPS_R_WAKEUP N03 + }) + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Return (CBUF) + } + Return (BBUF) + } + } // Device GPS1 diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp1.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp1.asl new file mode 100644 index 0000000000..28d99341e8 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp1.asl @@ -0,0 +1,55 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(\NFCS, IntObj) + + // + // NFC Device + // + Device (NFC1) + { + Name (_ADR, 0x00) + Name (_HID, "NXP7471") + Name (_CID, "NXP7471") + Name (_DDN, "NXP NFC" ) + Name (_UID, 0x01) + + Method (_CRS, 0, NotSerialized) { + Name(SBUF,ResourceTemplate () + { + I2CSerialBus( + 0x29, // SlaveAddress: bus address // liuzhi: for PinoleC, it's TI's fuel guage. + , // SlaveMode: default to ControllerInitiated + 400000, // ConnectionSpeed: in Hz + , // Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C7", // ResourceSource: I2C bus controller name + , // Descriptor Name: creates name for offset of resource descriptor + ) // VendorData + + GpioInt(Level, ActiveHigh, Exclusive, PullNone, 0, "\\_SB.GPO1", ) {23} // N23, NFC_HOST_INT + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {27} // N27, NFC_RST_N + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {16} // N16, NFC_ENABLE_N + }) + Return (SBUF) + } + Method (_STA) + { + If (And(LLessEqual(NFCS, 1),LNotEqual (BDID, CHRB))) + { + Return (0xF) + } + Return (0x0) + } + } // End Device (NFC1) diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp2.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp2.asl new file mode 100644 index 0000000000..bf0b785859 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Nfc/Nxp2.asl @@ -0,0 +1,33 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(\NFCS, IntObj) + + Device (NFC2) + { + Name (_ADR, Zero) + Name (_HID, "NXP1002") + Name (_CID, "NXP1002") + Name (_DDN, "NXP NFC") + Name (_UID, One) + Method (_STA, 0, NotSerialized) + { + If (LEqual(NFCS, 2)) + { + Return (0xF) + } + Return (0x0) + } + } diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Rfid/Impinj.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Rfid/Impinj.asl new file mode 100644 index 0000000000..c8a0f92fc5 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Rfid/Impinj.asl @@ -0,0 +1,88 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + // + // PSS Device + // + Device (IMP2) //Pss Driver I2c + { + Name (_ADR, 0) + Name (_HID, "IMPJ0002") + Name (_CID, "IMPJ0002") + Name (_UID, 0x1) + + Method(_CRS, 0x0, NotSerialized) + { + Name (SBUF, ResourceTemplate () + { + I2cSerialBus ( + 0x6F, //SlaveAddress + ControllerInitiated, //SlaveMode + 100000, //ConnectionSpeed + AddressingMode7Bit, //Addressing Mode + "\\_SB.PCI0.I2C2", //ResourceSource + 0x00, //Descriptor Name + ResourceConsumer, + , + ) + }) + Return (SBUF) + } + + Method(_STA, 0x0, NotSerialized) + { + If (And(LEqual(PSDE, 1),LNotEqual (BDID, CHRB))) { + Return(0xF) + } + Return(0) + } //_STA + } // Device (Pss Chip 1) + + // + // Pss Chip (Monza 8k Dura) + // + Device (IMP3) + { + Name (_ADR, 0) // _ADR: Address + Name (_HID, "IMPJ0003") // _HID: Hardware ID + Name (_CID, "IMPJ0003") // _CID: Compatible ID + Name (_UID, 1) // _UID: Unique ID + + Method (_CRS, 0, NotSerialized) // _CRS: Current Resource Settings + { + Name (SBUF, ResourceTemplate () + { + I2cSerialBus ( + 0x6E, //SlaveAddress + ControllerInitiated, //SlaveMode + 100000, //ConnectionSpeed + AddressingMode7Bit, //Addressing Mode + "\\_SB.PCI0.I2C2", //ResourceSource + 0x00, //Descriptor Name + ResourceConsumer, + , + ) + }) + Return (SBUF) + } //_CRS + + Method(_STA, 0x0, NotSerialized) + { + If (And(LEqual(PSDE, 2),LNotEqual (BDID, CHRB))) { + Return(0xF) + } + Return(0) + } //_STA + } // End of Device IMP3 diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/SensorHub/STMicroelectronics.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/SensorHub/STMicroelectronics.asl new file mode 100644 index 0000000000..7e2e92e72c --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/SensorHub/STMicroelectronics.asl @@ -0,0 +1,87 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(\_SB.GPO2.AVBL, IntObj) + External(CDSM, MethodObj) + External(\GBA2, IntObj) + External(\_SB.GPO2.SHD3, IntObj) + + // + // Sensor hub + // + Device(SHUB) + { + Name (_ADR, 0x0) + Name (_HID, "SMO91D0") + Name (_CID, "PNP0C50") + Name (_DDN, "STM32F103RD") + Name (_UID, 0x1) + Name (_S0W, 3) // Put device to 0=D0, 3=D3 Hot, 4=D3 Cold during S0 idle + Name (_DEP, Package() {\_SB.GPO2}) + Method (_DSM, 0x4, Serialized) { + Return (CDSM (Arg0, Arg1, Arg2, Arg3, 1)) // HID Descriptor Address = 1 (IHV Specific) + } + Method (_STA, 0x0, NotSerialized) + { + If (LEqual (BDID, CHRB)) { + Return (0x0) + } + Return (0x0F) + } + + OperationRegion (GPM2, SystemMemory, Or(\GBA2, 0x4820), 4) + Field (GPM2, DWordAcc, Lock, Preserve) { + , 1, + SHD3, 1 // [1] GPIO Tx State of GPIO E19: SENSOR_HUB_RESET + } + + Method (_PS3, 0, Serialized) { + If (\_OSI ("Android")) { + If (LEqual (\_SB.GPO2.AVBL, 1)) { + Store (0x00, \_SB.GPO2.SHD3 ) // SENSOR_HUB_RESET = 0 puts the device in reset state + } + } Else { + Store (0, ^SHD3) // SENSOR_HUB_RESET = 0 for WOS + } + } + Method (_PS0, 0, Serialized) { + If (\_OSI ("Android")) { + If (LEqual (\_SB.GPO2.AVBL, 1)) { + Store (0x01, \_SB.GPO2.SHD3 ) // SENSOR_HUB_RESET = 1 put the device to normal state + } + } Else { + Store (1, ^SHD3) // SENSOR_HUB_RESET = 1 for WOS + } + Sleep (100) + } + + Method(_CRS, 0x0, NotSerialized) + { + Name(SBUF,ResourceTemplate () { + I2CSerialBus (0x40, // SlaveAddress: bus address + , // SlaveMode: default to ControllerInitiated + 400000, // ConnectionSpeed: in Hz + , // Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C1", // ResourceSource: I2C bus controller name + , // Descriptor Name: creates name for offset of resource descriptor + ) // VendorData + //Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive, , , ) {67} + GpioInt(Level, ActiveLow, Exclusive, PullUp, 0, "\\_SB.GPO2", ) {22} // E22, SENSOR_HUB_INT + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {19} // E19, SENSOR_HUB_RESET + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO2", ) {16} // E16, SENSOR_HUB_WAKE + }) + Return (SBUF) + } + } // Device SHUB diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Atmel.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Atmel.asl new file mode 100644 index 0000000000..4f2d478d43 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Atmel.asl @@ -0,0 +1,160 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(CDSM, MethodObj) + + // Common _PS3 method for I2C Panel devices + Method (TPS3, 0, Serialized) { + If (LEqual (\_SB.GPO0.AVBL, 1)) { + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Store( 0, \_SB.GPO0.TSRR ) // Reset BSW CR TOUCH + } ElseIf (LEqual(FBID, 2)) { // If it's BSW RVP FAB 2 board + Store( 0, \_SB.GPO0.TSR2 ) // Reset BSW RVP FAB 2 TOUCH + } Else { + Store( 0, \_SB.GPO0.TSRS ) // Reset BSW RVP FAB 2 TOUCH + } + } + } + + // Common _PS0 method for I2C Panel devices + Method (TPS0, 0, Serialized) { + If (LEqual (\_SB.GPO0.AVBL, 1)) { + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Store( 1, \_SB.GPO0.TSRR ) // Reset BSW CR TOUCH Done + } ElseIf (LEqual(FBID, 2)) { // If it's BSW RVP FAB 2 board + Store( 1, \_SB.GPO0.TSR2 ) // Reset BSW RVP FAB 2 TOUCH Done + } Else { + Store( 1, \_SB.GPO0.TSRS ) // Reset BSW RVP FAB 2 TOUCH Done + } + } + Sleep(100) + } + + // Common _CRS method for I2C Panel devices + // Arg0 - Panel's Slave Address + Method (TCRS, 0x1, Serialized) + { + Name (RSTL, ResourceTemplate () // Resource for BSW RVP FAB 1 2 & CR board + { + I2cSerialBus ( + 0x4A, // SlaveAddress: bus address + ControllerInitiated, // SlaveMode: Default to ControllerInitiated + 400000, // ConnectionSpeed: in Hz + AddressingMode7Bit, // Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C6", // ResourceSource: I2C bus controller name + , // ResourceSourceIndex: defaults to 0 + , // ResourceUsage: Defaults to ResourceConsumer + PI2C // Descriptor Name: creates name for offset of resource descriptor + ) // VendorData + ///Interrupt(ResourceConsumer, Level, ActiveLow, Exclusive, , ,) {59} // SW76, Line0, IRQ 59 + GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO0",,, TRST) {75} // SW75, TOUCH_RST_N + GpioInt(Level, ActiveLow, Shared, PullDefault, 0, "\\_SB.GPO0", ) {76} // SW76, TOUCH_INT_N + }) + CreateByteField (RSTL, PI2C._ADR, VAL0) // Panel's Slave Address Connection Descriptor + Store (Arg0, VAL0) // Set Panel's Slave Address from Arg0 + CreateByteField (RSTL, TRST._PIN, VAL1) // TOUCH_RST_N Connection Descriptor + If (LEqual (BDID, CRRB)) { // If it's BSW CR board + Store (75, VAL1) // SW75 to BSW CR TOUCH_RST_N + } ElseIf (LEqual (FBID, 2)) { // If it's BSW RVP FAB2 board + Store (78, VAL1) // SW78 to BSW RVP FAB2 TOUCH_RST_N + } Else { // If it's BSW RVP FAB1 board + Store (80, VAL1) // SW80 to BSW RVP FAB1 TOUCH_RST_N + } + Return (RSTL) + } + + //------------------------ + // Atmel Touch Panel using ATMEL7000 over SHARP display + // Model name currently not known + //------------------------ + Device (TSC0) + { + Name (_HID, "ATML7000") + Name (_CID, "PNP0C50") + Name (HIDA, 0x00) // HID Descriptor Address + Name (_S0W, 3) // Put device to 0=D0, 3=D3 Hot, 4=D3 Cold during S0 idle + Name (_DEP, Package () {\_SB.GPO0}) + Method (_DSM, 0x4, Serialized) { + Return (CDSM (Arg0, Arg1, Arg2, Arg3, HIDA)) + } + Method(_STA, 0, NotSerialized) { + If (LEqual (BDID, CHRB)) { + Return (0x0) + } + If (LEqual (ITSA, 0)) { // If Panel I2C Addr is AUTO + If (LEqual (BDID, CRRB)) { // If it's BSW CR board + Return (0x00) // RVP & CR Defaults are CHEMEI when AUTO + } Else { + Return (0x00) + } + } + If (LEqual (ITSA, 0x4A)) { // If Panel I2C Addr is 0x4A + Return (0x0F) + } + Return (0x00) + } + Method (_PS3, 0, Serialized) { + ^^TPS3 () + } + Method (_PS0, 0, Serialized) { + ^^TPS0 () + } + Method (_CRS, 0, NotSerialized) { + Return (^^TCRS (0x4A)) // Use I2C Slave Adress 0x4A + } + } // End Device (TSC0) + + //------------------------ + // Atmel Touch Panel using ATMEL1000 over CHEMEI INNOLUX display + // Model name is N133HSE - EA1, resolution 1920 x 1080 + //------------------------ + Device(TCS1) + { + Name (_ADR, Zero) + Name (_HID, "ATML1000") + Name (_CID, "PNP0C50") + Name (HIDA, 0x00) // HID Descriptor Address + Name (_UID, One) + Name (_S0W, 3) // Put device to 0=D0, 3=D3 Hot, 4=D3 Cold during S0 idle + Name (_DEP, Package() {\_SB.GPO0}) + Method (_DSM, 0x4, Serialized) { + Return (CDSM (Arg0, Arg1, Arg2, Arg3, HIDA)) + } + Method(_STA, 0, NotSerialized) { + If (LEqual (BDID, CHRB)) { + Return (0x0) + } + If (LEqual (ITSA, 0)) { // If Panel I2C Addr is AUTO + If (LEqual (BDID, CRRB)) { // If it's BSW CR board + Return (0x0F) // RVP & CR Defaults are CHEMEI when AUTO + } Else { + Return (0x0F) + } + } + If (LEqual (ITSA, 0x4C)) { // If Panel I2C Addr is 0x4C + Return (0x0F) + } + Return (0x00) + } + Method (_PS3, 0, Serialized) { + ^^TPS3 () + } + Method (_PS0, 0, Serialized) { + ^^TPS0 () + } + Method (_CRS, 0, NotSerialized) { + Return (^^TCRS (0x4C)) // Use I2C Slave Adress 0x4C + } + } // End Device(TSC1) diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics.asl new file mode 100644 index 0000000000..b44049cfcf --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics.asl @@ -0,0 +1,60 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(CDSM, MethodObj) + + //------------------------ + // Synaptics Precision touchpad for CR board + //------------------------ + Device (TPDC) + { + Name (_ADR, One) + Name (_HID, "MSFT0002") + Name (_CID, "PNP0C50") + Name (_UID, One) + Name (_S0W, 3) // Required to put the device to D3 Hot during S0 idle + Method (_DSM, 0x4, Serialized) { + Return (CDSM (Arg0, Arg1, Arg2, Arg3, 0x20)) // HID Descriptor Address = 0x20 (IHV Specific) + } + + Method (_STA, 0, NotSerialized) + { + If (LEqual(BDID, CRRB)) { // If it's BSW CR board + Return (0xF) + } + Return (0) + } + + Method (_CRS, 0, Serialized) + { + Name (SBFI, ResourceTemplate () + { + I2cSerialBus ( + 0x20, //SlaveAddress: bus address + ControllerInitiated, //SlaveMode: Default to ControllerInitiated + 400000, //ConnectionSpeed: in Hz + AddressingMode7Bit, //Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C5", //ResourceSource: I2C bus controller name + , //ResourceSourceIndex: defaults to 0 + , //ResourceUsage: Defaults to ResourceConsumer + , //Descriptor Name: creates name for offset of resource descriptor + ) //VendorData + + //Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {93} // SE77, Line1, IRQ93 + GpioInt(Level, ActiveLow, Shared, PullDefault, 0,"\\_SB.GPO3",) {77} // SE77, TCH_PAD_INT_N to GPIO_ALERT + }) + Return (SBFI) + } + } // End Device (TPDC) diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics2.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics2.asl new file mode 100644 index 0000000000..05c43302be --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/TouchPad/Synaptics2.asl @@ -0,0 +1,60 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + External(CDSM, MethodObj) + + //------------------------ + // Synaptics Precision touchpad + //------------------------ + Device (TPD1) + { + Name (_ADR, One) + Name (_HID, "MSFT0002") + Name (_CID, "PNP0C50") + Name (_UID, One) + Name (_S0W, 3) // Put device to 0=D0, 3=D3 Hot, 4=D3 Cold during S0 idle + Method (_DSM, 0x4, Serialized) { + Return (CDSM (Arg0, Arg1, Arg2, Arg3, 0x20)) // HID Descriptor Address = 0x20 (IHV Specific) + } + + Method (_STA, 0, NotSerialized) + { + If (Or(LEqual (BDID, CRRB),LEqual (BDID, CHRB))) { // If it's BSW CR/CH board + Return (0) + } + Return (0x0F) + } + + Method (_CRS, 0, Serialized) + { + Name (SBFI, ResourceTemplate () + { + I2cSerialBus ( + 0x20, // SlaveAddress: bus address + ControllerInitiated, // SlaveMode: Default to ControllerInitiated + 400000, // ConnectionSpeed: in Hz + AddressingMode7Bit, // Addressing Mode: default to 7 bit + "\\_SB.PCI0.I2C6", // ResourceSource: I2C bus controller name + , // ResourceSourceIndex: defaults to 0 + , // ResourceUsage: Defaults to ResourceConsumer + , // Descriptor Name: creates name for offset of resource descriptor + ) // VendorData + + //Interrupt (ResourceConsumer, Level, ActiveLow, Exclusive, , , ) {94} // SE77, Line2, IRQ94 + GpioInt(Level, ActiveLow, Exclusive, PullNone, 0,"\\_SB.GPO3",) {77} // SE77, TCH_PAD_INT_N to GPIO_ALERT + }) + Return (SBFI) + } + } // End Device (TPD1) diff --git a/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Wifi/Broadcom.asl b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Wifi/Broadcom.asl new file mode 100644 index 0000000000..9a4f178265 --- /dev/null +++ b/ChvRefCodePkg/AcpiTablesPCAT/Pch/SampleDevice/Wifi/Broadcom.asl @@ -0,0 +1,164 @@ +/** @file + ACPI DSDT table + + Copyright (c) 2012 - 2015, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + Device (BRCM) // WIFI For Android + { + Name (_ADR, 0x01) // SlotNumber + Function + Name (_DEP, Package() {\_SB.GPO1}) + // Added here for Android Support ++ + Name (_HID, "BCM43241") // _HID: Hardware ID + Name (_CID, "BCM43241") // _CID: Compatible ID + // Added here for Android Support -- + Method(_STA, 0x0, NotSerialized) + { + If (LEqual(WIFD, 1)) + { + Return (0x0F) + } + Return(0x0) + } + + Method (_RMV, 0, NotSerialized) + { + Return (0x0) + } + + Name (_PRW, Package() {0, 0}) + Name (_S4W, 2) + Name (_S0W, 2) + + Method (_CRS, 0, NotSerialized) + { + Name (RBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {53} // N21 Line#2 to IOAPIC IRQ 53 + GpioInt(Edge, ActiveHigh, ExclusiveAndWake, PullNone, 0,"\\_SB.GPO1") {21} // COMBO_WLAN_IRQ to GPIO N21 + GpioIo(Exclusive, PullNone, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {5} // COMBO_WLAN _R_EN to GPIO N5 + }) + Return (RBUF) + } + + Method (_PS3, 0, NotSerialized) + { + If(LEqual (\_SB.GPO1.AVBL, 1)) { + Store( 0x00, \_SB.GPO1.CWLE ) // COMBO_WLAN_EN = 0 put WLAN to disabled state + } + Store( 0x00, \_SB.PCI0.SDHB.PSTS) // Indicates that the device is powered off + } + Method (_PS0, 0, NotSerialized) + { + If(LEqual(\_SB.PCI0.SDHB.PSTS, 0x0)) + { + If(LEqual (\_SB.GPO1.AVBL, 1)) { + Store( 0x01, \_SB.GPO1.CWLE ) // COMBO_WLAN_EN = 1 put WLAN to enabled state + } + Store( 0x01, \_SB.PCI0.SDHB.PSTS) // Indicates that the device is powered on + } + } + + } // Device (BRCM) + Device (BRC1) // WIFI for Windows + { + Name (_ADR, 0x02) // SlotNumber + Function + Name (_DEP, Package() {\_SB.GPO1}) + Method(_STA, 0x0, NotSerialized) + { + If (LEqual(WIFD, 0)) + { + Return (0x0F) + } + Return(0) + } + Method (_RMV, 0, NotSerialized) + { + Return (0x0) + } + Name (_PRW, Package() {0, 0}) + Name (_S4W, 2) + Name (_S0W, 2) + + Method (_CRS, 0, NotSerialized) + { + Name (RBUF, ResourceTemplate () + { + Interrupt (ResourceConsumer, Edge, ActiveHigh, ExclusiveAndWake, , , ) {53} // N21 Line#2 to IOAPIC IRQ 53 + //GpioInt(Edge, ActiveHigh, ExclusiveAndWake, PullNone, 0,"\\_SB.GPO1") {21} // COMBO_WLAN_IRQ to GPIO N21 + //GpioIo(Exclusive, PullDefault, 0, 0, IoRestrictionOutputOnly, "\\_SB.GPO1", ) {5} // COMBO_WLAN _R_EN to GPIO N5 + }) + Return (RBUF) + } + + Method (_PS3, 0, NotSerialized) + { + If(LEqual (\_SB.GPO1.AVBL, 1)) { + Store( 0x00, \_SB.GPO1.CWLE ) // COMBO_WLAN_EN = 0 put WLAN to disabled state + } + Store( 0x00, \_SB.PCI0.SDHB.PSTS) // Indicates that the device is powered off + } + Method (_PS0, 0, NotSerialized) + { + If(LEqual(\_SB.PCI0.SDHB.PSTS, 0x0)) + { + If(LEqual (\_SB.GPO1.AVBL, 1)) { + Store( 0x01, \_SB.GPO1.CWLE ) // COMBO_WLAN_EN = 1 put WLAN to enabled state + } + Store( 0x01, \_SB.PCI0.SDHB.PSTS) // Indicates that the device is powered on + } + } + } // Device (BRC1) + + + // + // Secondary Broadcom WIFI function + // + Device(BRC2) + { + Name(_ADR, 0x2) // function 2 + Name(_STA, 0xf) + // + // The device is not removable. This must be a method. + // + Method(_RMV, 0x0, NotSerialized) + { + Return(0x0) + } + + // + // Describe a vendor-defined connection between this device and the + // primary wifi device + // + + Method(_CRS) { + Name(NAM, Buffer() {"\\_SB.PCI0.SDHB.BRC1"}) + Name(SPB, Buffer() { + 0x8E, // SPB Descriptor + 0x1D, 0x00, // Length including NAM above + 0x01, // +0x00 SPB Descriptor Revision + 0x00, // +0x01 Resource Source Index + 0xc0, // +0x02 Bus type - vendor defined + 0x02, // +0x03 Consumer + controller initiated + 0x00, 0x00, // +0x04 Type specific flags + 0x01, // +0x06 Type specific revision + 0x00, 0x00 // +0x07 type specific data length + // +0x09 - 0xf bytes for NULL-terminated NAM + // Length = 0x18 + }) + + Name(END, Buffer() {0x79, 0x00}) + Concatenate(SPB, NAM, Local0) + Concatenate(Local0, END, Local1) + Return(Local1) + } + } -- cgit v1.2.3