From 1760cf81e4b1847c6823ea3514a78dd120e19b6e Mon Sep 17 00:00:00 2001
From: Guo Mang <mang.guo@intel.com>
Date: Thu, 22 Dec 2016 15:57:14 +0800
Subject: MdePkg: Move to new location

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
---
 Core/MdePkg/Library/BaseLib/Ia32/LRotU64.c | 55 ++++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)
 create mode 100644 Core/MdePkg/Library/BaseLib/Ia32/LRotU64.c

(limited to 'Core/MdePkg/Library/BaseLib/Ia32/LRotU64.c')

diff --git a/Core/MdePkg/Library/BaseLib/Ia32/LRotU64.c b/Core/MdePkg/Library/BaseLib/Ia32/LRotU64.c
new file mode 100644
index 0000000000..2e01ed8bb0
--- /dev/null
+++ b/Core/MdePkg/Library/BaseLib/Ia32/LRotU64.c
@@ -0,0 +1,55 @@
+/** @file
+  64-bit left rotation for Ia32
+
+  Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
+  This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php.
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+
+
+
+/**
+  Rotates a 64-bit integer left between 0 and 63 bits, filling
+  the low bits with the high bits that were rotated.
+
+  This function rotates the 64-bit value Operand to the left by Count bits. The
+  low Count bits are fill with the high Count bits of Operand. The rotated
+  value is returned.
+
+  @param  Operand The 64-bit operand to rotate left.
+  @param  Count   The number of bits to rotate left.
+
+  @return Operand <<< Count
+
+**/
+UINT64
+EFIAPI
+InternalMathLRotU64 (
+  IN      UINT64                    Operand,
+  IN      UINTN                     Count
+  )
+{
+  _asm {
+    mov     cl, byte ptr [Count]
+    mov     edx, dword ptr [Operand + 4]
+    mov     eax, dword ptr [Operand + 0]
+    shld    ebx, edx, cl
+    shld    edx, eax, cl
+    ror     ebx, cl
+    shld    eax, ebx, cl
+    test    cl, 32                      ; Count >= 32?
+    jz      L0
+    mov     ecx, eax
+    mov     eax, edx
+    mov     edx, ecx
+L0:
+  }
+}
+
-- 
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