From 1760cf81e4b1847c6823ea3514a78dd120e19b6e Mon Sep 17 00:00:00 2001
From: Guo Mang <mang.guo@intel.com>
Date: Thu, 22 Dec 2016 15:57:14 +0800
Subject: MdePkg: Move to new location

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Guo Mang <mang.guo@intel.com>
---
 Core/MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s | 79 ++++++++++++++++++++++++++++
 1 file changed, 79 insertions(+)
 create mode 100644 Core/MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s

(limited to 'Core/MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s')

diff --git a/Core/MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s b/Core/MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s
new file mode 100644
index 0000000000..91075bf7b3
--- /dev/null
+++ b/Core/MdePkg/Library/BaseLib/Ipf/AsmCpuMisc.s
@@ -0,0 +1,79 @@
+/// @file
+///   Contains an implementation of CallPalProcStacked on Itanium-based
+///   architecture.
+///
+/// Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>
+/// This program and the accompanying materials
+/// are licensed and made available under the terms and conditions of the BSD License
+/// which accompanies this distribution.  The full text of the license may be found at
+/// http://opensource.org/licenses/bsd-license.php.
+///
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+///
+/// Module Name:  AsmCpuMisc.s
+///
+///
+
+
+.text
+.proc CpuBreakpoint
+.type CpuBreakpoint, @function
+
+CpuBreakpoint::
+        break.i 0;;
+        br.ret.dpnt    b0;;
+
+.endp CpuBreakpoint
+
+.proc MemoryFence
+.type MemoryFence, @function
+
+MemoryFence::
+        mf;;    // memory access ordering
+
+        // do we need the mf.a also here?
+        mf.a    // wait for any IO to complete?
+        
+        // not sure if we need serialization here, just put it, in case...
+        
+        srlz.d;;
+        srlz.i;;
+        
+        br.ret.dpnt    b0;;
+.endp MemoryFence
+
+.proc DisableInterrupts
+.type DisableInterrupts, @function
+
+DisableInterrupts::
+         rsm      0x4000
+         srlz.d;;
+         br.ret.dpnt    b0;;
+
+.endp DisableInterrupts
+
+.proc EnableInterrupts
+.type EnableInterrupts, @function
+
+EnableInterrupts::
+      ssm     0x4000
+      srlz.d;;
+      br.ret.dpnt    b0;;
+
+.endp EnableInterrupts
+
+.proc EnableDisableInterrupts
+.type EnableDisableInterrupts, @function
+
+EnableDisableInterrupts::
+         ssm      0x4000
+         srlz.d;;
+         srlz.i;;
+         rsm      0x4000
+         srlz.d;;
+
+         br.ret.dpnt    b0;;
+
+.endp EnableDisableInterrupts
+
-- 
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