From bc14bdb317105f282ca5e6543e97ae545dd681df Mon Sep 17 00:00:00 2001
From: vanjeff <vanjeff@6f19259b-4bc3-4df7-8a09-765794883524>
Date: Mon, 27 Oct 2008 01:52:32 +0000
Subject: git-svn-id:
 https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6240
 6f19259b-4bc3-4df7-8a09-765794883524

---
 DuetPkg/IsaAcpiDxe/PcatIsaAcpi.c                     | 4 ++--
 DuetPkg/PciBusNoEnumerationDxe/PciBus.h              | 4 ++--
 DuetPkg/PciBusNoEnumerationDxe/PciCommand.c          | 2 +-
 DuetPkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c | 4 ++--
 4 files changed, 7 insertions(+), 7 deletions(-)

(limited to 'DuetPkg')

diff --git a/DuetPkg/IsaAcpiDxe/PcatIsaAcpi.c b/DuetPkg/IsaAcpiDxe/PcatIsaAcpi.c
index a618728791..674c6dfc00 100644
--- a/DuetPkg/IsaAcpiDxe/PcatIsaAcpi.c
+++ b/DuetPkg/IsaAcpiDxe/PcatIsaAcpi.c
@@ -115,14 +115,14 @@ Returns:
         //
         // See if this is a standard PCI to ISA Bridge from the Base Code and Class Code
         //
-        if (Pci.Hdr.ClassCode[1] == PCI_CLASS_ISA) {
+        if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA) {
           Status = EFI_SUCCESS;
         } 
 
         //
         // See if this is an Intel PCI to ISA bridge in Positive Decode Mode
         //
-        if (Pci.Hdr.ClassCode[1] == PCI_CLASS_ISA_POSITIVE_DECODE &&
+        if (Pci.Hdr.ClassCode[1] == PCI_CLASS_BRIDGE_ISA_PDECODE &&
             Pci.Hdr.VendorId == 0x8086 && 
             Pci.Hdr.DeviceId == 0x7110) {
           Status = EFI_SUCCESS;
diff --git a/DuetPkg/PciBusNoEnumerationDxe/PciBus.h b/DuetPkg/PciBusNoEnumerationDxe/PciBus.h
index 568f3ffb6b..db5215ca1b 100644
--- a/DuetPkg/PciBusNoEnumerationDxe/PciBus.h
+++ b/DuetPkg/PciBusNoEnumerationDxe/PciBus.h
@@ -218,7 +218,7 @@ static UINT64                      gAllZero   = 0;
 #include "PciPowerManagement.h"
 
 
-#define IS_ISA_BRIDGE(_p)       IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_ISA)  
-#define IS_INTEL_ISA_BRIDGE(_p) (IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_ISA_POSITIVE_DECODE) && ((_p)->Hdr.VendorId == 0x8086) && ((_p)->Hdr.DeviceId == 0x7110))
+#define IS_ISA_BRIDGE(_p)       IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA)  
+#define IS_INTEL_ISA_BRIDGE(_p) (IS_CLASS2 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE) && ((_p)->Hdr.VendorId == 0x8086) && ((_p)->Hdr.DeviceId == 0x7110))
 
 #endif
diff --git a/DuetPkg/PciBusNoEnumerationDxe/PciCommand.c b/DuetPkg/PciBusNoEnumerationDxe/PciCommand.c
index 1654952d03..61393edeb4 100644
--- a/DuetPkg/PciBusNoEnumerationDxe/PciCommand.c
+++ b/DuetPkg/PciBusNoEnumerationDxe/PciCommand.c
@@ -420,7 +420,7 @@ Returns:
       PciIoDevice->PciIo.Pci.Read (
                                &PciIoDevice->PciIo,
                                EfiPciIoWidthUint32,
-                               EFI_PCI_CAPABILITY_PTR,
+                               PCI_CAPBILITY_POINTER_OFFSET,
                                1,
                                &Temp
                                );
diff --git a/DuetPkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c b/DuetPkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c
index 02815c76d3..a863475061 100644
--- a/DuetPkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c
+++ b/DuetPkg/PciBusNoEnumerationDxe/PciOptionRomSupport.c
@@ -68,7 +68,7 @@ Returns:
   //
   // 0x30
   //
-  RomBarIndex = PCI_DEVICE_ROMBAR;
+  RomBarIndex = PCI_EXPANSION_ROM_BASE;
 
   if (IS_PCI_BRIDGE (&PciIoDevice->Pci)) {
     //
@@ -174,7 +174,7 @@ Returns:
   //
   // 0x30
   //
-  RomBarIndex = PCI_DEVICE_ROMBAR;
+  RomBarIndex = PCI_EXPANSION_ROM_BASE;
   if (IS_PCI_BRIDGE (&(PciDevice->Pci))) {
     //
     // if is ppb
-- 
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