From a50f7c4c0985f1659d4b24e94f6d3aee9f6922dd Mon Sep 17 00:00:00 2001 From: erictian Date: Tue, 27 Mar 2012 12:07:38 +0000 Subject: MdeModulePkg/XhciDxe: Event Ring traverse algorithm enhancement to avoid that those completed async transfer events don't get handled in time and are flushed by newer coming events. Signed-off-by: erictian Reviewed-by: li-elvin git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13145 6f19259b-4bc3-4df7-8a09-765794883524 --- MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) (limited to 'MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h') diff --git a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h index f319c56c60..227b455230 100644 --- a/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h +++ b/MdeModulePkg/Bus/Pci/XhciDxe/XhciSched.h @@ -2,7 +2,7 @@ This file contains the definition for XHCI host controller schedule routines. -Copyright (c) 2011, Intel Corporation. All rights reserved.
+Copyright (c) 2011 - 2012, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License which accompanies this distribution. The full text of the license may be found at @@ -189,8 +189,11 @@ typedef struct _URB { TRB_TEMPLATE *TrbStart; TRB_TEMPLATE *TrbEnd; UINTN TrbNum; - EVENT_RING *EvtRing; - TRB_TEMPLATE *EvtTrbStart; + BOOLEAN StartDone; + BOOLEAN EndDone; + BOOLEAN Finished; + + TRB_TEMPLATE *EvtTrb; } URB; // -- cgit v1.2.3