From 004b82b369eb3070695a2ed1163235bbab20f3e3 Mon Sep 17 00:00:00 2001 From: Ruiyu Ni Date: Tue, 22 Dec 2015 08:41:32 +0000 Subject: MdeModulePkg: Add PCD description to MdeModulePkg.uni (Sync patch r19438 from main trunk.) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni Reviewed-by: Shumin Qiu git-svn-id: https://svn.code.sf.net/p/edk2/code/branches/UDK2015@19439 6f19259b-4bc3-4df7-8a09-765794883524 --- MdeModulePkg/MdeModulePkg.dec | 28 ++++++++++++++-------------- MdeModulePkg/MdeModulePkg.uni | Bin 188464 -> 199440 bytes 2 files changed, 14 insertions(+), 14 deletions(-) (limited to 'MdeModulePkg') diff --git a/MdeModulePkg/MdeModulePkg.dec b/MdeModulePkg/MdeModulePkg.dec index 3ded8f1de1..ea70c7e3da 100644 --- a/MdeModulePkg/MdeModulePkg.dec +++ b/MdeModulePkg/MdeModulePkg.dec @@ -962,19 +962,19 @@ # Each array entry is 24-byte in length. The array is terminated # by an array entry with a PCI Vendor ID of 0xFFFF. If a platform only contains a # standard 16550 PCI serial device whose class code is 7/0/2, the value is 0xFFFF. - # The C style structure is defined as below: - # typedef struct { - # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries. - # UINT16 DeviceId; ///< Device ID to match the PCI device - # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz - # UINT64 Offset; ///< The byte offset into to the BAR - # UINT8 BarIndex; ///< Which BAR to get the UART base address - # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte. - # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. - # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes. - # UINT8 Reserved[2]; - # } PCI_SERIAL_PARAMETER; - # It contains zero or more instances of the above structure. + # The C style structure is defined as below:
+ # typedef struct {
+ # UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.
+ # UINT16 DeviceId; ///< Device ID to match the PCI device.
+ # UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz.
+ # UINT64 Offset; ///< The byte offset into to the BAR.
+ # UINT8 BarIndex; ///< Which BAR to get the UART base address.
+ # UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.
+ # UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
+ # UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.
+ # UINT8 Reserved[2];
+ # } PCI_SERIAL_PARAMETER;
+ # It contains zero or more instances of the above structure.
# For example, if a PCI device contains two UARTs, PcdPciSerialParameters needs # to contain two instances of the above structure, with the VendorId and DeviceId # equals to the Device ID and Vendor ID of the device; If the PCI device uses the @@ -982,7 +982,7 @@ # BarIndex of second one equals to 1; If the PCI device uses the first BAR to # support both UARTs, BarIndex of both instance equals to 0, Offset of first # instance equals to 0 and Offset of second one equals to a value bigger than or - # equal to 8. + # equal to 8.
# For certain UART whose register needs to be accessed in DWORD aligned address, # RegisterStride equals to 4. # @Prompt Pci Serial Parameters diff --git a/MdeModulePkg/MdeModulePkg.uni b/MdeModulePkg/MdeModulePkg.uni index cf4f580dbe..ea385ff178 100644 Binary files a/MdeModulePkg/MdeModulePkg.uni and b/MdeModulePkg/MdeModulePkg.uni differ -- cgit v1.2.3