From 9f4f2f0e15252004e06ca246300a2fe21b8bf0ae Mon Sep 17 00:00:00 2001 From: mdkinney Date: Mon, 24 Nov 2008 08:30:58 +0000 Subject: Add EnableCache() and DisableCache() implementations for IA32 and X64 to the BaseLib git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@6705 6f19259b-4bc3-4df7-8a09-765794883524 --- MdePkg/Library/BaseLib/Ia32/DisableCache.S | 39 ++++++++++++++++++++++++ MdePkg/Library/BaseLib/Ia32/DisableCache.asm | 45 ++++++++++++++++++++++++++++ MdePkg/Library/BaseLib/Ia32/DisableCache.c | 36 ++++++++++++++++++++++ MdePkg/Library/BaseLib/Ia32/EnableCache.S | 39 ++++++++++++++++++++++++ MdePkg/Library/BaseLib/Ia32/EnableCache.asm | 45 ++++++++++++++++++++++++++++ MdePkg/Library/BaseLib/Ia32/EnableCache.c | 36 ++++++++++++++++++++++ 6 files changed, 240 insertions(+) create mode 100644 MdePkg/Library/BaseLib/Ia32/DisableCache.S create mode 100644 MdePkg/Library/BaseLib/Ia32/DisableCache.asm create mode 100644 MdePkg/Library/BaseLib/Ia32/DisableCache.c create mode 100644 MdePkg/Library/BaseLib/Ia32/EnableCache.S create mode 100644 MdePkg/Library/BaseLib/Ia32/EnableCache.asm create mode 100644 MdePkg/Library/BaseLib/Ia32/EnableCache.c (limited to 'MdePkg/Library/BaseLib/Ia32') diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.S b/MdePkg/Library/BaseLib/Ia32/DisableCache.S new file mode 100644 index 0000000000..b11245e519 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# DisableCache.S +# +# Abstract: +# +# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a +# WBINVD instruction. +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmDisableCache ( +# VOID +# ); +#------------------------------------------------------------------------------ +.globl ASM_PFX(AsmDisableCache) +ASM_PFX(AsmDisableCache): + movl %cr0, %eax + btsl $30, %eax + btrl $29, %eax + movl %eax, %cr0 + wbinvd + ret diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.asm b/MdePkg/Library/BaseLib/Ia32/DisableCache.asm new file mode 100644 index 0000000000..0d92472687 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; DisableCache.Asm +; +; Abstract: +; +; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a +; WBINVD instruction. +; +; Notes: +; +;------------------------------------------------------------------------------ + + .386p + .model flat,C + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmDisableCache ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmDisableCache PROC + mov eax, cr0 + bts eax, 30 + btr eax, 29 + mov cr0, eax + wbinvd + ret +AsmDisableCache ENDP + + END diff --git a/MdePkg/Library/BaseLib/Ia32/DisableCache.c b/MdePkg/Library/BaseLib/Ia32/DisableCache.c new file mode 100644 index 0000000000..d2d028a93d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/DisableCache.c @@ -0,0 +1,36 @@ +/** @file + AsmDisableCache function + + Copyright (c) 2006 - 2008, Intel Corporation
+ All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +/** + Disables caches. + + Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a + WBINVD instruction. + +**/ +VOID +EFIAPI +AsmDisableCache ( + VOID + ) +{ + _asm { + mov eax, cr0 + bts eax, 30 + btr eax, 29 + mov cr0, eax + wbinvd + } +} + diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.S b/MdePkg/Library/BaseLib/Ia32/EnableCache.S new file mode 100644 index 0000000000..bdb4bdbdb3 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation +# All rights reserved. This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# EnableCache.S +# +# Abstract: +# +# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear +# the NW bit of CR0 to 0 +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmEnableCache ( +# VOID +# ); +#------------------------------------------------------------------------------ +.globl ASM_PFX(AsmEnableCache) +ASM_PFX(AsmEnableCache): + wbinvd + movl %cr0, %eax + btrl $30, %eax + btrl $29, %eax + movl %eax, %cr0 + ret diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.asm b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm new file mode 100644 index 0000000000..e25a5bf44d --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.asm @@ -0,0 +1,45 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation +; All rights reserved. This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; EnableCache.Asm +; +; Abstract: +; +; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear +; the NW bit of CR0 to 0 +; +; Notes: +; +;------------------------------------------------------------------------------ + + .386p + .model flat,C + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmEnableCache ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmEnableCache PROC + wbinvd + mov eax, cr0 + btr eax, 29 + btr eax, 30 + mov cr0, eax + ret +AsmEnableCache ENDP + + END diff --git a/MdePkg/Library/BaseLib/Ia32/EnableCache.c b/MdePkg/Library/BaseLib/Ia32/EnableCache.c new file mode 100644 index 0000000000..59e2b43213 --- /dev/null +++ b/MdePkg/Library/BaseLib/Ia32/EnableCache.c @@ -0,0 +1,36 @@ +/** @file + AsmEnableCache function + + Copyright (c) 2006 - 2008, Intel Corporation
+ All rights reserved. This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +/** + Enabled caches. + + Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear + the NW bit of CR0 to 0 + +**/ +VOID +EFIAPI +AsmEnableCache ( + VOID + ) +{ + _asm { + wbinvd + mov eax, cr0 + btr eax, 30 + btr eax, 29 + mov cr0, eax + } +} + -- cgit v1.2.3