From 3f566587aea64bb986866c7f69a6b82891bf59db Mon Sep 17 00:00:00 2001
From: bxing <bxing@6f19259b-4bc3-4df7-8a09-765794883524>
Date: Fri, 21 Jul 2006 08:47:38 +0000
Subject: 1. Updated function headers in all assembly files. 2. Split
 x86LowLevel.c into a bunch of C files to make images linked with BaseLib
 smaller. 3. Fixed a few minor bugs.

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1066 6f19259b-4bc3-4df7-8a09-765794883524
---
 MdePkg/Library/BaseLib/x86EnablePaging64.c | 64 ++++++++++++++++++++++++++++++
 1 file changed, 64 insertions(+)
 create mode 100644 MdePkg/Library/BaseLib/x86EnablePaging64.c

(limited to 'MdePkg/Library/BaseLib/x86EnablePaging64.c')

diff --git a/MdePkg/Library/BaseLib/x86EnablePaging64.c b/MdePkg/Library/BaseLib/x86EnablePaging64.c
new file mode 100644
index 0000000000..424568d0f7
--- /dev/null
+++ b/MdePkg/Library/BaseLib/x86EnablePaging64.c
@@ -0,0 +1,64 @@
+/** @file
+  IA-32/x64 AsmEnablePaging64()
+
+  Copyright (c) 2006, Intel Corporation<BR>
+  All rights reserved. This program and the accompanying materials
+  are licensed and made available under the terms and conditions of the BSD License
+  which accompanies this distribution.  The full text of the license may be found at
+  http://opensource.org/licenses/bsd-license.php
+
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+  Module Name:  x86EnablePaging64.c
+
+**/
+
+#include "BaseLibInternals.h"
+
+/**
+  Enables the 64-bit paging mode on the CPU.
+
+  Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables
+  must be properly initialized prior to calling this service. This function
+  assumes the current execution mode is 32-bit protected mode with flat
+  descriptors. This function is only available on IA-32. After the 64-bit
+  paging mode is enabled, control is transferred to the function specified by
+  EntryPoint using the new stack specified by NewStack and passing in the
+  parameters specified by Context1 and Context2. Context1 and Context2 are
+  optional and may be 0. The function EntryPoint must never return.
+
+  If the current execution mode is not 32-bit protected mode with flat
+  descriptors, then ASSERT().
+  If EntryPoint is 0, then ASSERT().
+  If NewStack is 0, then ASSERT().
+
+  @param  Cs          The 16-bit selector to load in the CS before EntryPoint
+                      is called. The descriptor in the GDT that this selector
+                      references must be setup for long mode.
+  @param  EntryPoint  The 64-bit virtual address of the function to call with
+                      the new stack after paging is enabled.
+  @param  Context1    The 64-bit virtual address of the context to pass into
+                      the EntryPoint function as the first parameter after
+                      paging is enabled.
+  @param  Context2    The 64-bit virtual address of the context to pass into
+                      the EntryPoint function as the second parameter after
+                      paging is enabled.
+  @param  NewStack    The 64-bit virtual address of the new stack to use for
+                      the EntryPoint function after paging is enabled.
+
+**/
+VOID
+EFIAPI
+AsmEnablePaging64 (
+  IN      UINT16                    Cs,
+  IN      UINT64                    EntryPoint,
+  IN      UINT64                    Context1,  OPTIONAL
+  IN      UINT64                    Context2,  OPTIONAL
+  IN      UINT64                    NewStack
+  )
+{
+  ASSERT (EntryPoint != 0);
+  ASSERT (NewStack != 0);
+  InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);
+}
-- 
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