From 681dbac98cfff748ec076aa294f9129e48dab44f Mon Sep 17 00:00:00 2001 From: bxing Date: Thu, 17 Aug 2006 05:32:47 +0000 Subject: Added AsmSwitchStackAndBackingStore() to BaseLib.h for stack switching on IPF. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1305 6f19259b-4bc3-4df7-8a09-765794883524 --- MdePkg/Library/BaseLib/Ipf/SwitchStack.s | 172 +++++++++---------------------- 1 file changed, 50 insertions(+), 122 deletions(-) (limited to 'MdePkg/Library/BaseLib') diff --git a/MdePkg/Library/BaseLib/Ipf/SwitchStack.s b/MdePkg/Library/BaseLib/Ipf/SwitchStack.s index 58fe43d87f..a3c524f119 100644 --- a/MdePkg/Library/BaseLib/Ipf/SwitchStack.s +++ b/MdePkg/Library/BaseLib/Ipf/SwitchStack.s @@ -1,122 +1,50 @@ -//++ -// Copyright (c) 2006, Intel Corporation -// All rights reserved. This program and the accompanying materials -// are licensed and made available under the terms and conditions of the BSD License -// which accompanies this distribution. The full text of the license may be found at -// http://opensource.org/licenses/bsd-license.php -// -// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, -// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. -// -// Module Name: -// -// SwitchStack.s -// -// Abstract: -// -// Contains an implementation of a stack switch for the Itanium-based architecture. -// -// -// -// Revision History: -// -//-- - - .file "SwitchStack.s" - -#include "asm.h" -#include "ia_64gen.h" - -// Define hardware RSE Configuration Register -// -// RS Configuration (RSC) bit field positions - -#define RSC_MODE 0 -#define RSC_PL 2 -#define RSC_BE 4 -// RSC bits 5-15 reserved -#define RSC_MBZ0 5 -#define RSC_MBZ0_V 0x3ff -#define RSC_LOADRS 16 -#define RSC_LOADRS_LEN 14 -// RSC bits 30-63 reserved -#define RSC_MBZ1 30 -#define RSC_MBZ1_V 0x3ffffffffULL - -// RSC modes -// Lazy -#define RSC_MODE_LY (0x0) -// Store intensive -#define RSC_MODE_SI (0x1) -// Load intensive -#define RSC_MODE_LI (0x2) -// Eager -#define RSC_MODE_EA (0x3) - -// RSC Endian bit values -#define RSC_BE_LITTLE 0 -#define RSC_BE_BIG 1 - -// RSC while in kernel: enabled, little endian, pl = 0, eager mode -#define RSC_KERNEL ((RSC_MODE_EA<