From 9f6b977f6619950438ac3b765904b7a3ff454baa Mon Sep 17 00:00:00 2001 From: andrewfish Date: Tue, 11 May 2010 00:06:47 +0000 Subject: Add PCD setting for Timer, default is 10 times a second. You need the timer to detect a media change event. Also coded up DMA, but have not debugged it yet and it is not turned on. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10478 6f19259b-4bc3-4df7-8a09-765794883524 --- Omap35xxPkg/Include/Library/OmapDmaLib.h | 6 +++++- Omap35xxPkg/Include/Omap3530/Omap3530Dma.h | 20 ++++++++++++++++++++ 2 files changed, 25 insertions(+), 1 deletion(-) (limited to 'Omap35xxPkg/Include') diff --git a/Omap35xxPkg/Include/Library/OmapDmaLib.h b/Omap35xxPkg/Include/Library/OmapDmaLib.h index 9c60d44ee5..d4daf6d364 100755 --- a/Omap35xxPkg/Include/Library/OmapDmaLib.h +++ b/Omap35xxPkg/Include/Library/OmapDmaLib.h @@ -88,6 +88,8 @@ EnableDmaChannel ( Turn of DMA channel configured by EnableDma(). @param Channel DMA Channel to configure + @param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS + @param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR @retval EFI_SUCCESS DMA hardware disabled @retval EFI_INVALID_PARAMETER Channel is not valid @@ -97,7 +99,9 @@ EnableDmaChannel ( EFI_STATUS EFIAPI DisableDmaChannel ( - IN UINTN Channel + IN UINTN Channel, + IN UINT32 SuccessMask, + IN UINT32 ErrorMask ); diff --git a/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h b/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h index 4e397d52e5..242c325331 100755 --- a/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h +++ b/Omap35xxPkg/Include/Omap3530/Omap3530Dma.h @@ -22,6 +22,7 @@ #define DMA4_CCR(_i) (0x48056080 + (0x60*(_i))) #define DMA4_CICR(_i) (0x48056088 + (0x60*(_i))) +#define DMA4_CSR(_i) (0x4805608c + (0x60*(_i))) #define DMA4_CSDP(_i) (0x48056090 + (0x60*(_i))) #define DMA4_CEN(_i) (0x48056094 + (0x60*(_i))) #define DMA4_CFN(_i) (0x48056098 + (0x60*(_i))) @@ -106,5 +107,24 @@ #define DMA4_CCR_SEL_SRC_DEST_SYNC_SOURCE BIT24 +#define DMA4_CSR_DROP BIT1 +#define DMA4_CSR_HALF BIT2 +#define DMA4_CSR_FRAME BIT3 +#define DMA4_CSR_LAST BIT4 +#define DMA4_CSR_BLOCK BIT5 +#define DMA4_CSR_SYNC BIT6 +#define DMA4_CSR_PKT BIT7 +#define DMA4_CSR_TRANS_ERR BIT8 +#define DMA4_CSR_SECURE_ERR BIT9 +#define DMA4_CSR_SUPERVISOR_ERR BIT10 +#define DMA4_CSR_MISALIGNED_ADRS_ERR BIT11 +#define DMA4_CSR_DRAIN_END BIT12 +#define DMA4_CSR_RESET 0x1FE +#define DMA4_CSR_ERR (DMA4_CSR_TRANS_ERR | DMA4_CSR_SECURE_ERR | DMA4_CSR_SUPERVISOR_ERR | DMA4_CSR_MISALIGNED_ADRS_ERR) + +// same mapping as CSR except for SYNC. Enable all since we are polling +#define DMA4_CICR_ENABLE_ALL 0x1FBE + + #endif -- cgit v1.2.3