From 7c9ff57b11a04132a8892574a6539ae62c11be62 Mon Sep 17 00:00:00 2001 From: jljusten Date: Mon, 13 Aug 2012 15:38:16 +0000 Subject: OvmfPkg: sync FADT with QEMU: correct SMI_CMD - Qemu's PIIX emulation actually supports SMM and ACPI_ENABLE / ACPI_DISABLE. - After enabling SMI_CMD (SMI_CMD_IO_PORT), further values to be written there must be synchronized with qemu: PSTATE_CNT, CST_CNT. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Laszlo Ersek Reviewed-by: Jordan Justen git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13611 6f19259b-4bc3-4df7-8a09-765794883524 --- OvmfPkg/AcpiTables/Facp.aslc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'OvmfPkg/AcpiTables/Facp.aslc') diff --git a/OvmfPkg/AcpiTables/Facp.aslc b/OvmfPkg/AcpiTables/Facp.aslc index b06c6b22ad..c55094b838 100644 --- a/OvmfPkg/AcpiTables/Facp.aslc +++ b/OvmfPkg/AcpiTables/Facp.aslc @@ -33,7 +33,7 @@ EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { ACPI_ENABLE, // value to write to port smi_cmd to enable ACPI ACPI_DISABLE, // value to write to port smi_cmd to disable ACPI S4BIOS_REQ, // Value to write to SMI CMD port to enter the S4BIOS state - 0xE2, // PState control + 0, // PState control PM1a_EVT_BLK, // Port address of Power Mgt 1a Event Reg Blk PM1b_EVT_BLK, // Port address of Power Mgt 1b Event Reg Blk PM1a_CNT_BLK, // Port address of Power Mgt 1a Ctrl Reg Blk @@ -49,7 +49,7 @@ EFI_ACPI_1_0_FIXED_ACPI_DESCRIPTION_TABLE FACP = { GPE0_BLK_LEN, // Byte Length of ports at gpe0_blk GPE1_BLK_LEN, // Byte Length of ports at gpe1_blk GPE1_BASE, // offset in gpe model where gpe1 events start - 0xE3, // _CST support + 0, // _CST support P_LVL2_LAT, // worst case HW latency to enter/exit C2 state P_LVL3_LAT, // worst case HW latency to enter/exit C3 state FLUSH_SIZE, // Size of area read to flush caches -- cgit v1.2.3