From 0eff97a03f40aa5378845edd46a487c86580c4f9 Mon Sep 17 00:00:00 2001 From: Yeon Sil Yoon Date: Wed, 27 Sep 2017 09:58:37 -0700 Subject: Enable SueCreek 1. Change SPI mode and speed for SueCreek 2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration 3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yeon Sil Yoon Signed-off-by: Guo Mang Reviewed-by: zwei4 --- .../Board/BensonGlacier/BoardInitPostMem/BoardInit.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c') diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c index 8b21b50a7e..536c390ec1 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/BoardInit.c @@ -88,6 +88,11 @@ BensonGlacierPostMemInitCallback ( // BufferSize = sizeof (EFI_GUID); PcdSetPtr(PcdBoardVbtFileGuid, &BufferSize, (UINT8 *)&gPeiBensonGlacierVbtGuid); + + // + // Set PcdSueCreek + // + PcdSetBool (PcdSueCreek, TRUE); // // Add init steps here -- cgit v1.2.3