From d9fa50cd35fe2e8d49004385c093512dd3373ea5 Mon Sep 17 00:00:00 2001 From: "Wei, David" Date: Thu, 13 Apr 2017 11:31:23 +0800 Subject: GPIO clean up. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex Reviewed-by: zwei4 --- .../Board/LeafHill/BoardInitPostMem/BoardGpios.h | 8 -------- 1 file changed, 8 deletions(-) (limited to 'Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem') diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h index e0c0554079..9777d75003 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardGpios.h @@ -328,14 +328,6 @@ BXT_GPIO_PAD_INIT mBXT_GpioInitData_Audio_SSP6 []= BXT_GPIO_PAD_CONF(L"GPIO_192 DBI_SCL", M0 , HI_Z ,GPIO_D, HI , NA , Wake_Disabled, P_2K_H, NA , NA,NA , NA , GPIO_PADBAR+0x0028, NORTHWEST),//Feature: Codec Power Down PD Net in Sch: SOC_CODEC_PD_N }; -BXT_GPIO_PAD_INIT mBXT_GpioInitData_N_RVP2[] = -{ - // - // Group Pin#: pad_name, PMode,GPIO_Config,HostSw,GPO_STATE,INT_Trigger, Wake_Enabled ,Term_H_L,Inverted, GPI_ROUT, IOSstae, IOSTerm, MMIO_Offset ,Community - // - BXT_GPIO_PAD_CONF(L"GPIO_33", M0 , GPI , NA , NA , Edge , Wake_Disabled, P_20K_L, NA ,IOAPIC,IOS_Masked, SAME, GPIO_PADBAR+0x0108, NORTH),//Feature: Interrput Net in Sch: PMIC_IRQ_R_N -}; - BXT_GPIO_PAD_INIT mBXT_GpioInitData_FAB2[] = { // -- cgit v1.2.3