From d4f2e18b8b39e3fb20001d1c47e19c4844162476 Mon Sep 17 00:00:00 2001 From: zwei4 Date: Mon, 6 Mar 2017 10:38:49 +0800 Subject: Adjust FVs size and base. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: zwei4 --- Platform/BroxtonPlatformPkg/BuildBios.bat | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Platform/BroxtonPlatformPkg/BuildBios.bat') diff --git a/Platform/BroxtonPlatformPkg/BuildBios.bat b/Platform/BroxtonPlatformPkg/BuildBios.bat index 99a58cafd6..a326d3c640 100644 --- a/Platform/BroxtonPlatformPkg/BuildBios.bat +++ b/Platform/BroxtonPlatformPkg/BuildBios.bat @@ -404,8 +404,9 @@ copy /y/b %BUILD_PATH%\FV\FvOBBY.fv %Storage_Folder% >nul if /i "%FSP_WRAPPER%" == "TRUE" ( if %Stepping%==B ( +:: 0xFEF63000 = gIntelFsp2WrapperTokenSpaceGuid.PcdFlashFvFspBase = $(CAR_BASE_ADDRESS) + $(BLD_RAM_DATA_SIZE) + $(FSP_RAM_DATA_SIZE) + $(FSP_EMP_DATA_SIZE) + $(BLD_IBBM_SIZE) pushd %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin - python %WORKSPACE%\Core\IntelFsp2Pkg\Tools\SplitFspBin.py rebase -f ApolloLakeFsp.fd -c m -b 0xFEF65000 -o .\ -n FSP.fd + python %WORKSPACE%\Core\IntelFsp2Pkg\Tools\SplitFspBin.py rebase -f ApolloLakeFsp.fd -c m -b 0xFEF63000 -o .\ -n FSP.fd python %WORKSPACE%\Core\IntelFsp2Pkg\Tools\SplitFspBin.py split -f FSP.fd -o .\ -n FSP.Fv popd copy /y/b %WORKSPACE%\Silicon\BroxtonSoC\BroxtonFspPkg\ApolloLakeFspBinPkg\FspBin\FSP_T.Fv %Storage_Folder%\FSP_T.Fv -- cgit v1.2.3