From 0eff97a03f40aa5378845edd46a487c86580c4f9 Mon Sep 17 00:00:00 2001 From: Yeon Sil Yoon Date: Wed, 27 Sep 2017 09:58:37 -0700 Subject: Enable SueCreek 1. Change SPI mode and speed for SueCreek 2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration 3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yeon Sil Yoon Signed-off-by: Guo Mang Reviewed-by: zwei4 --- Platform/BroxtonPlatformPkg/PlatformPkg.dec | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Platform/BroxtonPlatformPkg/PlatformPkg.dec') diff --git a/Platform/BroxtonPlatformPkg/PlatformPkg.dec b/Platform/BroxtonPlatformPkg/PlatformPkg.dec index 4813145d0d..f37ceafe3a 100644 --- a/Platform/BroxtonPlatformPkg/PlatformPkg.dec +++ b/Platform/BroxtonPlatformPkg/PlatformPkg.dec @@ -182,6 +182,8 @@ gPlatformModuleTokenSpaceGuid.PcdGetBoardNameFunc|0|UINT64|0x80000012 gPlatformModuleTokenSpaceGuid.PcdResetType|0x0E|UINT8|0x80000013 gPlatformModuleTokenSpaceGuid.PcdBoardVbtFileGuid|{ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }|VOID*|0x80000014 + ## This PCD used to enable or disable SueCreek + gPlatformModuleTokenSpaceGuid.PcdSueCreek|FALSE|BOOLEAN|0x80000015 ## MemoryCheck value for checking memory before boot OS. ## To save the boot performance, the default MemoryCheck is set to 0. -- cgit v1.2.3