From ce4fba76a8084dcf46f5d5d2478ceb4025e54697 Mon Sep 17 00:00:00 2001 From: Guo Mang Date: Fri, 23 Dec 2016 10:44:35 +0800 Subject: BroxtonSiPkg: Add Cpu/AcpiTables Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang --- .../Cpu/AcpiTables/CpuSsdt/Cpu0Ist.asl | 142 +++++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/AcpiTables/CpuSsdt/Cpu0Ist.asl (limited to 'Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/AcpiTables/CpuSsdt/Cpu0Ist.asl') diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/AcpiTables/CpuSsdt/Cpu0Ist.asl b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/AcpiTables/CpuSsdt/Cpu0Ist.asl new file mode 100644 index 0000000000..6d2e148484 --- /dev/null +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/Cpu/AcpiTables/CpuSsdt/Cpu0Ist.asl @@ -0,0 +1,142 @@ +/** @file + Intel Processor Power Management ACPI Code. + + Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.
+ + This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +DefinitionBlock ( + "CPU0IST.aml", + "SSDT", + 0x02, + "PmRef", + "Cpu0Ist", + 0x3000 + ) +{ + External (\_PR.CPU0, DeviceObj) + External (PDC0) + External(\_PR.CFGD, IntObj) + External (TCNT) + External (OSSL) + External (NLPC) + Scope(\_PR.CPU0) + { + // + // Report supported P-States. + // + Name(_PPC, 0) + + // + // NOTE: For CMP systems; this table is not loaded unless + // the required driver support is present. + // So, we do not check for those cases here. + // + // CFGD[0] = EIST Capable/Enabled + // PDCx[0] = OS Capable of Hardware P-State control + // + Method(_PCT,0) + { + // Update the _PPC value + // + Store (0x00, \_PR.CPU0._PPC) + + If (LAnd(And(\_PR.CFGD,0x0001), And(PDC0,0x0001))) { + Return(Package() // Native Mode + { + ResourceTemplate(){Register(FfixedHW, 0, 0, 0)}, + ResourceTemplate(){Register(FfixedHW, 0, 0, 0)} + }) + } + // For all other cases, report control through the + // SMI interface. (The port used for SMM control is fixed up + // by the initialization code.) + // + Return(Package() // SMM Mode + { + ResourceTemplate(){Register(FfixedHW, 0, 0, 0)}, + ResourceTemplate(){Register(FfixedHW, 0, 0, 0)} + }) + } + + Method(_PSS,0) + { + // OSSL means OS Selection, WOS is Zero, AOS is One + If (LEqual(OSSL, 1)) { + Return(SPSS) // PSS entry for AOS + } else { + Return(NPSS) // PSS entry for WOS + } + } + + Name(NPSS,Package() + { + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000} + }) + + Name(SPSS,Package() + { + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000}, + Package(){0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000, 0x80000000} + }) + + Method(_PSD,0) + { + Return(Package() { // HW_ALL + Package() { + 5, // # entries. + 0, // Revision. + 0, // Domain #. + 0xFE, // Coord Type- HW_ALL. + NLPC // # processors. + } + }) + } + } +} // End of Definition Block + -- cgit v1.2.3