From 0eff97a03f40aa5378845edd46a487c86580c4f9 Mon Sep 17 00:00:00 2001 From: Yeon Sil Yoon Date: Wed, 27 Sep 2017 09:58:37 -0700 Subject: Enable SueCreek 1. Change SPI mode and speed for SueCreek 2. Update SueCreek HOST_IRQ and HOST_RST GPIO configuration 3. Add a PCD to make sure that SueCreek only reported to OS when it is actually present on the board. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Yeon Sil Yoon Signed-off-by: Guo Mang Reviewed-by: zwei4 --- .../BroxtonSiPkg/NorthCluster/Include/Protocol/GlobalNvsArea.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster') diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/Protocol/GlobalNvsArea.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/Protocol/GlobalNvsArea.h index b32f334f01..e8319ce0ff 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/Protocol/GlobalNvsArea.h +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Include/Protocol/GlobalNvsArea.h @@ -1,7 +1,7 @@ /** @file Header file for Global NVS Area definition. - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -506,6 +506,7 @@ typedef struct { UINT8 CriticalThermalTripPointSen2S3; ///< (920) CriticalThermalTripPointSen2S3 UINT8 HotThermalTripPointSen2; ///< (921) HotThermalTripPointSen2 UINT8 CriticalThermalTripPointSen2; ///< (922) CriticalThermalTripPointSen2 + UINT8 SueCreekEnable; ///< (923) SueCreekEnable: 0: disabled; 1: enabled } EFI_GLOBAL_NVS_AREA; #pragma pack () -- cgit v1.2.3