From 96ad5326ae4e0d6bf55100fe6b5b1631f17e5b43 Mon Sep 17 00:00:00 2001
From: zwei4 <david.wei@intel.com>
Date: Thu, 11 May 2017 10:19:38 +0800
Subject: Fixed some GCC build errors.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: zwei4 <david.wei@intel.com>
---
 .../Library/DxeSmbiosMemoryLib/SmbiosMemory.h      |  6 ++--
 .../Library/DxeSmbiosMemoryLib/SmbiosType16.c      |  5 ++-
 .../NorthCluster/PciHostBridge/Dxe/PciHostBridge.c | 41 ++++++++++++++--------
 .../NorthCluster/SaInit/Dxe/IgdOpRegion.c          |  4 +--
 4 files changed, 36 insertions(+), 20 deletions(-)

(limited to 'Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster')

diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h
index b62cd67e6e..4effcd33b4 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosMemory.h
@@ -3,7 +3,7 @@
   This driver will determine memory configuration information from the chipset
   and memory and create SMBIOS memory structures appropriately.
 
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -159,9 +159,9 @@ typedef struct {
 //
 // Module-wide global variables
 //
-MEM_INFO_PROTOCOL               *mMemInfoHob;
+extern MEM_INFO_PROTOCOL               *mMemInfoHob;
 extern EFI_SMBIOS_PROTOCOL       *mSmbios;
-EFI_SMBIOS_HANDLE      mSmbiosType16Handle;
+extern EFI_SMBIOS_HANDLE      mSmbiosType16Handle;
 
 extern CHAR8 *DimmToDevLocator[];
 extern CHAR8 *DimmToBankLocator[];
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c
index 2124543b16..194df4494a 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/Library/DxeSmbiosMemoryLib/SmbiosType16.c
@@ -2,7 +2,7 @@
   This library will determine memory configuration information from the chipset
   and memory and create SMBIOS memory structures appropriately.
 
-  Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -16,6 +16,9 @@
 
 #include "SmbiosMemory.h"
 
+MEM_INFO_PROTOCOL      *mMemInfoHob;
+EFI_SMBIOS_HANDLE      mSmbiosType16Handle;
+
 //
 // Physical Memory Array (Type 16) data
 //
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/PciHostBridge/Dxe/PciHostBridge.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/PciHostBridge/Dxe/PciHostBridge.c
index 834cace036..3f7a51d275 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/PciHostBridge/Dxe/PciHostBridge.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/PciHostBridge/Dxe/PciHostBridge.c
@@ -2,7 +2,7 @@
   Pci Host Bridge driver:
   Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation.
 
-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -41,24 +41,37 @@
 //
 static UINTN                              RootBridgeNumber[1]       = { 1 };
 
-static UINT64                             RootBridgeAttribute[1][1] = { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM };
+static UINT64                             RootBridgeAttribute[1][1] = { {EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM }};
 
 static EFI_PCI_ROOT_BRIDGE_DEVICE_PATH    mEfiPciRootBridgeDevicePath[1][1] = {
-  {
-    ACPI_DEVICE_PATH,
-    ACPI_DP,
-    (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
-    (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8),
-    EISA_PNP_ID(0x0A03),
-    0,
-    END_DEVICE_PATH_TYPE,
-    END_ENTIRE_DEVICE_PATH_SUBTYPE,
-    END_DEVICE_PATH_LENGTH,
-    0
+{ 
+ {
+    {
+      {
+        ACPI_DEVICE_PATH,
+        ACPI_DP,
+        {
+          (UINT8) (sizeof (ACPI_HID_DEVICE_PATH)),
+          (UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8)
+        }
+       },
+       EISA_PNP_ID(0x0A03),
+       0
+    },
+    {
+      END_DEVICE_PATH_TYPE,
+      END_ENTIRE_DEVICE_PATH_SUBTYPE,
+      {
+        END_DEVICE_PATH_LENGTH,
+        0
+      }
+    }
   }
+
+ }
 };
 
-static PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = { { 0, 255, 0, 0xffffffff, 0, 1 << 16 } };
+static PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = { {{ 0, 255, 0, 0xffffffff, 0, (1 << 16) } }};
 
 static EFI_HANDLE                         mDriverImageHandle;
 
diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/SaInit/Dxe/IgdOpRegion.c b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/SaInit/Dxe/IgdOpRegion.c
index 961c6b2a0d..5d147879ab 100644
--- a/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/SaInit/Dxe/IgdOpRegion.c
+++ b/Silicon/BroxtonSoC/BroxtonSiPkg/NorthCluster/SaInit/Dxe/IgdOpRegion.c
@@ -3,7 +3,7 @@
   Software SCI interface between system BIOS, ASL code, and Graphics drivers.
   The code in this file will load the driver and initialize the interface.
 
-  Copyright (c) 1999 - 2016, Intel Corporation. All rights reserved.<BR>
+  Copyright (c) 1999 - 2017, Intel Corporation. All rights reserved.<BR>
 
   This program and the accompanying materials
   are licensed and made available under the terms and conditions of the BSD License
@@ -722,7 +722,7 @@ IgdOpRegionInit (
   //
   Status = EfiCreateEventReadyToBootEx(
              TPL_CALLBACK,
-             SetGOPVersionCallback,
+             (EFI_EVENT_NOTIFY)SetGOPVersionCallback,
              NULL,
              &mReadyToBootEvent
              );
-- 
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