From 270c7b132a6a417edff852229d05ca791ed46b7c Mon Sep 17 00:00:00 2001 From: Guo Mang Date: Mon, 8 May 2017 11:01:15 +0800 Subject: Upgrade core Upgrade core to UDK2017 Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Guo Mang Reviewed-by: zwei4 --- .../BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c | 14 ++++++++++++-- .../BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.h | 4 +--- 2 files changed, 13 insertions(+), 5 deletions(-) (limited to 'Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm') diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c index ed8a74b1ce..c3c1756494 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.c @@ -1,7 +1,7 @@ /** @file SC Init Smm module for SC specific SMI handlers. - Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2013 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -14,6 +14,7 @@ **/ #include "ScInitSmm.h" +#include GLOBAL_REMOVE_IF_UNREFERENCED EFI_SMM_SW_DISPATCH2_PROTOCOL *mSwDispatch; GLOBAL_REMOVE_IF_UNREFERENCED EFI_SMM_SX_DISPATCH2_PROTOCOL *mSxDispatch; @@ -144,6 +145,7 @@ ScInitSmmEntryPoint ( { EFI_STATUS Status; EFI_PEI_HOB_POINTERS HobPtr; + SC_PCIE_CONFIG *PcieRpConfig; DEBUG ((DEBUG_INFO, "ScInitSmmEntryPoint()\n")); @@ -171,13 +173,21 @@ ScInitSmmEntryPoint ( ASSERT (HobPtr.Guid != NULL); mScPolicy = (SC_POLICY_HOB *) GET_GUID_HOB_DATA (HobPtr.Guid); - Status = GetConfigBlock ((VOID *) mScPolicy, &gPcieRpConfigGuid, (VOID *) &mPcieRpConfig); + Status = GetConfigBlock ((VOID *) mScPolicy, &gPcieRpConfigGuid, (VOID *) &PcieRpConfig); ASSERT_EFI_ERROR (Status); + + mPcieRpConfig = AllocatePool(sizeof (SC_PCIE_CONFIG)); + if (mPcieRpConfig != NULL) { + CopyMem (mPcieRpConfig, PcieRpConfig, sizeof (SC_PCIE_CONFIG)); + } + InitializeSxHandler (ImageHandle); Status = InitializeScPcieSmm (ImageHandle, SystemTable); ASSERT_EFI_ERROR (Status); + FreePool (mPcieRpConfig); + return EFI_SUCCESS; } diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.h index 81748ba1f0..b2e7fb447c 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.h +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/ScInit/Smm/ScInitSmm.h @@ -1,7 +1,7 @@ /** @file Header file for SC Init SMM Handler - Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
This program and the accompanying materials are licensed and made available under the terms and conditions of the BSD License @@ -59,8 +59,6 @@ extern UINTN mResvMmioSize; #define DeviceD0 0x00 #define DeviceD3 0x03 -#define ARRAY_SIZE (data) (sizeof (data) / sizeof (data[0])) - typedef enum { PciCfg, PciMmr -- cgit v1.2.3