From 646b243c0e3ef49b98071ca2c3fec15299b4d72f Mon Sep 17 00:00:00 2001 From: Jiewen Yao Date: Mon, 19 Jun 2017 10:55:06 +0800 Subject: Add KabylakeSiliconPkg reviewed-by: Jiewen Yao reviewed-by: Michael A Kubacki reviewed-by: Amy Chan reviewed-by: Rangasai V Chaganty reviewed-by: Chasel Chiu Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao Signed-off-by: Chasel Chiu --- .../PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm (limited to 'Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm') diff --git a/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm new file mode 100644 index 0000000000..5bc17065bd --- /dev/null +++ b/Silicon/Intel/KabylakeSiliconPkg/SystemAgent/Library/PeiSaPolicyLib/Ia32/MrcOemPlatform.nasm @@ -0,0 +1,79 @@ +;; @file +; This file provides assembly 64-bit atomic reads/writes required for memory initialization. +; +; Copyright (c) 2017, Intel Corporation. All rights reserved.
+; This program and the accompanying materials are licensed and made available under +; the terms and conditions of the BSD License that accompanies this distribution. +; The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +;; + + +SECTION .TEXT + +;----------------------------------------------------------------------------- +; +; Section: SaMmioRead64 +; +; Description: Read 64 bits from the Memory Mapped I/O space. +; Use MMX instruction for atomic access, because some MC registers have side effect. +; +; @param[in] Address - Memory mapped I/O address. +; +;----------------------------------------------------------------------------- + +;UINT64 +;SaMmioRead64 ( +; IN UINTN Address +; ) + +global ASM_PFX(SaMmioRead64) +ASM_PFX(SaMmioRead64): + sub esp, 16 + movq [esp], mm0 ;Save mm0 on stack + mov edx, [esp + 20] ;edx = Address + movq mm0, [edx] ;mm0 = [Address] + movq [esp + 8], mm0 ;Store mm0 on Stack + movq mm0, [esp] ;Restore mm0 + emms + mov eax, [esp + 8] ;eax = [Address][31:0] + mov edx, [esp + 12] ;edx = [Address][64:32] + add esp, 16 + ret + +;----------------------------------------------------------------------------- +; +; Section: SaMmioWrite64 +; +; Description: Write 64 bits to the Memory Mapped I/O space. +; Use MMX instruction for atomic access, because some MC registers have side effect. +; +; @param[in] Address - Memory mapped I/O address. +; @param[in] Value - The value to write. +; +;----------------------------------------------------------------------------- + +;UINT64 +;SaMmioWrite64 ( +; IN UINTN Address, +; IN UINT64 Value +; ) + +global ASM_PFX(SaMmioWrite64) +ASM_PFX(SaMmioWrite64): + sub esp, 8 + movq [esp], mm0 ;Save mm0 on Stack + mov edx, [esp + 12] ;edx = Address + movq mm0, [esp + 16] ;mm0 = Value + movq [edx], mm0 ;[Address] = Value + movq mm0, [esp] ;Restore mm0 + emms + mov eax, [esp + 16] ;eax = Value[31:0] + mov edx, [esp + 20] ;edx = Value[64:32] + add esp, 8 + ret + -- cgit v1.2.3