From 5c164e151c4047efc32f2bd0d6cad730e635c23c Mon Sep 17 00:00:00 2001 From: Jiewen Yao Date: Sat, 17 Mar 2018 07:40:51 +0800 Subject: PurleySktPkg: Initial version. Cc: Isaac W Oram Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jiewen Yao Reviewed-by: Isaac W Oram --- .../Include/Guid/SocketPciResourceData.h | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Silicon/Intel/PurleySktPkg/Include/Guid/SocketPciResourceData.h (limited to 'Silicon/Intel/PurleySktPkg/Include/Guid/SocketPciResourceData.h') diff --git a/Silicon/Intel/PurleySktPkg/Include/Guid/SocketPciResourceData.h b/Silicon/Intel/PurleySktPkg/Include/Guid/SocketPciResourceData.h new file mode 100644 index 0000000000..7aa2ad7fc8 --- /dev/null +++ b/Silicon/Intel/PurleySktPkg/Include/Guid/SocketPciResourceData.h @@ -0,0 +1,48 @@ +/** @file + +Copyright (c) 2018, Intel Corporation. All rights reserved.
+This program and the accompanying materials are licensed and made available under +the terms and conditions of the BSD License that accompanies this distribution. +The full text of the license may be found at +http://opensource.org/licenses/bsd-license.php. + +THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#ifndef __SOCKET_PCI_RESOURCE_CONFIG_DATA_H__ +#define __SOCKET_PCI_RESOURCE_CONFIG_DATA_H__ + + +#include +#include "SocketConfiguration.h" + +extern EFI_GUID gEfiSocketPciResourceDataGuid; +#define SOCKET_PCI_RESOURCE_CONFIGURATION_DATA_NAME L"SocketPciResourceConfigData" + +#pragma pack(1) +typedef struct { + // + // Used by the PciHostBridge DXE driver, these variables don't need to be exposed through setup options + // The variables are used as a communication vehicle from the PciHostBridge DXE driver to an OEM hook + // which updates the KTI resource map + // + UINT16 PciSocketIoBase[MAX_SOCKET]; + UINT16 PciSocketIoLimit[MAX_SOCKET]; + UINT32 PciSocketMmiolBase[MAX_SOCKET]; + UINT32 PciSocketMmiolLimit[MAX_SOCKET]; + UINT64 PciSocketMmiohBase[MAX_SOCKET]; + UINT64 PciSocketMmiohLimit[MAX_SOCKET]; + UINT16 PciResourceIoBase[TOTAL_IIO_STACKS]; + UINT16 PciResourceIoLimit[TOTAL_IIO_STACKS]; + UINT32 PciResourceMem32Base[TOTAL_IIO_STACKS]; + UINT32 PciResourceMem32Limit[TOTAL_IIO_STACKS]; + UINT64 PciResourceMem64Base[TOTAL_IIO_STACKS]; + UINT64 PciResourceMem64Limit[TOTAL_IIO_STACKS]; +} SOCKET_PCI_RESOURCE_CONFIGURATION_DATA; +#pragma pack() + +#endif // __SOCKET_PCI_RESOURCE_CONFIG_DATA_H__ + + -- cgit v1.2.3