From a41b62caaee53755a5b050a73b5c1c8b42cc3f85 Mon Sep 17 00:00:00 2001
From: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Date: Wed, 1 Nov 2017 09:19:49 +0000
Subject: Silicon/SynQuacer: add DT description of the SDHCI controller

Describe the SynQuacer SoC's eMMC controller in DT so the OS can
attach to it.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
---
 .../Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi  | 27 ++++++++++++++++++++++
 1 file changed, 27 insertions(+)

(limited to 'Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi')

diff --git a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
index e72db377bc..5e663c59ef 100644
--- a/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
+++ b/Silicon/Socionext/SynQuacer/DeviceTree/SynQuacer.dtsi
@@ -532,4 +532,31 @@
         #interrupt-cells = <3>;
         socionext,spi-base = <112>;
     };
+
+    clk_alw_b_0: bclk200 {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <200000000>;
+        clock-output-names = "sd_bclk";
+    };
+
+    clk_alw_c_0: sd4clk800 {
+        compatible = "fixed-clock";
+        #clock-cells = <0>;
+        clock-frequency = <800000000>;
+        clock-output-names = "sd_sd4clk";
+    };
+
+    sdhci: sdhci@52300000 {
+        compatible = "socionext,synquacer-sdhci", "fujitsu,mb86s70-sdhci-3.0";
+        reg = <0 0x52300000 0x0 0x1000>;
+        interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
+        bus-width = <8>;
+        cap-mmc-highspeed;
+        fujitsu,cmd-dat-delay-select;
+        clocks = <&clk_alw_c_0 &clk_alw_b_0>;
+        clock-names = "core", "iface";
+        status = "disabled";
+    };
 };
-- 
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