From 9dd8190e49956e02dbeeda7c5d8e08e854283f9e Mon Sep 17 00:00:00 2001 From: Ard Biesheuvel Date: Tue, 30 Jan 2018 11:24:17 +0000 Subject: Silicon/SynQuacer: tweak PCI I/O windows for ACPI/Linux support The ACPI/Linux code does not cope very well with I/O BAR windows that involve type translation and address translation. In particular, the secondary I/O window we implement on SynQuacer: I/O 0x10000 ... 0x1ffff -> 0x77f00000 is misinterpreted by Linux, and results in the MMIO range starting at 0x77f10000 to be mapped for I/O port access to this range. This can be mitigated by using the same bus range for I/O port access on both RCs., i.e., [0x0 ... 0xffff]. This configuration can be represented using both DT and ACPI, and will work as expected in Linux. Now that the generic PCI host bridge driver has gained support for address translation, we can actually support this configuration seamlessly in UEFI as well, by applying an offset to the second I/O window to make it appear adjacent to the first one in the CPU view of the I/O space. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- .../SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) (limited to 'Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c') diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c index 6ef44b11bb..736b20cd51 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c @@ -25,7 +25,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. #include #include -#define MAX_IO_PORT_ADDRESS SYNQUACER_PCI_SEG1_PORTIO_MAX +#define MAX_IO_PORT_ADDRESS (SYNQUACER_PCI_SEG1_PORTIO_MAX + \ + SYNQUACER_PCI_SEG1_PORTIO_OFFSET) // // Handle for the CPU I/O 2 Protocol @@ -414,12 +415,18 @@ CpuIoServiceRead ( return Status; } - if ((Address >= SYNQUACER_PCI_SEG0_PORTIO_MIN) && - (Address <= SYNQUACER_PCI_SEG0_PORTIO_MAX)) { - Address += SYNQUACER_PCI_SEG0_PORTIO_MEMBASE; - } else if ((Address >= SYNQUACER_PCI_SEG1_PORTIO_MIN) && - (Address <= SYNQUACER_PCI_SEG1_PORTIO_MAX)) { - Address += SYNQUACER_PCI_SEG1_PORTIO_MEMBASE; + if ((Address >= (SYNQUACER_PCI_SEG0_PORTIO_MIN + + SYNQUACER_PCI_SEG0_PORTIO_OFFSET)) && + (Address <= (SYNQUACER_PCI_SEG0_PORTIO_MAX + + SYNQUACER_PCI_SEG0_PORTIO_OFFSET))) { + Address += SYNQUACER_PCI_SEG0_PORTIO_MEMBASE - + SYNQUACER_PCI_SEG0_PORTIO_OFFSET; + } else if ((Address >= (SYNQUACER_PCI_SEG1_PORTIO_MIN + + SYNQUACER_PCI_SEG1_PORTIO_OFFSET)) && + (Address <= (SYNQUACER_PCI_SEG1_PORTIO_MAX + + SYNQUACER_PCI_SEG1_PORTIO_OFFSET))) { + Address += SYNQUACER_PCI_SEG1_PORTIO_MEMBASE - + SYNQUACER_PCI_SEG1_PORTIO_OFFSET; } else { ASSERT (FALSE); -- cgit v1.2.3