From 23394428fdfe351ae9382576cdeee2834a2c637d Mon Sep 17 00:00:00 2001 From: rsun3 Date: Thu, 28 Oct 2010 02:01:43 +0000 Subject: Fix build break when doing 32-bit build with some certain C compiler option combinations. Use the library functions for shift operations in BaseLib for a 64-bit integer where the code is shared for 32-bit and 64-bit. Defining bitfields in structures with > 32 bits will cause these types of issues on IA32 builds. So the largest bitfield should be type UINT32 with a max size of :32. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10983 6f19259b-4bc3-4df7-8a09-765794883524 --- UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'UefiCpuPkg/Library') diff --git a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c index 1cba34cd59..9f08f5d188 100644 --- a/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c +++ b/UefiCpuPkg/Library/BaseXApicX2ApicLib/BaseXApicX2ApicLib.c @@ -151,7 +151,7 @@ SendIpi ( // For x2APIC, A single MSR write to the Interrupt Command Register is required for dispatching an // interrupt in x2APIC mode. // - MsrValue = (((UINT64)ApicId) << 32) | IcrLow; + MsrValue = LShiftU64 ((UINT64) ApicId, 32) | IcrLow; AsmWriteMsr64 (X2APIC_MSR_ICR_ADDRESS, MsrValue); } } -- cgit v1.2.3