From 30d995ee083653a408df8ee1a3e37198f5b1454e Mon Sep 17 00:00:00 2001 From: Jeff Fan Date: Tue, 7 Mar 2017 20:01:51 +0800 Subject: UefiCpuPkg/PiSmmCpuDxeSmm: Skip if AllocatedSize is 0 Needn't to copy register table if AllocatedSize is 0. v4: Fix potential uninitialized variable issue. v5: Set DestinationRegisterTableList[Index].RegisterTableEntry before RegisterTableEntry is updated. Cc: Feng Tian Cc: Michael Kinney Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jeff Fan Reviewed-by: Feng Tian --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 30 +++++++++++++++++------------- 1 file changed, 17 insertions(+), 13 deletions(-) (limited to 'UefiCpuPkg') diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 12efc1f90e..c3280b8879 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -826,21 +826,25 @@ CopyRegisterTable ( CopyMem (DestinationRegisterTableList, SourceRegisterTableList, NumberOfCpus * sizeof (CPU_REGISTER_TABLE)); for (Index = 0; Index < NumberOfCpus; Index++) { - RegisterTableEntry = AllocatePool (DestinationRegisterTableList[Index].AllocatedSize); - ASSERT (RegisterTableEntry != NULL); - CopyMem (RegisterTableEntry, (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry, DestinationRegisterTableList[Index].AllocatedSize); - // - // Go though all MSRs in register table to initialize MSR spin lock - // - for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) { - if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) { - // - // Initialize MSR spin lock only for those MSRs need bit field writing - // - InitMsrSpinLockByIndex (RegisterTableEntry->Index); + if (DestinationRegisterTableList[Index].AllocatedSize != 0) { + RegisterTableEntry = AllocateCopyPool ( + DestinationRegisterTableList[Index].AllocatedSize, + (VOID *)(UINTN)SourceRegisterTableList[Index].RegisterTableEntry + ); + ASSERT (RegisterTableEntry != NULL); + DestinationRegisterTableList[Index].RegisterTableEntry = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry; + // + // Go though all MSRs in register table to initialize MSR spin lock + // + for (Index1 = 0; Index1 < DestinationRegisterTableList[Index].TableLength; Index1++, RegisterTableEntry++) { + if ((RegisterTableEntry->RegisterType == Msr) && (RegisterTableEntry->ValidBitLength < 64)) { + // + // Initialize MSR spin lock only for those MSRs need bit field writing + // + InitMsrSpinLockByIndex (RegisterTableEntry->Index); + } } } - DestinationRegisterTableList[Index].RegisterTableEntry = (EFI_PHYSICAL_ADDRESS)(UINTN)RegisterTableEntry; } } -- cgit v1.2.3