From 5fc3b5d6c8f3f23823069f060e8ffc8f80bccdf7 Mon Sep 17 00:00:00 2001 From: andrewfish Date: Thu, 22 Jul 2010 19:22:34 +0000 Subject: Added to support X64 port (with SV5 ABI). May be able to remove after we port everything, but Sec, to EFI X64 ABI. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10683 6f19259b-4bc3-4df7-8a09-765794883524 --- UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.S | 25 + UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.asm | 37 + UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.c | 39 + UnixPkg/Library/UnixBaseLib/X64/CpuId.S | 60 + UnixPkg/Library/UnixBaseLib/X64/CpuId.asm | 62 + UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.S | 62 + UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.asm | 64 + UnixPkg/Library/UnixBaseLib/X64/CpuPause.asm | 37 + UnixPkg/Library/UnixBaseLib/X64/DisableCache.S | 39 + UnixPkg/Library/UnixBaseLib/X64/DisableCache.asm | 43 + .../Library/UnixBaseLib/X64/DisableInterrupts.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.S | 82 + .../Library/UnixBaseLib/X64/DisablePaging64.asm | 84 + UnixPkg/Library/UnixBaseLib/X64/EnableCache.S | 39 + UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm | 43 + .../UnixBaseLib/X64/EnableDisableInterrupts.S | 36 + .../UnixBaseLib/X64/EnableDisableInterrupts.asm | 39 + .../Library/UnixBaseLib/X64/EnableInterrupts.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/FlushCacheLine.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/FxRestore.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/FxSave.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/GccInline.c | 1801 ++++++++++++++++++++ UnixPkg/Library/UnixBaseLib/X64/Invd.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/LongJump.S | 88 + UnixPkg/Library/UnixBaseLib/X64/LongJump.asm | 58 + UnixPkg/Library/UnixBaseLib/X64/Monitor.asm | 43 + UnixPkg/Library/UnixBaseLib/X64/Mwait.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/Non-existing.c | 153 ++ UnixPkg/Library/UnixBaseLib/X64/ReadCr0.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadCr2.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadCr3.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadCr4.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadCs.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDr0.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDr1.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDr2.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDr3.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDr4.asm | 42 + UnixPkg/Library/UnixBaseLib/X64/ReadDr5.asm | 42 + UnixPkg/Library/UnixBaseLib/X64/ReadDr6.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDr7.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadDs.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadEflags.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/ReadEs.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadFs.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadGdtr.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadGs.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadIdtr.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadLdtr.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadMm0.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm1.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm2.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm3.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm4.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm5.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm6.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMm7.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.asm | 40 + UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.c | 39 + UnixPkg/Library/UnixBaseLib/X64/ReadPmc.asm | 40 + UnixPkg/Library/UnixBaseLib/X64/ReadSs.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadTr.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/ReadTsc.asm | 40 + UnixPkg/Library/UnixBaseLib/X64/SetJump.S | 82 + UnixPkg/Library/UnixBaseLib/X64/SetJump.asm | 66 + UnixPkg/Library/UnixBaseLib/X64/SwitchStack.S | 79 + UnixPkg/Library/UnixBaseLib/X64/SwitchStack.asm | 51 + UnixPkg/Library/UnixBaseLib/X64/Thunk16.S | 325 ++++ UnixPkg/Library/UnixBaseLib/X64/Thunk16.asm | 314 ++++ UnixPkg/Library/UnixBaseLib/X64/Wbinvd.S | 35 + UnixPkg/Library/UnixBaseLib/X64/Wbinvd.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/WriteCr0.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteCr2.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteCr3.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteCr4.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteDr0.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteDr1.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteDr2.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteDr3.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteDr4.asm | 43 + UnixPkg/Library/UnixBaseLib/X64/WriteDr5.asm | 43 + UnixPkg/Library/UnixBaseLib/X64/WriteDr6.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteDr7.asm | 39 + UnixPkg/Library/UnixBaseLib/X64/WriteGdtr.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/WriteIdtr.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteLdtr.asm | 38 + UnixPkg/Library/UnixBaseLib/X64/WriteMm0.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm1.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm2.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm3.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm4.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm5.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm6.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMm7.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.asm | 41 + UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.c | 42 + 96 files changed, 6568 insertions(+) create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.c create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuId.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuId.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/CpuPause.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/DisableCache.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/DisableCache.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/DisableInterrupts.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/EnableCache.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/EnableInterrupts.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/FlushCacheLine.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/FxRestore.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/FxSave.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/GccInline.c create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Invd.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/LongJump.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/LongJump.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Monitor.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Mwait.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Non-existing.c create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadCr0.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadCr2.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadCr3.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadCr4.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadCs.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr0.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr1.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr2.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr3.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr4.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr5.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr6.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDr7.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadDs.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadEflags.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadEs.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadFs.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadGdtr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadGs.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadIdtr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadLdtr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm0.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm1.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm2.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm3.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm4.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm5.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm6.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMm7.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.c create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadPmc.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadSs.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadTr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/ReadTsc.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/SetJump.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/SetJump.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/SwitchStack.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/SwitchStack.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Thunk16.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Thunk16.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Wbinvd.S create mode 100644 UnixPkg/Library/UnixBaseLib/X64/Wbinvd.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteCr0.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteCr2.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteCr3.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteCr4.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr0.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr1.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr2.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr3.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr4.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr5.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr6.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteDr7.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteGdtr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteIdtr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteLdtr.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm0.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm1.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm2.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm3.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm4.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm5.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm6.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMm7.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.asm create mode 100644 UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.c (limited to 'UnixPkg/Library/UnixBaseLib/X64') diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.S b/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.S new file mode 100644 index 0000000000..51cf9c0784 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.S @@ -0,0 +1,25 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuBreakpoint.S +# +# Abstract: +# +# Implementation of CpuBreakpoint() on x86_64 +# +#------------------------------------------------------------------------------ + +ASM_GLOBAL ASM_PFX(CpuBreakpoint) +ASM_PFX(CpuBreakpoint): + int $0x3 + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.asm b/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.asm new file mode 100644 index 0000000000..25dd9b48e8 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuBreakpoint.Asm +; +; Abstract: +; +; CpuBreakpoint function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; CpuBreakpoint ( +; VOID +; ); +;------------------------------------------------------------------------------ +CpuBreakpoint PROC + int 3 + ret +CpuBreakpoint ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.c b/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.c new file mode 100644 index 0000000000..d654f84571 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuBreakpoint.c @@ -0,0 +1,39 @@ +/** @file + CpuBreakpoint function. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +/** + Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics. +**/ + +void __debugbreak (); + +#pragma intrinsic(__debugbreak) + +/** + Generates a breakpoint on the CPU. + + Generates a breakpoint on the CPU. The breakpoint must be implemented such + that code can resume normal execution after the breakpoint. + +**/ +VOID +EFIAPI +CpuBreakpoint ( + VOID + ) +{ + __debugbreak (); +} + diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuId.S b/UnixPkg/Library/UnixBaseLib/X64/CpuId.S new file mode 100644 index 0000000000..c3d2597205 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuId.S @@ -0,0 +1,60 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuId.S +# +# Abstract: +# +# AsmCpuid function +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmCpuid ( +# IN UINT32 RegisterInEax, +# OUT UINT32 *RegisterOutEax OPTIONAL, +# OUT UINT32 *RegisterOutEbx OPTIONAL, +# OUT UINT32 *RegisterOutEcx OPTIONAL, +# OUT UINT32 *RegisterOutEdx OPTIONAL +# ) +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(AsmCpuid) +ASM_PFX(AsmCpuid): + push %rbx + mov %ecx, %eax + push %rax # save Index on stack + push %rdx + cpuid + test %r9, %r9 + jz L1 + mov %ecx, (%r9) +L1: + pop %rcx + jrcxz L2 + mov %eax, (%rcx) +L2: + mov %r8, %rcx + jrcxz L3 + mov %ebx, (%rcx) +L3: + mov 0x38(%rsp), %rcx + jrcxz L4 + mov %edx, (%rcx) +L4: + pop %rax # restore Index to rax as return value + pop %rbx + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuId.asm b/UnixPkg/Library/UnixBaseLib/X64/CpuId.asm new file mode 100644 index 0000000000..c6182c1611 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuId.asm @@ -0,0 +1,62 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuId.Asm +; +; Abstract: +; +; AsmCpuid function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmCpuid ( +; IN UINT32 RegisterInEax, +; OUT UINT32 *RegisterOutEax OPTIONAL, +; OUT UINT32 *RegisterOutEbx OPTIONAL, +; OUT UINT32 *RegisterOutEcx OPTIONAL, +; OUT UINT32 *RegisterOutEdx OPTIONAL +; ) +;------------------------------------------------------------------------------ +AsmCpuid PROC USES rbx + mov eax, ecx + push rax ; save Index on stack + push rdx + cpuid + test r9, r9 + jz @F + mov [r9], ecx +@@: + pop rcx + jrcxz @F + mov [rcx], eax +@@: + mov rcx, r8 + jrcxz @F + mov [rcx], ebx +@@: + mov rcx, [rsp + 38h] + jrcxz @F + mov [rcx], edx +@@: + pop rax ; restore Index to rax as return value + ret +AsmCpuid ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.S b/UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.S new file mode 100644 index 0000000000..d47f53c84c --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.S @@ -0,0 +1,62 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# CpuIdEx.S +# +# Abstract: +# +# AsmCpuidEx function +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# UINT32 +# EFIAPI +# AsmCpuidEx ( +# IN UINT32 RegisterInEax, +# IN UINT32 RegisterInEcx, +# OUT UINT32 *RegisterOutEax OPTIONAL, +# OUT UINT32 *RegisterOutEbx OPTIONAL, +# OUT UINT32 *RegisterOutEcx OPTIONAL, +# OUT UINT32 *RegisterOutEdx OPTIONAL +# ) +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(AsmCpuidEx) +ASM_PFX(AsmCpuidEx): + push %rbx + movl %ecx,%eax + movl %edx,%ecx + push %rax # save Index on stack + cpuid + mov 0x38(%rsp), %r10 + test %r10, %r10 + jz L1 + mov %ecx,(%r10) +L1: + mov %r8, %rcx + jrcxz L2 + movl %eax,(%rcx) +L2: + mov %r9, %rcx + jrcxz L3 + mov %ebx, (%rcx) +L3: + mov 0x40(%rsp), %rcx + jrcxz L4 + mov %edx, (%rcx) +L4: + pop %rax # restore Index to rax as return value + pop %rbx + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.asm b/UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.asm new file mode 100644 index 0000000000..b41ba8e2fe --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuIdEx.asm @@ -0,0 +1,64 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuIdEx.Asm +; +; Abstract: +; +; AsmCpuidEx function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT32 +; EFIAPI +; AsmCpuidEx ( +; IN UINT32 RegisterInEax, +; IN UINT32 RegisterInEcx, +; OUT UINT32 *RegisterOutEax OPTIONAL, +; OUT UINT32 *RegisterOutEbx OPTIONAL, +; OUT UINT32 *RegisterOutEcx OPTIONAL, +; OUT UINT32 *RegisterOutEdx OPTIONAL +; ) +;------------------------------------------------------------------------------ +AsmCpuidEx PROC USES rbx + mov eax, ecx + mov ecx, edx + push rax ; save Index on stack + cpuid + mov r10, [rsp + 38h] + test r10, r10 + jz @F + mov [r10], ecx +@@: + mov rcx, r8 + jrcxz @F + mov [rcx], eax +@@: + mov rcx, r9 + jrcxz @F + mov [rcx], ebx +@@: + mov rcx, [rsp + 40h] + jrcxz @F + mov [rcx], edx +@@: + pop rax ; restore Index to rax as return value + ret +AsmCpuidEx ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/CpuPause.asm b/UnixPkg/Library/UnixBaseLib/X64/CpuPause.asm new file mode 100644 index 0000000000..a84465fe0a --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/CpuPause.asm @@ -0,0 +1,37 @@ +;------------------------------------------------------------------------------ ; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; CpuPause.Asm +; +; Abstract: +; +; CpuPause function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; CpuPause ( +; VOID +; ); +;------------------------------------------------------------------------------ +CpuPause PROC + pause + ret +CpuPause ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/DisableCache.S b/UnixPkg/Library/UnixBaseLib/X64/DisableCache.S new file mode 100644 index 0000000000..970f2f3618 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/DisableCache.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# DisableCache.S +# +# Abstract: +# +# Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a +# WBINVD instruction. +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmDisableCache ( +# VOID +# ); +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(AsmDisableCache) +ASM_PFX(AsmDisableCache): + movq %cr0, %rax + btsq $30, %rax + btrq $29, %rax + movq %rax, %cr0 + wbinvd + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/DisableCache.asm b/UnixPkg/Library/UnixBaseLib/X64/DisableCache.asm new file mode 100644 index 0000000000..9fd5bd79bd --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/DisableCache.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; DisableCache.Asm +; +; Abstract: +; +; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a +; WBINVD instruction. +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmDisableCache ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmDisableCache PROC + mov rax, cr0 + bts rax, 30 + btr rax, 29 + mov cr0, rax + wbinvd + ret +AsmDisableCache ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/DisableInterrupts.asm b/UnixPkg/Library/UnixBaseLib/X64/DisableInterrupts.asm new file mode 100644 index 0000000000..4e54e0d889 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/DisableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; DisableInterrupts.Asm +; +; Abstract: +; +; DisableInterrupts function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; DisableInterrupts ( +; VOID +; ); +;------------------------------------------------------------------------------ +DisableInterrupts PROC + cli + ret +DisableInterrupts ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.S b/UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.S new file mode 100644 index 0000000000..676e9e175a --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.S @@ -0,0 +1,82 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# DisablePaging64.S +# +# Abstract: +# +# AsmDisablePaging64 function +# +# Notes: +# +#------------------------------------------------------------------------------ + + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalX86DisablePaging64 ( +# IN UINT16 Cs, +# IN UINT32 EntryPoint, +# IN UINT32 Context1, OPTIONAL +# IN UINT32 Context2, OPTIONAL +# IN UINT32 NewStack +# ); +#------------------------------------------------------------------------------ + +ASM_GLOBAL ASM_PFX(InternalX86DisablePaging64) +ASM_PFX(InternalX86DisablePaging64): + cli + lea L1(%rip), %rsi # rsi <- The start address of transition code + mov 0x28(%rsp), %edi # rdi <- New stack + lea _mTransitionEnd(%rip), %rax # rax <- end of transition code + sub %rsi, %rax # rax <- The size of transition piece code + add $4, %rax # round rax up to the next 4 byte boundary + and $0xfc, %al + sub %rax, %rdi # rdi <- use stack to hold transition code + mov %edi, %r10d # r10 <- The start address of transicition code below 4G + push %rcx # save rcx to stack + mov %rax, %rcx # rcx <- The size of transition piece code + rep + movsb # copy transition code to (new stack - 64byte) below 4G + pop %rcx # restore rcx + + mov %r8d, %esi + mov %r9d, %edi + mov %r10d, %eax + sub $4, %eax + push %rcx # push Cs to stack + push %r10 # push address of transition code on stack + .byte 0x48, 0xcb # retq: Use far return to load CS register from stack + # (Use raw byte code since some GNU assemblers generates incorrect code for "retq") +L1: + mov %eax,%esp # set up new stack + mov %cr0,%rax + btr $0x1f,%eax # clear CR0.PG + mov %rax,%cr0 # disable paging + + mov %edx,%ebx # save EntryPoint to ebx, for rdmsr will overwrite edx + mov $0xc0000080,%ecx + rdmsr + and $0xfe,%ah # clear LME + wrmsr + mov %cr4,%rax + and $0xdf,%al # clear PAE + mov %rax,%cr4 + push %rdi # push Context2 + push %rsi # push Context1 + callq *%rbx # transfer control to EntryPoint + jmp . # no one should get here + +_mTransitionEnd : diff --git a/UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.asm b/UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.asm new file mode 100644 index 0000000000..32dcd5aa1f --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/DisablePaging64.asm @@ -0,0 +1,84 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; DisablePaging64.Asm +; +; Abstract: +; +; AsmDisablePaging64 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86DisablePaging64 ( +; IN UINT16 Cs, +; IN UINT32 EntryPoint, +; IN UINT32 Context1, OPTIONAL +; IN UINT32 Context2, OPTIONAL +; IN UINT32 NewStack +; ); +;------------------------------------------------------------------------------ +InternalX86DisablePaging64 PROC + cli + lea rsi, @F ; rsi <- The start address of transition code + mov edi, [rsp + 28h] ; rdi <- New stack + lea rax, mTransitionEnd ; rax <- end of transition code + sub rax, rsi ; rax <- The size of transition piece code + add rax, 4 ; Round RAX up to the next 4 byte boundary + and al, 0fch + sub rdi, rax ; rdi <- Use stack to hold transition code + mov r10d, edi ; r10 <- The start address of transicition code below 4G + push rcx ; save rcx to stack + mov rcx, rax ; rcx <- The size of transition piece code + rep movsb ; copy transition code to top of new stack which must be below 4GB + pop rcx ; restore rcx + + mov esi, r8d + mov edi, r9d + mov eax, r10d ; eax <- start of the transition code on the stack + sub eax, 4 ; eax <- One slot below transition code on the stack + push rcx ; push Cs to stack + push r10 ; push address of tansition code on stack + DB 48h ; prefix to composite "retq" with next "retf" + retf ; Use far return to load CS register from stack + +; Start of transition code +@@: + mov esp, eax ; set up new stack + mov rax, cr0 + btr eax, 31 ; Clear CR0.PG + mov cr0, rax ; disable paging and caches + + mov ebx, edx ; save EntryPoint to rbx, for rdmsr will overwrite rdx + mov ecx, 0c0000080h + rdmsr + and ah, NOT 1 ; clear LME + wrmsr + mov rax, cr4 + and al, NOT (1 SHL 5) ; clear PAE + mov cr4, rax + push rdi ; push Context2 + push rsi ; push Context1 + call rbx ; transfer control to EntryPoint + hlt ; no one should get here +InternalX86DisablePaging64 ENDP + +mTransitionEnd LABEL BYTE + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableCache.S b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.S new file mode 100644 index 0000000000..9d739603c9 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.S @@ -0,0 +1,39 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# EnableCache.S +# +# Abstract: +# +# Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear +# the NW bit of CR0 to 0 +# +# Notes: +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmEnableCache ( +# VOID +# ); +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(AsmEnableCache) +ASM_PFX(AsmEnableCache): + wbinvd + movq %cr0, %rax + btrq $30, %rax + btrq $29, %rax + movq %rax, %cr0 + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm new file mode 100644 index 0000000000..88b71d706f --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/EnableCache.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; EnableCache.Asm +; +; Abstract: +; +; Flush all caches with a WBINVD instruction, clear the CD bit of CR0 to 0, and clear +; the NW bit of CR0 to 0 +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmEnableCache ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmEnableCache PROC + wbinvd + mov rax, cr0 + btr rax, 29 + btr rax, 30 + mov cr0, rax + ret +AsmEnableCache ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.S b/UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.S new file mode 100644 index 0000000000..f2ff61ecfd --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.S @@ -0,0 +1,36 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# EnableDisableInterrupts.S +# +# Abstract: +# +# EnableDisableInterrupts function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# EnableDisableInterrupts ( +# VOID +# ); +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(EnableDisableInterrupts) +ASM_PFX(EnableDisableInterrupts): + sti + cli + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.asm b/UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.asm new file mode 100644 index 0000000000..f6b2d9c97a --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/EnableDisableInterrupts.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; EnableDisableInterrupts.Asm +; +; Abstract: +; +; EnableDisableInterrupts function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; EnableDisableInterrupts ( +; VOID +; ); +;------------------------------------------------------------------------------ +EnableDisableInterrupts PROC + sti + cli + ret +EnableDisableInterrupts ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/EnableInterrupts.asm b/UnixPkg/Library/UnixBaseLib/X64/EnableInterrupts.asm new file mode 100644 index 0000000000..e776c27c4b --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/EnableInterrupts.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; EnableInterrupts.Asm +; +; Abstract: +; +; EnableInterrupts function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; EnableInterrupts ( +; VOID +; ); +;------------------------------------------------------------------------------ +EnableInterrupts PROC + sti + ret +EnableInterrupts ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/FlushCacheLine.asm b/UnixPkg/Library/UnixBaseLib/X64/FlushCacheLine.asm new file mode 100644 index 0000000000..e30f9a90b9 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/FlushCacheLine.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; FlushCacheLine.Asm +; +; Abstract: +; +; AsmFlushCacheLine function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID * +; EFIAPI +; AsmFlushCacheLine ( +; IN VOID *LinearAddress +; ); +;------------------------------------------------------------------------------ +AsmFlushCacheLine PROC + clflush [rcx] + mov rax, rcx + ret +AsmFlushCacheLine ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/FxRestore.asm b/UnixPkg/Library/UnixBaseLib/X64/FxRestore.asm new file mode 100644 index 0000000000..8496331ac5 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/FxRestore.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; FxRestore.Asm +; +; Abstract: +; +; AsmFxRestore function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86FxRestore ( +; IN CONST IA32_FX_BUFFER *Buffer +; ); +;------------------------------------------------------------------------------ +InternalX86FxRestore PROC + fxrstor [rcx] + ret +InternalX86FxRestore ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/FxSave.asm b/UnixPkg/Library/UnixBaseLib/X64/FxSave.asm new file mode 100644 index 0000000000..d41e9351b3 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/FxSave.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; FxSave.Asm +; +; Abstract: +; +; AsmFxSave function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86FxSave ( +; OUT IA32_FX_BUFFER *Buffer +; ); +;------------------------------------------------------------------------------ +InternalX86FxSave PROC + fxsave [rcx] + ret +InternalX86FxSave ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/GccInline.c b/UnixPkg/Library/UnixBaseLib/X64/GccInline.c new file mode 100644 index 0000000000..731172aacc --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/GccInline.c @@ -0,0 +1,1801 @@ +/** @file + GCC inline implementation of BaseLib processor specific functions. + + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+ Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + + +#include "BaseLibInternals.h" + + + + +/** + Used to serialize load and store operations. + + All loads and stores that proceed calls to this function are guaranteed to be + globally visible when this function returns. + +**/ +VOID +EFIAPI +MemoryFence ( + VOID + ) +{ + // This is a little bit of overkill and it is more about the compiler that it is + // actually processor synchronization. This is like the _ReadWriteBarrier + // Microsoft specific intrinsic + __asm__ __volatile__ ("":::"memory"); +} + + +/** + Enables CPU interrupts. + + Enables CPU interrupts. + +**/ +VOID +EFIAPI +EnableInterrupts ( + VOID + ) +{ + __asm__ __volatile__ ("sti"::: "memory"); +} + + +/** + Disables CPU interrupts. + + Disables CPU interrupts. + +**/ +VOID +EFIAPI +DisableInterrupts ( + VOID + ) +{ + __asm__ __volatile__ ("cli"::: "memory"); +} + + + + +/** + Requests CPU to pause for a short period of time. + + Requests CPU to pause for a short period of time. Typically used in MP + systems to prevent memory starvation while waiting for a spin lock. + +**/ +VOID +EFIAPI +CpuPause ( + VOID + ) +{ + __asm__ __volatile__ ("pause"); +} + + +/** + Generates a breakpoint on the CPU. + + Generates a breakpoint on the CPU. The breakpoint must be implemented such + that code can resume normal execution after the breakpoint. + +**/ +VOID +EFIAPI +CpuBreakpoint ( + VOID + ) +{ + __asm__ __volatile__ ("int $3"); +} + + + +/** + Returns a 64-bit Machine Specific Register(MSR). + + Reads and returns the 64-bit MSR specified by Index. No parameter checking is + performed on Index, and some Index values may cause CPU exceptions. The + caller must either guarantee that Index is valid, or the caller must set up + exception handlers to catch the exceptions. This function is only available + on IA-32 and X64. + + @param Index The 32-bit MSR index to read. + + @return The value of the MSR identified by Index. + +**/ +UINT64 +EFIAPI +AsmReadMsr64 ( + IN UINT32 Index + ) +{ + UINT32 LowData; + UINT32 HighData; + + __asm__ __volatile__ ( + "rdmsr" + : "=a" (LowData), // %0 + "=d" (HighData) // %1 + : "c" (Index) // %2 + ); + + return (((UINT64)HighData) << 32) | LowData; +} + +/** + Writes a 64-bit value to a Machine Specific Register(MSR), and returns the + value. + + Writes the 64-bit value specified by Value to the MSR specified by Index. The + 64-bit value written to the MSR is returned. No parameter checking is + performed on Index or Value, and some of these may cause CPU exceptions. The + caller must either guarantee that Index and Value are valid, or the caller + must establish proper exception handlers. This function is only available on + IA-32 and X64. + + @param Index The 32-bit MSR index to write. + @param Value The 64-bit value to write to the MSR. + + @return Value + +**/ +UINT64 +EFIAPI +AsmWriteMsr64 ( + IN UINT32 Index, + IN UINT64 Value + ) +{ + UINT32 LowData; + UINT32 HighData; + + LowData = (UINT32)(Value); + HighData = (UINT32)(Value >> 32); + + __asm__ __volatile__ ( + "wrmsr" + : + : "c" (Index), + "a" (LowData), + "d" (HighData) + ); + + return Value; +} + + + +/** + Reads the current value of the EFLAGS register. + + Reads and returns the current value of the EFLAGS register. This function is + only available on IA-32 and X64. This returns a 32-bit value on IA-32 and a + 64-bit value on X64. + + @return EFLAGS on IA-32 or RFLAGS on X64. + +**/ +UINTN +EFIAPI +AsmReadEflags ( + VOID + ) +{ + UINTN Eflags; + + __asm__ __volatile__ ( + "pushfq \n\t" + "pop %0 " + : "=r" (Eflags) // %0 + ); + + return Eflags; +} + + + +/** + Reads the current value of the Control Register 0 (CR0). + + Reads and returns the current value of CR0. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 0 (CR0). + +**/ +UINTN +EFIAPI +AsmReadCr0 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%cr0,%0" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of the Control Register 2 (CR2). + + Reads and returns the current value of CR2. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 2 (CR2). + +**/ +UINTN +EFIAPI +AsmReadCr2 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%cr2, %0" + : "=r" (Data) // %0 + ); + + return Data; +} + +/** + Reads the current value of the Control Register 3 (CR3). + + Reads and returns the current value of CR3. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 3 (CR3). + +**/ +UINTN +EFIAPI +AsmReadCr3 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%cr3, %0" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of the Control Register 4 (CR4). + + Reads and returns the current value of CR4. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of the Control Register 4 (CR4). + +**/ +UINTN +EFIAPI +AsmReadCr4 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%cr4, %0" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Writes a value to Control Register 0 (CR0). + + Writes and returns a new value to CR0. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr0 The value to write to CR0. + + @return The value written to CR0. + +**/ +UINTN +EFIAPI +AsmWriteCr0 ( + UINTN Cr0 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%cr0" + : + : "r" (Cr0) + ); + return Cr0; +} + + +/** + Writes a value to Control Register 2 (CR2). + + Writes and returns a new value to CR2. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr2 The value to write to CR2. + + @return The value written to CR2. + +**/ +UINTN +EFIAPI +AsmWriteCr2 ( + UINTN Cr2 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%cr2" + : + : "r" (Cr2) + ); + return Cr2; +} + + +/** + Writes a value to Control Register 3 (CR3). + + Writes and returns a new value to CR3. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr3 The value to write to CR3. + + @return The value written to CR3. + +**/ +UINTN +EFIAPI +AsmWriteCr3 ( + UINTN Cr3 + ) +{ + return Cr3; +} + + +/** + Writes a value to Control Register 4 (CR4). + + Writes and returns a new value to CR4. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Cr4 The value to write to CR4. + + @return The value written to CR4. + +**/ +UINTN +EFIAPI +AsmWriteCr4 ( + UINTN Cr4 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%cr4" + : + : "r" (Cr4) + ); + return Cr4; +} + + +/** + Reads the current value of Debug Register 0 (DR0). + + Reads and returns the current value of DR0. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 0 (DR0). + +**/ +UINTN +EFIAPI +AsmReadDr0 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr0, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 1 (DR1). + + Reads and returns the current value of DR1. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 1 (DR1). + +**/ +UINTN +EFIAPI +AsmReadDr1 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr1, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 2 (DR2). + + Reads and returns the current value of DR2. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 2 (DR2). + +**/ +UINTN +EFIAPI +AsmReadDr2 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr2, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 3 (DR3). + + Reads and returns the current value of DR3. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 3 (DR3). + +**/ +UINTN +EFIAPI +AsmReadDr3 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr3, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 4 (DR4). + + Reads and returns the current value of DR4. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 4 (DR4). + +**/ +UINTN +EFIAPI +AsmReadDr4 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr4, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 5 (DR5). + + Reads and returns the current value of DR5. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 5 (DR5). + +**/ +UINTN +EFIAPI +AsmReadDr5 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr5, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 6 (DR6). + + Reads and returns the current value of DR6. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 6 (DR6). + +**/ +UINTN +EFIAPI +AsmReadDr6 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr6, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Debug Register 7 (DR7). + + Reads and returns the current value of DR7. This function is only available + on IA-32 and X64. This returns a 32-bit value on IA-32 and a 64-bit value on + X64. + + @return The value of Debug Register 7 (DR7). + +**/ +UINTN +EFIAPI +AsmReadDr7 ( + VOID + ) +{ + UINTN Data; + + __asm__ __volatile__ ( + "mov %%dr7, %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Writes a value to Debug Register 0 (DR0). + + Writes and returns a new value to DR0. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr0 The value to write to Dr0. + + @return The value written to Debug Register 0 (DR0). + +**/ +UINTN +EFIAPI +AsmWriteDr0 ( + UINTN Dr0 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr0" + : + : "r" (Dr0) + ); + return Dr0; +} + + +/** + Writes a value to Debug Register 1 (DR1). + + Writes and returns a new value to DR1. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr1 The value to write to Dr1. + + @return The value written to Debug Register 1 (DR1). + +**/ +UINTN +EFIAPI +AsmWriteDr1 ( + UINTN Dr1 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr1" + : + : "r" (Dr1) + ); + return Dr1; +} + + +/** + Writes a value to Debug Register 2 (DR2). + + Writes and returns a new value to DR2. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr2 The value to write to Dr2. + + @return The value written to Debug Register 2 (DR2). + +**/ +UINTN +EFIAPI +AsmWriteDr2 ( + UINTN Dr2 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr2" + : + : "r" (Dr2) + ); + return Dr2; +} + + +/** + Writes a value to Debug Register 3 (DR3). + + Writes and returns a new value to DR3. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr3 The value to write to Dr3. + + @return The value written to Debug Register 3 (DR3). + +**/ +UINTN +EFIAPI +AsmWriteDr3 ( + UINTN Dr3 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr3" + : + : "r" (Dr3) + ); + return Dr3; +} + + +/** + Writes a value to Debug Register 4 (DR4). + + Writes and returns a new value to DR4. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr4 The value to write to Dr4. + + @return The value written to Debug Register 4 (DR4). + +**/ +UINTN +EFIAPI +AsmWriteDr4 ( + UINTN Dr4 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr4" + : + : "r" (Dr4) + ); + return Dr4; +} + + +/** + Writes a value to Debug Register 5 (DR5). + + Writes and returns a new value to DR5. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr5 The value to write to Dr5. + + @return The value written to Debug Register 5 (DR5). + +**/ +UINTN +EFIAPI +AsmWriteDr5 ( + UINTN Dr5 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr5" + : + : "r" (Dr5) + ); + return Dr5; +} + + +/** + Writes a value to Debug Register 6 (DR6). + + Writes and returns a new value to DR6. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr6 The value to write to Dr6. + + @return The value written to Debug Register 6 (DR6). + +**/ +UINTN +EFIAPI +AsmWriteDr6 ( + UINTN Dr6 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr6" + : + : "r" (Dr6) + ); + return Dr6; +} + + +/** + Writes a value to Debug Register 7 (DR7). + + Writes and returns a new value to DR7. This function is only available on + IA-32 and X64. This writes a 32-bit value on IA-32 and a 64-bit value on X64. + + @param Dr7 The value to write to Dr7. + + @return The value written to Debug Register 7 (DR7). + +**/ +UINTN +EFIAPI +AsmWriteDr7 ( + UINTN Dr7 + ) +{ + __asm__ __volatile__ ( + "mov %0, %%dr7" + : + : "r" (Dr7) + ); + return Dr7; +} + + +/** + Reads the current value of Code Segment Register (CS). + + Reads and returns the current value of CS. This function is only available on + IA-32 and X64. + + @return The current value of CS. + +**/ +UINT16 +EFIAPI +AsmReadCs ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "mov %%cs, %0" + :"=a" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Data Segment Register (DS). + + Reads and returns the current value of DS. This function is only available on + IA-32 and X64. + + @return The current value of DS. + +**/ +UINT16 +EFIAPI +AsmReadDs ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "mov %%ds, %0" + :"=a" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Extra Segment Register (ES). + + Reads and returns the current value of ES. This function is only available on + IA-32 and X64. + + @return The current value of ES. + +**/ +UINT16 +EFIAPI +AsmReadEs ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "mov %%es, %0" + :"=a" (Data) + ); + + return Data; +} + + +/** + Reads the current value of FS Data Segment Register (FS). + + Reads and returns the current value of FS. This function is only available on + IA-32 and X64. + + @return The current value of FS. + +**/ +UINT16 +EFIAPI +AsmReadFs ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "mov %%fs, %0" + :"=a" (Data) + ); + + return Data; +} + + +/** + Reads the current value of GS Data Segment Register (GS). + + Reads and returns the current value of GS. This function is only available on + IA-32 and X64. + + @return The current value of GS. + +**/ +UINT16 +EFIAPI +AsmReadGs ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "mov %%gs, %0" + :"=a" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Stack Segment Register (SS). + + Reads and returns the current value of SS. This function is only available on + IA-32 and X64. + + @return The current value of SS. + +**/ +UINT16 +EFIAPI +AsmReadSs ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "mov %%ds, %0" + :"=a" (Data) + ); + + return Data; +} + + +/** + Reads the current value of Task Register (TR). + + Reads and returns the current value of TR. This function is only available on + IA-32 and X64. + + @return The current value of TR. + +**/ +UINT16 +EFIAPI +AsmReadTr ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "str %0" + : "=r" (Data) + ); + + return Data; +} + + +/** + Reads the current Global Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current GDTR descriptor and returns it in Gdtr. This + function is only available on IA-32 and X64. + + @param Gdtr The pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86ReadGdtr ( + OUT IA32_DESCRIPTOR *Gdtr + ) +{ + __asm__ __volatile__ ( + "sgdt %0" + : "=m" (*Gdtr) + ); +} + + +/** + Writes the current Global Descriptor Table Register (GDTR) descriptor. + + Writes and the current GDTR descriptor specified by Gdtr. This function is + only available on IA-32 and X64. + + @param Gdtr The pointer to a GDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86WriteGdtr ( + IN CONST IA32_DESCRIPTOR *Gdtr + ) +{ + __asm__ __volatile__ ( + "lgdt %0" + : + : "m" (*Gdtr) + ); + +} + + +/** + Reads the current Interrupt Descriptor Table Register(GDTR) descriptor. + + Reads and returns the current IDTR descriptor and returns it in Idtr. This + function is only available on IA-32 and X64. + + @param Idtr The pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86ReadIdtr ( + OUT IA32_DESCRIPTOR *Idtr + ) +{ + __asm__ __volatile__ ( + "sidt %0" + : "=m" (*Idtr) + ); +} + + +/** + Writes the current Interrupt Descriptor Table Register(GDTR) descriptor. + + Writes the current IDTR descriptor and returns it in Idtr. This function is + only available on IA-32 and X64. + + @param Idtr The pointer to a IDTR descriptor. + +**/ +VOID +EFIAPI +InternalX86WriteIdtr ( + IN CONST IA32_DESCRIPTOR *Idtr + ) +{ + __asm__ __volatile__ ( + "lidt %0" + : + : "m" (*Idtr) + ); +} + + +/** + Reads the current Local Descriptor Table Register(LDTR) selector. + + Reads and returns the current 16-bit LDTR descriptor value. This function is + only available on IA-32 and X64. + + @return The current selector of LDT. + +**/ +UINT16 +EFIAPI +AsmReadLdtr ( + VOID + ) +{ + UINT16 Data; + + __asm__ __volatile__ ( + "sldt %0" + : "=g" (Data) // %0 + ); + + return Data; +} + + +/** + Writes the current Local Descriptor Table Register (GDTR) selector. + + Writes and the current LDTR descriptor specified by Ldtr. This function is + only available on IA-32 and X64. + + @param Ldtr 16-bit LDTR selector value. + +**/ +VOID +EFIAPI +AsmWriteLdtr ( + IN UINT16 Ldtr + ) +{ + __asm__ __volatile__ ( + "lldtw %0" + : + : "g" (Ldtr) // %0 + ); +} + + +/** + Save the current floating point/SSE/SSE2 context to a buffer. + + Saves the current floating point/SSE/SSE2 state to the buffer specified by + Buffer. Buffer must be aligned on a 16-byte boundary. This function is only + available on IA-32 and X64. + + @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +InternalX86FxSave ( + OUT IA32_FX_BUFFER *Buffer + ) +{ + __asm__ __volatile__ ( + "fxsave %0" + : + : "m" (*Buffer) // %0 + ); +} + + +/** + Restores the current floating point/SSE/SSE2 context from a buffer. + + Restores the current floating point/SSE/SSE2 state from the buffer specified + by Buffer. Buffer must be aligned on a 16-byte boundary. This function is + only available on IA-32 and X64. + + @param Buffer The pointer to a buffer to save the floating point/SSE/SSE2 context. + +**/ +VOID +EFIAPI +InternalX86FxRestore ( + IN CONST IA32_FX_BUFFER *Buffer + ) +{ + __asm__ __volatile__ ( + "fxrstor %0" + : + : "m" (*Buffer) // %0 + ); +} + + +/** + Reads the current value of 64-bit MMX Register #0 (MM0). + + Reads and returns the current value of MM0. This function is only available + on IA-32 and X64. + + @return The current value of MM0. + +**/ +UINT64 +EFIAPI +AsmReadMm0 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm0, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #1 (MM1). + + Reads and returns the current value of MM1. This function is only available + on IA-32 and X64. + + @return The current value of MM1. + +**/ +UINT64 +EFIAPI +AsmReadMm1 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm1, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #2 (MM2). + + Reads and returns the current value of MM2. This function is only available + on IA-32 and X64. + + @return The current value of MM2. + +**/ +UINT64 +EFIAPI +AsmReadMm2 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm2, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #3 (MM3). + + Reads and returns the current value of MM3. This function is only available + on IA-32 and X64. + + @return The current value of MM3. + +**/ +UINT64 +EFIAPI +AsmReadMm3 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm3, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #4 (MM4). + + Reads and returns the current value of MM4. This function is only available + on IA-32 and X64. + + @return The current value of MM4. + +**/ +UINT64 +EFIAPI +AsmReadMm4 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm4, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #5 (MM5). + + Reads and returns the current value of MM5. This function is only available + on IA-32 and X64. + + @return The current value of MM5. + +**/ +UINT64 +EFIAPI +AsmReadMm5 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm5, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #6 (MM6). + + Reads and returns the current value of MM6. This function is only available + on IA-32 and X64. + + @return The current value of MM6. + +**/ +UINT64 +EFIAPI +AsmReadMm6 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm6, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Reads the current value of 64-bit MMX Register #7 (MM7). + + Reads and returns the current value of MM7. This function is only available + on IA-32 and X64. + + @return The current value of MM7. + +**/ +UINT64 +EFIAPI +AsmReadMm7 ( + VOID + ) +{ + UINT64 Data; + + __asm__ __volatile__ ( + "movd %%mm7, %0 \n\t" + : "=r" (Data) // %0 + ); + + return Data; +} + + +/** + Writes the current value of 64-bit MMX Register #0 (MM0). + + Writes the current value of MM0. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM0. + +**/ +VOID +EFIAPI +AsmWriteMm0 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm0" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #1 (MM1). + + Writes the current value of MM1. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM1. + +**/ +VOID +EFIAPI +AsmWriteMm1 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm1" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #2 (MM2). + + Writes the current value of MM2. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM2. + +**/ +VOID +EFIAPI +AsmWriteMm2 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm2" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #3 (MM3). + + Writes the current value of MM3. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM3. + +**/ +VOID +EFIAPI +AsmWriteMm3 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm3" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #4 (MM4). + + Writes the current value of MM4. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM4. + +**/ +VOID +EFIAPI +AsmWriteMm4 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm4" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #5 (MM5). + + Writes the current value of MM5. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM5. + +**/ +VOID +EFIAPI +AsmWriteMm5 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm5" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #6 (MM6). + + Writes the current value of MM6. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM6. + +**/ +VOID +EFIAPI +AsmWriteMm6 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm6" // %0 + : + : "m" (Value) + ); +} + + +/** + Writes the current value of 64-bit MMX Register #7 (MM7). + + Writes the current value of MM7. This function is only available on IA32 and + X64. + + @param Value The 64-bit value to write to MM7. + +**/ +VOID +EFIAPI +AsmWriteMm7 ( + IN UINT64 Value + ) +{ + __asm__ __volatile__ ( + "movd %0, %%mm7" // %0 + : + : "m" (Value) + ); +} + + +/** + Reads the current value of Time Stamp Counter (TSC). + + Reads and returns the current value of TSC. This function is only available + on IA-32 and X64. + + @return The current value of TSC + +**/ +UINT64 +EFIAPI +AsmReadTsc ( + VOID + ) +{ + UINT32 LowData; + UINT32 HiData; + + __asm__ __volatile__ ( + "rdtsc" + : "=a" (LowData), + "=d" (HiData) + ); + + return (((UINT64)HiData) << 32) | LowData; +} + + +/** + Reads the current value of a Performance Counter (PMC). + + Reads and returns the current value of performance counter specified by + Index. This function is only available on IA-32 and X64. + + @param Index The 32-bit Performance Counter index to read. + + @return The value of the PMC specified by Index. + +**/ +UINT64 +EFIAPI +AsmReadPmc ( + IN UINT32 Index + ) +{ + UINT32 LowData; + UINT32 HiData; + + __asm__ __volatile__ ( + "rdpmc" + : "=a" (LowData), + "=d" (HiData) + : "c" (Index) + ); + + return (((UINT64)HiData) << 32) | LowData; +} + + +/** + Sets up a monitor buffer that is used by AsmMwait(). + + Executes a MONITOR instruction with the register state specified by Eax, Ecx + and Edx. Returns Eax. This function is only available on IA-32 and X64. + + @param Eax The value to load into EAX or RAX before executing the MONITOR + instruction. + @param Ecx The value to load into ECX or RCX before executing the MONITOR + instruction. + @param Edx The value to load into EDX or RDX before executing the MONITOR + instruction. + + @return Eax + +**/ +UINTN +EFIAPI +AsmMonitor ( + IN UINTN Eax, + IN UINTN Ecx, + IN UINTN Edx + ) +{ + __asm__ __volatile__ ( + "monitor" + : + : "a" (Eax), + "c" (Ecx), + "d" (Edx) + ); + + return Eax; +} + + +/** + Executes an MWAIT instruction. + + Executes an MWAIT instruction with the register state specified by Eax and + Ecx. Returns Eax. This function is only available on IA-32 and X64. + + @param Eax The value to load into EAX or RAX before executing the MONITOR + instruction. + @param Ecx The value to load into ECX or RCX before executing the MONITOR + instruction. + + @return Eax + +**/ +UINTN +EFIAPI +AsmMwait ( + IN UINTN Eax, + IN UINTN Ecx + ) +{ + __asm__ __volatile__ ( + "mwait" + : + : "a" (Eax), + "c" (Ecx) + ); + + return Eax; +} + + +/** + Executes a WBINVD instruction. + + Executes a WBINVD instruction. This function is only available on IA-32 and + X64. + +**/ +VOID +EFIAPI +AsmWbinvd ( + VOID + ) +{ + __asm__ __volatile__ ("wbinvd":::"memory"); +} + + +/** + Executes a INVD instruction. + + Executes a INVD instruction. This function is only available on IA-32 and + X64. + +**/ +VOID +EFIAPI +AsmInvd ( + VOID + ) +{ + __asm__ __volatile__ ("invd":::"memory"); + +} + + +/** + Flushes a cache line from all the instruction and data caches within the + coherency domain of the CPU. + + Flushed the cache line specified by LinearAddress, and returns LinearAddress. + This function is only available on IA-32 and X64. + + @param LinearAddress The address of the cache line to flush. If the CPU is + in a physical addressing mode, then LinearAddress is a + physical address. If the CPU is in a virtual + addressing mode, then LinearAddress is a virtual + address. + + @return LinearAddress +**/ +VOID * +EFIAPI +AsmFlushCacheLine ( + IN VOID *LinearAddress + ) +{ + __asm__ __volatile__ ( + "clflush (%0)" + : + : "r" (LinearAddress) + : "memory" + ); + + return LinearAddress; +} + + diff --git a/UnixPkg/Library/UnixBaseLib/X64/Invd.asm b/UnixPkg/Library/UnixBaseLib/X64/Invd.asm new file mode 100644 index 0000000000..ed6f95da55 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Invd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; Invd.Asm +; +; Abstract: +; +; AsmInvd function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmInvd ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmInvd PROC + invd + ret +AsmInvd ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/LongJump.S b/UnixPkg/Library/UnixBaseLib/X64/LongJump.S new file mode 100644 index 0000000000..d17592cf37 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/LongJump.S @@ -0,0 +1,88 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# LongJump.S +# +# Abstract: +# +# Implementation of _LongJump() on x64. +# +#------------------------------------------------------------------------------ + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# InternalLongJump ( +# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, // %rcx +# IN UINTN Value // %rdx +# ); +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(EfiInternalLongJump) +ASM_PFX(EfiInternalLongJump): + mov (%rcx), %rbx + mov 0x8(%rcx), %rsp + mov 0x10(%rcx), %rbp + mov 0x18(%rcx), %rdi + mov 0x20(%rcx), %rsi + mov 0x28(%rcx), %r12 + mov 0x30(%rcx), %r13 + mov 0x38(%rcx), %r14 + mov 0x40(%rcx), %r15 + # load non-volatile fp registers + ldmxcsr 0x50(%rcx) + movdqu 0x58(%rcx), %xmm6 + movdqu 0x68(%rcx), %xmm7 + movdqu 0x78(%rcx), %xmm8 + movdqu 0x88(%rcx), %xmm9 + movdqu 0x98(%rcx), %xmm10 + movdqu 0xA8(%rcx), %xmm11 + movdqu 0xB8(%rcx), %xmm12 + movdqu 0xC8(%rcx), %xmm13 + movdqu 0xD8(%rcx), %xmm14 + movdqu 0xE8(%rcx), %xmm15 + mov %rdx, %rax # set return value + jmp *0x48(%rcx) + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# UnixInternalLongJump ( +# IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, // %rdi +# IN UINTN Value // %rsi +# ); +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(InternalLongJump) +ASM_PFX(InternalLongJump): + mov (%rdi), %rbx + mov 0x8(%rdi), %rsp + mov 0x10(%rdi), %rbp + mov 0x18(%rdi), %rdi + mov 0x20(%rdi), %rsi + mov 0x28(%rdi), %r12 + mov 0x30(%rdi), %r13 + mov 0x38(%rdi), %r14 + mov 0x40(%rdi), %r15 + # load non-volatile fp registers + ldmxcsr 0x50(%rdi) + movdqu 0x58(%rdi), %xmm6 + movdqu 0x68(%rdi), %xmm7 + movdqu 0x78(%rdi), %xmm8 + movdqu 0x88(%rdi), %xmm9 + movdqu 0x98(%rdi), %xmm10 + movdqu 0xA8(%rdi), %xmm11 + movdqu 0xB8(%rdi), %xmm12 + movdqu 0xC8(%rdi), %xmm13 + movdqu 0xD8(%rdi), %xmm14 + movdqu 0xE8(%rdi), %xmm15 + mov %rsi, %rax # set return value + jmp *0x48(%rdi) diff --git a/UnixPkg/Library/UnixBaseLib/X64/LongJump.asm b/UnixPkg/Library/UnixBaseLib/X64/LongJump.asm new file mode 100644 index 0000000000..eaf32ea2e6 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/LongJump.asm @@ -0,0 +1,58 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; LongJump.Asm +; +; Abstract: +; +; Implementation of _LongJump() on x64. +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalLongJump ( +; IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer, +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +InternalLongJump PROC + mov rbx, [rcx] + mov rsp, [rcx + 8] + mov rbp, [rcx + 10h] + mov rdi, [rcx + 18h] + mov rsi, [rcx + 20h] + mov r12, [rcx + 28h] + mov r13, [rcx + 30h] + mov r14, [rcx + 38h] + mov r15, [rcx + 40h] + ; load non-volatile fp registers + ldmxcsr [rcx + 50h] + movdqu xmm6, [rcx + 58h] + movdqu xmm7, [rcx + 68h] + movdqu xmm8, [rcx + 78h] + movdqu xmm9, [rcx + 88h] + movdqu xmm10, [rcx + 98h] + movdqu xmm11, [rcx + 0A8h] + movdqu xmm12, [rcx + 0B8h] + movdqu xmm13, [rcx + 0C8h] + movdqu xmm14, [rcx + 0D8h] + movdqu xmm15, [rcx + 0E8h] + mov rax, rdx ; set return value + jmp qword ptr [rcx + 48h] +InternalLongJump ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/Monitor.asm b/UnixPkg/Library/UnixBaseLib/X64/Monitor.asm new file mode 100644 index 0000000000..8ae6e7320c --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Monitor.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; Monitor.Asm +; +; Abstract: +; +; AsmMonitor function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmMonitor ( +; IN UINTN Eax, +; IN UINTN Ecx, +; IN UINTN Edx +; ); +;------------------------------------------------------------------------------ +AsmMonitor PROC + mov eax, ecx + mov ecx, edx + mov edx, r8d + DB 0fh, 1, 0c8h ; monitor + ret +AsmMonitor ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/Mwait.asm b/UnixPkg/Library/UnixBaseLib/X64/Mwait.asm new file mode 100644 index 0000000000..02ec8633e5 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Mwait.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; Mwait.Asm +; +; Abstract: +; +; AsmMwait function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmMwait ( +; IN UINTN Eax, +; IN UINTN Ecx +; ); +;------------------------------------------------------------------------------ +AsmMwait PROC + mov eax, ecx + mov ecx, edx + DB 0fh, 1, 0c9h ; mwait + ret +AsmMwait ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/Non-existing.c b/UnixPkg/Library/UnixBaseLib/X64/Non-existing.c new file mode 100644 index 0000000000..5ceb64bd79 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Non-existing.c @@ -0,0 +1,153 @@ +/** @file + Non-existing BaseLib functions on x64 + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +#include +#include + +/** + Enables the 32-bit paging mode on the CPU. + + Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode. This function is + only available on IA-32. After the 32-bit paging mode is enabled, control is + transferred to the function specified by EntryPoint using the new stack + specified by NewStack and passing in the parameters specified by Context1 and + Context2. Context1 and Context2 are optional and may be NULL. The function + EntryPoint must never return. + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit protected mode with flat descriptors. This + means all descriptors must have a base of 0 and a limit of 4GB. + 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat + descriptors. + 4) CR3 must point to valid page tables that will be used once the transition + is complete, and those page tables must guarantee that the pages for this + function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is enabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is enabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is enabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is enabled. + +**/ +VOID +EFIAPI +InternalX86EnablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ) +{ + // + // This function cannot work on x64 platform + // + ASSERT (FALSE); +} + +/** + Disables the 32-bit paging mode on the CPU. + + Disables the 32-bit paging mode on the CPU and returns to 32-bit protected + mode. This function assumes the current execution mode is 32-paged protected + mode. This function is only available on IA-32. After the 32-bit paging mode + is disabled, control is transferred to the function specified by EntryPoint + using the new stack specified by NewStack and passing in the parameters + specified by Context1 and Context2. Context1 and Context2 are optional and + may be NULL. The function EntryPoint must never return. + + There are a number of constraints that must be followed before calling this + function: + 1) Interrupts must be disabled. + 2) The caller must be in 32-bit paged mode. + 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode. + 4) CR3 must point to valid page tables that guarantee that the pages for + this function and the stack are identity mapped. + + @param EntryPoint A pointer to function to call with the new stack after + paging is disabled. + @param Context1 A pointer to the context to pass into the EntryPoint + function as the first parameter after paging is disabled. + @param Context2 A pointer to the context to pass into the EntryPoint + function as the second parameter after paging is + disabled. + @param NewStack A pointer to the new stack to use for the EntryPoint + function after paging is disabled. + +**/ +VOID +EFIAPI +InternalX86DisablePaging32 ( + IN SWITCH_STACK_ENTRY_POINT EntryPoint, + IN VOID *Context1, OPTIONAL + IN VOID *Context2, OPTIONAL + IN VOID *NewStack + ) +{ + // + // This function cannot work on x64 platform + // + ASSERT (FALSE); +} + + +/** + Enables the 64-bit paging mode on the CPU. + + Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables + must be properly initialized prior to calling this service. This function + assumes the current execution mode is 32-bit protected mode with flat + descriptors. This function is only available on IA-32. After the 64-bit + paging mode is enabled, control is transferred to the function specified by + EntryPoint using the new stack specified by NewStack and passing in the + parameters specified by Context1 and Context2. Context1 and Context2 are + optional and may be 0. The function EntryPoint must never return. + + @param Cs The 16-bit selector to load in the CS before EntryPoint + is called. The descriptor in the GDT that this selector + references must be setup for long mode. + @param EntryPoint The 64-bit virtual address of the function to call with + the new stack after paging is enabled. + @param Context1 The 64-bit virtual address of the context to pass into + the EntryPoint function as the first parameter after + paging is enabled. + @param Context2 The 64-bit virtual address of the context to pass into + the EntryPoint function as the second parameter after + paging is enabled. + @param NewStack The 64-bit virtual address of the new stack to use for + the EntryPoint function after paging is enabled. + +**/ +VOID +EFIAPI +InternalX86EnablePaging64 ( + IN UINT16 Cs, + IN UINT64 EntryPoint, + IN UINT64 Context1, OPTIONAL + IN UINT64 Context2, OPTIONAL + IN UINT64 NewStack + ) +{ + // + // This function cannot work on x64 platform. + // + ASSERT (FALSE); +} diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadCr0.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadCr0.asm new file mode 100644 index 0000000000..c3ff5b0772 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadCr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadCr0.Asm +; +; Abstract: +; +; AsmReadCr0 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadCr0 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadCr0 PROC + mov rax, cr0 + ret +AsmReadCr0 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadCr2.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadCr2.asm new file mode 100644 index 0000000000..f1473b9ad4 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadCr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadCr2.Asm +; +; Abstract: +; +; AsmReadCr2 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadCr2 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadCr2 PROC + mov rax, cr2 + ret +AsmReadCr2 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadCr3.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadCr3.asm new file mode 100644 index 0000000000..432468e731 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadCr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadCr3.Asm +; +; Abstract: +; +; AsmReadCr3 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadCr3 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadCr3 PROC + mov rax, cr3 + ret +AsmReadCr3 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadCr4.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadCr4.asm new file mode 100644 index 0000000000..17d44996ea --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadCr4.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadCr4.Asm +; +; Abstract: +; +; AsmReadCr4 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadCr4 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadCr4 PROC + mov rax, cr4 + ret +AsmReadCr4 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadCs.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadCs.asm new file mode 100644 index 0000000000..ac3040cd1b --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadCs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadCs.Asm +; +; Abstract: +; +; AsmReadCs function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadCs ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadCs PROC + mov eax, cs + ret +AsmReadCs ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr0.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr0.asm new file mode 100644 index 0000000000..8ac85ade8e --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr0.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr0.Asm +; +; Abstract: +; +; AsmReadDr0 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr0 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr0 PROC + mov rax, dr0 + ret +AsmReadDr0 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr1.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr1.asm new file mode 100644 index 0000000000..8b042e2d2e --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr1.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr1.Asm +; +; Abstract: +; +; AsmReadDr1 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr1 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr1 PROC + mov rax, dr1 + ret +AsmReadDr1 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr2.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr2.asm new file mode 100644 index 0000000000..9361756584 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr2.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr2.Asm +; +; Abstract: +; +; AsmReadDr2 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr2 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr2 PROC + mov rax, dr2 + ret +AsmReadDr2 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr3.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr3.asm new file mode 100644 index 0000000000..a25fc9d97a --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr3.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr3.Asm +; +; Abstract: +; +; AsmReadDr3 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr3 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr3 PROC + mov rax, dr3 + ret +AsmReadDr3 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr4.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr4.asm new file mode 100644 index 0000000000..dc6c5e9826 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr4.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr4.Asm +; +; Abstract: +; +; AsmReadDr4 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr4 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr4 PROC + ; + ; There's no obvious reason to access this register, since it's aliased to + ; DR7 when DE=0 or an exception generated when DE=1 + ; + DB 0fh, 21h, 0e0h + ret +AsmReadDr4 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr5.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr5.asm new file mode 100644 index 0000000000..7e313522f6 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr5.asm @@ -0,0 +1,42 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr5.Asm +; +; Abstract: +; +; AsmReadDr5 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr5 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr5 PROC + ; + ; There's no obvious reason to access this register, since it's aliased to + ; DR7 when DE=0 or an exception generated when DE=1 + ; + DB 0fh, 21h, 0e8h + ret +AsmReadDr5 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr6.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr6.asm new file mode 100644 index 0000000000..ee6b9ec695 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr6.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr6.Asm +; +; Abstract: +; +; AsmReadDr6 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr6 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr6 PROC + mov rax, dr6 + ret +AsmReadDr6 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDr7.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDr7.asm new file mode 100644 index 0000000000..7173057e9e --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDr7.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDr7.Asm +; +; Abstract: +; +; AsmReadDr7 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadDr7 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDr7 PROC + mov rax, dr7 + ret +AsmReadDr7 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadDs.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadDs.asm new file mode 100644 index 0000000000..d67512c3de --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadDs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadDs.Asm +; +; Abstract: +; +; AsmReadDs function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadDs ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadDs PROC + mov eax, ds + ret +AsmReadDs ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadEflags.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadEflags.asm new file mode 100644 index 0000000000..b3ecc7cc16 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadEflags.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadEflags.Asm +; +; Abstract: +; +; AsmReadEflags function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmReadEflags ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadEflags PROC + pushfq + pop rax + ret +AsmReadEflags ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadEs.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadEs.asm new file mode 100644 index 0000000000..76cffdcb5c --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadEs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadEs.Asm +; +; Abstract: +; +; AsmReadEs function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadEs ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadEs PROC + mov eax, es + ret +AsmReadEs ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadFs.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadFs.asm new file mode 100644 index 0000000000..e91aa14aa6 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadFs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadFs.Asm +; +; Abstract: +; +; AsmReadFs function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadFs ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadFs PROC + mov eax, fs + ret +AsmReadFs ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadGdtr.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadGdtr.asm new file mode 100644 index 0000000000..ebc60bd999 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadGdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadGdtr.Asm +; +; Abstract: +; +; AsmReadGdtr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86ReadGdtr ( +; OUT IA32_DESCRIPTOR *Gdtr +; ); +;------------------------------------------------------------------------------ +InternalX86ReadGdtr PROC + sgdt fword ptr [rcx] + ret +InternalX86ReadGdtr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadGs.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadGs.asm new file mode 100644 index 0000000000..f185c38761 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadGs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadGs.Asm +; +; Abstract: +; +; AsmReadGs function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadGs ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadGs PROC + mov eax, gs + ret +AsmReadGs ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadIdtr.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadIdtr.asm new file mode 100644 index 0000000000..4d53feb9d8 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadIdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadIdtr.Asm +; +; Abstract: +; +; AsmReadIdtr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86ReadIdtr ( +; OUT IA32_DESCRIPTOR *Idtr +; ); +;------------------------------------------------------------------------------ +InternalX86ReadIdtr PROC + sidt fword ptr [rcx] + ret +InternalX86ReadIdtr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadLdtr.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadLdtr.asm new file mode 100644 index 0000000000..dbe517e353 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadLdtr.Asm +; +; Abstract: +; +; AsmReadLdtr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadLdtr ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadLdtr PROC + sldt eax + ret +AsmReadLdtr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm0.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm0.asm new file mode 100644 index 0000000000..99212c747d --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm0.Asm +; +; Abstract: +; +; AsmReadMm0 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm0 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm0 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0c0h + ret +AsmReadMm0 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm1.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm1.asm new file mode 100644 index 0000000000..7a9ae7c1ce --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm1.Asm +; +; Abstract: +; +; AsmReadMm1 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm1 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm1 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0c8h + ret +AsmReadMm1 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm2.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm2.asm new file mode 100644 index 0000000000..337ac73dde --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm2.Asm +; +; Abstract: +; +; AsmReadMm2 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm2 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm2 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0d0h + ret +AsmReadMm2 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm3.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm3.asm new file mode 100644 index 0000000000..266e29a9d1 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm3.Asm +; +; Abstract: +; +; AsmReadMm3 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm3 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm3 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0d8h + ret +AsmReadMm3 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm4.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm4.asm new file mode 100644 index 0000000000..9cc7435807 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm4.Asm +; +; Abstract: +; +; AsmReadMm4 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm4 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm4 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0e0h + ret +AsmReadMm4 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm5.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm5.asm new file mode 100644 index 0000000000..b66522535f --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm5.Asm +; +; Abstract: +; +; AsmReadMm5 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm5 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm5 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0e8h + ret +AsmReadMm5 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm6.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm6.asm new file mode 100644 index 0000000000..1e3ebc5d8e --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm6.Asm +; +; Abstract: +; +; AsmReadMm6 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm6 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm6 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0f0h + ret +AsmReadMm6 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMm7.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMm7.asm new file mode 100644 index 0000000000..8228672135 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMm7.Asm +; +; Abstract: +; +; AsmReadMm7 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMm7 ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadMm7 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 7eh, 0f8h + ret +AsmReadMm7 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.asm new file mode 100644 index 0000000000..878ed18245 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadMsr64.Asm +; +; Abstract: +; +; AsmReadMsr64 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadMsr64 ( +; IN UINT32 Index +; ); +;------------------------------------------------------------------------------ +AsmReadMsr64 PROC + rdmsr ; edx & eax are zero extended + shl rdx, 20h + or rax, rdx + ret +AsmReadMsr64 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.c b/UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.c new file mode 100644 index 0000000000..343e9246b0 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadMsr64.c @@ -0,0 +1,39 @@ +/** @file + CpuBreakpoint function. + + Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +/** + Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics. +**/ + +unsigned __int64 __readmsr (int register); + +#pragma intrinsic(__readmsr) + +/** + Read data to MSR. + + @param Index Register index of MSR. + + @return Value read from MSR. + +**/ +UINT64 +EFIAPI +AsmReadMsr64 ( + IN UINT32 Index + ) +{ + return __readmsr (Index); +} + diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadPmc.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadPmc.asm new file mode 100644 index 0000000000..1b74f67e72 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadPmc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadPmc.Asm +; +; Abstract: +; +; AsmReadPmc function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadPmc ( +; IN UINT32 PmcIndex +; ); +;------------------------------------------------------------------------------ +AsmReadPmc PROC + rdpmc + shl rdx, 20h + or rax, rdx + ret +AsmReadPmc ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadSs.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadSs.asm new file mode 100644 index 0000000000..8f308c49af --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadSs.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadSs.Asm +; +; Abstract: +; +; AsmReadSs function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadSs ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadSs PROC + mov eax, ss + ret +AsmReadSs ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadTr.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadTr.asm new file mode 100644 index 0000000000..a114f53146 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadTr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadTr.Asm +; +; Abstract: +; +; AsmReadTr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT16 +; EFIAPI +; AsmReadTr ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadTr PROC + str eax + ret +AsmReadTr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/ReadTsc.asm b/UnixPkg/Library/UnixBaseLib/X64/ReadTsc.asm new file mode 100644 index 0000000000..d792bfb204 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/ReadTsc.asm @@ -0,0 +1,40 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; ReadTsc.Asm +; +; Abstract: +; +; AsmReadTsc function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmReadTsc ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmReadTsc PROC + rdtsc + shl rdx, 20h + or rax, rdx + ret +AsmReadTsc ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/SetJump.S b/UnixPkg/Library/UnixBaseLib/X64/SetJump.S new file mode 100644 index 0000000000..b5fd38ab6a --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/SetJump.S @@ -0,0 +1,82 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# SetJump.S +# +# Abstract: +# +# Implementation of SetJump() on x86_64 +# +#------------------------------------------------------------------------------ + +ASM_GLOBAL ASM_PFX(EfiSetJump) +ASM_PFX(EfiSetJump): + push %rcx + add $0xffffffffffffffe0,%rsp + call ASM_PFX(InternalAssertJumpBuffer) + add $0x20,%rsp + pop %rcx + pop %rdx + mov %rbx,(%rcx) + mov %rsp,0x8(%rcx) + mov %rbp,0x10(%rcx) + mov %rdi,0x18(%rcx) + mov %rsi,0x20(%rcx) + mov %r12,0x28(%rcx) + mov %r13,0x30(%rcx) + mov %r14,0x38(%rcx) + mov %r15,0x40(%rcx) + mov %rdx,0x48(%rcx) + # save non-volatile fp registers + stmxcsr 0x50(%rcx) + movdqu %xmm6, 0x58(%rcx) + movdqu %xmm7, 0x68(%rcx) + movdqu %xmm8, 0x78(%rcx) + movdqu %xmm9, 0x88(%rcx) + movdqu %xmm10, 0x98(%rcx) + movdqu %xmm11, 0xA8(%rcx) + movdqu %xmm12, 0xB8(%rcx) + movdqu %xmm13, 0xC8(%rcx) + movdqu %xmm14, 0xD8(%rcx) + movdqu %xmm15, 0xE8(%rcx) + xor %rax,%rax + jmpq *%rdx + + +ASM_GLOBAL ASM_PFX(SetJump) +ASM_PFX(SetJump): + pop %rdx + mov %rbx,(%rdi) # Rbx + mov %rsp,0x8(%rdi) + mov %rbp,0x10(%rdi) + mov %rcx,0x18(%rdi) + mov %rsi,0x20(%rdi) + mov %r12,0x28(%rdi) + mov %r13,0x30(%rdi) + mov %r14,0x38(%rdi) + mov %r15,0x40(%rdi) + mov %rdx,0x48(%rdi) + # save non-volatile fp registers + stmxcsr 0x50(%rdi) + movdqu %xmm6, 0x58(%rdi) + movdqu %xmm7, 0x68(%rdi) + movdqu %xmm8, 0x78(%rdi) + movdqu %xmm9, 0x88(%rdi) + movdqu %xmm10, 0x98(%rdi) + movdqu %xmm11, 0xA8(%rdi) + movdqu %xmm12, 0xB8(%rdi) + movdqu %xmm13, 0xC8(%rdi) + movdqu %xmm14, 0xD8(%rdi) + movdqu %xmm15, 0xE8(%rdi) + xor %rax,%rax + jmpq *%rdx diff --git a/UnixPkg/Library/UnixBaseLib/X64/SetJump.asm b/UnixPkg/Library/UnixBaseLib/X64/SetJump.asm new file mode 100644 index 0000000000..efdbb9a1fc --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/SetJump.asm @@ -0,0 +1,66 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; SetJump.Asm +; +; Abstract: +; +; Implementation of SetJump() on x64. +; +;------------------------------------------------------------------------------ + + .code + +EXTERNDEF InternalAssertJumpBuffer:PROC + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; SetJump ( +; OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer +; ); +;------------------------------------------------------------------------------ +SetJump PROC + push rcx + add rsp, -20h + call InternalAssertJumpBuffer + add rsp, 20h + pop rcx + pop rdx + mov [rcx], rbx + mov [rcx + 8], rsp + mov [rcx + 10h], rbp + mov [rcx + 18h], rdi + mov [rcx + 20h], rsi + mov [rcx + 28h], r12 + mov [rcx + 30h], r13 + mov [rcx + 38h], r14 + mov [rcx + 40h], r15 + mov [rcx + 48h], rdx + ; save non-volatile fp registers + stmxcsr [rcx + 50h] + movdqu [rcx + 58h], xmm6 + movdqu [rcx + 68h], xmm7 + movdqu [rcx + 78h], xmm8 + movdqu [rcx + 88h], xmm9 + movdqu [rcx + 98h], xmm10 + movdqu [rcx + 0A8h], xmm11 + movdqu [rcx + 0B8h], xmm12 + movdqu [rcx + 0C8h], xmm13 + movdqu [rcx + 0D8h], xmm14 + movdqu [rcx + 0E8h], xmm15 + xor rax, rax + jmp rdx +SetJump ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/SwitchStack.S b/UnixPkg/Library/UnixBaseLib/X64/SwitchStack.S new file mode 100644 index 0000000000..b6dff5ed77 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/SwitchStack.S @@ -0,0 +1,79 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# SwitchStack.S +# +# Abstract: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# Routine Description: +# +# Routine for switching stacks with 2 parameters +# +# Arguments: +# +# (rcx) EntryPoint - Entry point with new stack. +# (rdx) Context1 - Parameter1 for entry point. +# (r8) Context2 - Parameter2 for entry point. +# (r9) NewStack - The pointer to new stack. +# +# Returns: +# +# None +# +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(EfiInternalSwitchStack) +ASM_PFX(EfiInternalSwitchStack): + mov %rcx, %rax + mov %rdx, %rcx + mov %r8, %rdx + # + # Reserve space for register parameters (rcx, rdx, r8 & r9) on the stack, + # in case the callee wishes to spill them. + # + lea -0x20(%r9), %rsp + call *%rax + + + +#------------------------------------------------------------------------------ +# Routine Description: +# +# Routine for switching stacks with 2 parameters (Unix ABI) +# +# Arguments: +# +# (rdi) EntryPoint - Entry point with new stack. +# (rsi) Context1 - Parameter1 for entry point. +# (rdx) Context2 - Parameter2 for entry point. +# (rcx) NewStack - The pointer to new stack. +# +# Returns: +# +# None +# +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(InternalSwitchStack) +ASM_PFX(InternalSwitchStack): + mov %rdi, %rax + mov %rsi, %rdi + mov %rdx, %rsi + # + # Reserve space for register parameters (rcx, rdx, r8 & r9) on the stack, + # in case the callee wishes to spill them. + # + lea -0x20(%rcx), %rsp + call *%rax diff --git a/UnixPkg/Library/UnixBaseLib/X64/SwitchStack.asm b/UnixPkg/Library/UnixBaseLib/X64/SwitchStack.asm new file mode 100644 index 0000000000..0f802b0174 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/SwitchStack.asm @@ -0,0 +1,51 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; SwitchStack.Asm +; +; Abstract: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; Routine Description: +; +; Routine for switching stacks with 2 parameters +; +; Arguments: +; +; (rcx) EntryPoint - Entry point with new stack. +; (rdx) Context1 - Parameter1 for entry point. +; (r8) Context2 - Parameter2 for entry point. +; (r9) NewStack - The pointer to new stack. +; +; Returns: +; +; None +; +;------------------------------------------------------------------------------ +InternalSwitchStack PROC + mov rax, rcx + mov rcx, rdx + mov rdx, r8 + ; + ; Reserve space for register parameters (rcx, rdx, r8 & r9) on the stack, + ; in case the callee wishes to spill them. + ; + lea rsp, [r9 - 20h] + call rax +InternalSwitchStack ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/Thunk16.S b/UnixPkg/Library/UnixBaseLib/X64/Thunk16.S new file mode 100644 index 0000000000..fa9b3d6035 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Thunk16.S @@ -0,0 +1,325 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# Thunk16.S +# +# Abstract: +# +# Real mode thunk +# +#------------------------------------------------------------------------------ + +#include + +ASM_GLOBAL ASM_PFX(m16Start) +ASM_GLOBAL ASM_PFX(m16Size) +ASM_GLOBAL ASM_PFX(mThunk16Attr) +ASM_GLOBAL ASM_PFX(m16Gdt) +ASM_GLOBAL ASM_PFX(m16GdtrBase) +ASM_GLOBAL ASM_PFX(mTransition) +ASM_GLOBAL ASM_PFX(InternalAsmThunk16) + +# define the structure of IA32_REGS +.set _EDI, 0 #size 4 +.set _ESI, 4 #size 4 +.set _EBP, 8 #size 4 +.set _ESP, 12 #size 4 +.set _EBX, 16 #size 4 +.set _EDX, 20 #size 4 +.set _ECX, 24 #size 4 +.set _EAX, 28 #size 4 +.set _DS, 32 #size 2 +.set _ES, 34 #size 2 +.set _FS, 36 #size 2 +.set _GS, 38 #size 2 +.set _EFLAGS, 40 #size 8 +.set _EIP, 48 #size 4 +.set _CS, 52 #size 2 +.set _SS, 54 #size 2 +.set IA32_REGS_SIZE, 56 + + .data + +ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start) +ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start) +ASM_PFX(m16Gdt): .word ASM_PFX(NullSeg) - ASM_PFX(m16Start) +ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start) +ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start) + + .text + +ASM_PFX(m16Start): + +SavedGdt: .space 10 + +#------------------------------------------------------------------------------ +# _BackFromUserCode() takes control in real mode after 'retf' has been executed +# by user code. It will be shadowed to somewhere in memory below 1MB. +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(BackFromUserCode) +ASM_PFX(BackFromUserCode): + # + # The order of saved registers on the stack matches the order they appears + # in IA32_REGS structure. This facilitates wrapper function to extract them + # into that structure. + # + # Some instructions for manipulation of segment registers have to be written + # in opcode since 64-bit MASM prevents accesses to those registers. + # + .byte 0x16 # push ss + .byte 0xe # push cs + .byte 0x66 + call L_Base # push eip +L_Base: + .byte 0x66 + pushq $0 # reserved high order 32 bits of EFlags + .byte 0x66, 0x9c # pushfd actually + cli # disable interrupts + push %gs + push %fs + .byte 6 # push es + .byte 0x1e # push ds + .byte 0x66,0x60 # pushad + .byte 0x66,0xba # mov edx, imm32 +_ThunkAttr: .space 4 + testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl + jz L_1 + movl $0x15cd2401,%eax # mov ax, 2401h & int 15h + cli # disable interrupts + jnc L_2 +L_1: + testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl + jz L_2 + inb $0x92,%al + orb $2,%al + outb %al, $0x92 # deactivate A20M# +L_2: + movl %ss,%eax + lea IA32_REGS_SIZE(%esp), %bp + # + # rsi in the following 2 instructions is indeed bp in 16-bit code + # + movw %bp, (_ESP - IA32_REGS_SIZE)(%rsi) + .byte 0x66 + movl (_EIP - IA32_REGS_SIZE)(%rsi), %ebx + shlw $4,%ax # shl eax, 4 + addw %ax,%bp # add ebp, eax + movw %cs,%ax + shlw $4,%ax + lea (L_64BitCode - L_Base)(%ebx, %eax), %ax + .byte 0x66,0x2e,0x89,0x87 # mov cs:[bx + (L_64Eip - L_Base)], eax + .word L_64Eip - L_Base + .byte 0x66,0xb8 # mov eax, imm32 +SavedCr4: .space 4 + movq %rax, %cr4 + # + # rdi in the instruction below is indeed bx in 16-bit code + # + .byte 0x66,0x2e # 2eh is "cs:" segment override + lgdt (SavedGdt - L_Base)(%rdi) + .byte 0x66 + movl $0xc0000080,%ecx + rdmsr + orb $1,%ah + wrmsr + .byte 0x66,0xb8 # mov eax, imm32 +SavedCr0: .space 4 + movq %rax, %cr0 + .byte 0x66,0xea # jmp far cs:L_64Bit +L_64Eip: .space 4 +SavedCs: .space 2 +L_64BitCode: + .byte 0x90 + .byte 0x67,0xbc # mov esp, imm32 +SavedSp: .space 4 # restore stack + nop + ret + +_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start) + .word CODE16 +_16Gdtr: .word GDT_SIZE - 1 +_16GdtrBase: .quad ASM_PFX(NullSeg) +_16Idtr: .word 0x3ff + .long 0 + +#------------------------------------------------------------------------------ +# _ToUserCode() takes control in real mode before passing control to user code. +# It will be shadowed to somewhere in memory below 1MB. +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(ToUserCode) +ASM_PFX(ToUserCode): + movl %edx,%ss # set new segment selectors + movl %edx,%ds + movl %edx,%es + movl %edx,%fs + movl %edx,%gs + .byte 0x66 + movl $0xc0000080,%ecx + movq %rax, %cr0 + rdmsr + andb $0xfe, %ah # $0b11111110 + wrmsr + movq %rbp, %cr4 + movl %esi,%ss # set up 16-bit stack segment + movw %bx,%sp # set up 16-bit stack pointer + .byte 0x66 # make the following call 32-bit + call L_Base1 # push eip +L_Base1: + popw %bp # ebp <- address of L_Base1 + pushq (IA32_REGS_SIZE + 2)(%esp) + lea 0x0c(%rsi), %eax + pushq %rax + lret # execution begins at next instruction +L_RealMode: + .byte 0x66,0x2e # CS and operand size override + lidt (_16Idtr - L_Base1)(%rsi) + .byte 0x66,0x61 # popad + .byte 0x1f # pop ds + .byte 0x7 # pop es + .byte 0x0f, 0xa1 # pop fs + .byte 0x0f, 0xa9 # pop gs + .byte 0x66, 0x9d # popfd + leaw 4(%esp),%sp # skip high order 32 bits of EFlags + .byte 0x66 # make the following retf 32-bit + lret # transfer control to user code + +.set CODE16, ASM_PFX(_16Code) - . +.set DATA16, ASM_PFX(_16Data) - . +.set DATA32, ASM_PFX(_32Data) - . + +ASM_PFX(NullSeg): .quad 0 +ASM_PFX(_16Code): + .word -1 + .word 0 + .byte 0 + .byte 0x9b + .byte 0x8f # 16-bit segment, 4GB limit + .byte 0 +ASM_PFX(_16Data): + .word -1 + .word 0 + .byte 0 + .byte 0x93 + .byte 0x8f # 16-bit segment, 4GB limit + .byte 0 +ASM_PFX(_32Data): + .word -1 + .word 0 + .byte 0 + .byte 0x93 + .byte 0xcf # 16-bit segment, 4GB limit + .byte 0 + +.set GDT_SIZE, . - ASM_PFX(NullSeg) + +#------------------------------------------------------------------------------ +# IA32_REGISTER_SET * +# EFIAPI +# InternalAsmThunk16 ( +# IN IA32_REGISTER_SET *RegisterSet, +# IN OUT VOID *Transition +# ); +#------------------------------------------------------------------------------ + +ASM_GLOBAL ASM_PFX(InternalAsmThunk16) +ASM_PFX(InternalAsmThunk16): + pushq %rbp + pushq %rbx + pushq %rsi + pushq %rdi + + movl %ds, %ebx + pushq %rbx # Save ds segment register on the stack + movl %es, %ebx + pushq %rbx # Save es segment register on the stack + movl %ss, %ebx + pushq %rbx # Save ss segment register on the stack + + .byte 0x0f, 0xa0 #push fs + .byte 0x0f, 0xa8 #push gs + movq %rcx, %rsi + movzwl _SS(%rsi), %r8d + movl _ESP(%rsi), %edi + lea -(IA32_REGS_SIZE + 4)(%edi), %rdi + imul $16, %r8d, %eax + movl %edi,%ebx # ebx <- stack for 16-bit code + pushq $(IA32_REGS_SIZE / 4) + addl %eax,%edi # edi <- linear address of 16-bit stack + popq %rcx + rep + movsl # copy RegSet + lea (SavedCr4 - ASM_PFX(m16Start))(%rdx), %ecx + movl %edx,%eax # eax <- transition code address + andl $0xf,%edx + shll $12,%eax # segment address in high order 16 bits + lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%rdx), %ax + stosl # [edi] <- return address of user code + sgdt 0x60(%rsp) # save GDT stack in argument space + movzwq 0x60(%rsp), %r10 # r10 <- GDT limit + lea ((ASM_PFX(InternalAsmThunk16) - SavedCr4) + 0xf)(%rcx), %r11 + andq $0xfffffffffffffff0, %r11 # r11 <- 16-byte aligned shadowed GDT table in real mode buffer + + movw %r10w, (SavedGdt - SavedCr4)(%rcx) # save the limit of shadowed GDT table + movq %r11, (SavedGdt - SavedCr4 + 0x2)(%rcx) # save the base address of shadowed GDT table + + movq 0x62(%rsp) ,%rsi # rsi <- the original GDT base address + xchg %r10, %rcx # save rcx to r10 and initialize rcx to be the limit of GDT table + incq %rcx # rcx <- the size of memory to copy + xchg %r11, %rdi # save rdi to r11 and initialize rdi to the base address of shadowed GDT table + rep + movsb # perform memory copy to shadow GDT table + movq %r10, %rcx # restore the orignal rcx before memory copy + movq %r11, %rdi # restore the original rdi before memory copy + + sidt 0x50(%rsp) + movq %cr0, %rax + movl %eax, (SavedCr0 - SavedCr4)(%rcx) + andl $0x7ffffffe,%eax # clear PE, PG bits + movq %cr4, %rbp + movl %ebp, (%rcx) # save CR4 in SavedCr4 + andl $0x300,%ebp # clear all but PCE and OSFXSR bits + movl %r8d, %esi # esi <- 16-bit stack segment + .byte 0x6a, DATA32 + popq %rdx + lgdt (_16Gdtr - SavedCr4)(%rcx) + movl %edx,%ss + pushfq + lea -8(%rdx), %edx + lea L_RetFromRealMode(%rip), %r8 + pushq %r8 + movl %cs, %r8d + movw %r8w, (SavedCs - SavedCr4)(%rcx) + movl %esp, (SavedSp - SavedCr4)(%rcx) + .byte 0xff, 0x69 # jmp (_EntryPoint - SavedCr4)(%rcx) + .byte _EntryPoint - SavedCr4 +L_RetFromRealMode: + popfq + lgdt 0x60(%rsp) # restore protected mode GDTR + lidt 0x50(%rsp) # restore protected mode IDTR + lea -IA32_REGS_SIZE(%rbp), %eax + .byte 0x0f, 0xa9 # pop gs + .byte 0x0f, 0xa1 # pop fs + + popq %rbx + movl %ebx, %ss + popq %rbx + movl %ebx, %es + popq %rbx + movl %ebx, %ds + + popq %rdi + popq %rsi + popq %rbx + popq %rbp + + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/Thunk16.asm b/UnixPkg/Library/UnixBaseLib/X64/Thunk16.asm new file mode 100644 index 0000000000..459966a43f --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Thunk16.asm @@ -0,0 +1,314 @@ + +#include "BaseLibInternals.h" + +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; Thunk.asm +; +; Abstract: +; +; Real mode thunk +; +;------------------------------------------------------------------------------ + +EXTERNDEF m16Start:BYTE +EXTERNDEF m16Size:WORD +EXTERNDEF mThunk16Attr:WORD +EXTERNDEF m16Gdt:WORD +EXTERNDEF m16GdtrBase:WORD +EXTERNDEF mTransition:WORD + +IA32_REGS STRUC 4t +_EDI DD ? +_ESI DD ? +_EBP DD ? +_ESP DD ? +_EBX DD ? +_EDX DD ? +_ECX DD ? +_EAX DD ? +_DS DW ? +_ES DW ? +_FS DW ? +_GS DW ? +_EFLAGS DQ ? +_EIP DD ? +_CS DW ? +_SS DW ? +IA32_REGS ENDS + + .const + +m16Size DW InternalAsmThunk16 - m16Start +mThunk16Attr DW _ThunkAttr - m16Start +m16Gdt DW _NullSeg - m16Start +m16GdtrBase DW _16GdtrBase - m16Start +mTransition DW _EntryPoint - m16Start + + .code + +m16Start LABEL BYTE + +SavedGdt LABEL FWORD + DW ? + DQ ? + +;------------------------------------------------------------------------------ +; _BackFromUserCode() takes control in real mode after 'retf' has been executed +; by user code. It will be shadowed to somewhere in memory below 1MB. +;------------------------------------------------------------------------------ +_BackFromUserCode PROC + ; + ; The order of saved registers on the stack matches the order they appears + ; in IA32_REGS structure. This facilitates wrapper function to extract them + ; into that structure. + ; + ; Some instructions for manipulation of segment registers have to be written + ; in opcode since 64-bit MASM prevents accesses to those registers. + ; + DB 16h ; push ss + DB 0eh ; push cs + DB 66h + call @Base ; push eip +@Base: + DB 66h + push 0 ; reserved high order 32 bits of EFlags + pushf ; pushfd actually + cli ; disable interrupts + push gs + push fs + DB 6 ; push es + DB 1eh ; push ds + DB 66h, 60h ; pushad + DB 66h, 0bah ; mov edx, imm32 +_ThunkAttr DD ? + test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 + jz @1 + mov eax, 15cd2401h ; mov ax, 2401h & int 15h + cli ; disable interrupts + jnc @2 +@1: + test dl, THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL + jz @2 + in al, 92h + or al, 2 + out 92h, al ; deactivate A20M# +@2: + mov eax, ss + lea bp, [esp + sizeof (IA32_REGS)] + ; + ; rsi in the following 2 instructions is indeed bp in 16-bit code + ; + mov word ptr (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._ESP, bp + DB 66h + mov ebx, (IA32_REGS ptr [rsi - sizeof (IA32_REGS)])._EIP + shl ax, 4 ; shl eax, 4 + add bp, ax ; add ebp, eax + mov ax, cs + shl ax, 4 + lea ax, [eax + ebx + (@64BitCode - @Base)] + DB 66h, 2eh, 89h, 87h ; mov cs:[bx + (@64Eip - @Base)], eax + DW @64Eip - @Base + DB 66h, 0b8h ; mov eax, imm32 +SavedCr4 DD ? + mov cr4, rax + ; + ; rdi in the instruction below is indeed bx in 16-bit code + ; + DB 66h, 2eh ; 2eh is "cs:" segment override + lgdt fword ptr [rdi + (SavedGdt - @Base)] + DB 66h + mov ecx, 0c0000080h + rdmsr + or ah, 1 + wrmsr + DB 66h, 0b8h ; mov eax, imm32 +SavedCr0 DD ? + mov cr0, rax + DB 66h, 0eah ; jmp far cs:@64Bit +@64Eip DD ? +SavedCs DW ? +@64BitCode: + db 090h + db 067h, 0bch ; mov esp, imm32 +SavedSp DD ? ; restore stack + nop + ret +_BackFromUserCode ENDP + +_EntryPoint DD _ToUserCode - m16Start + DW CODE16 +_16Gdtr LABEL FWORD + DW GDT_SIZE - 1 +_16GdtrBase DQ _NullSeg +_16Idtr FWORD (1 SHL 10) - 1 + +;------------------------------------------------------------------------------ +; _ToUserCode() takes control in real mode before passing control to user code. +; It will be shadowed to somewhere in memory below 1MB. +;------------------------------------------------------------------------------ +_ToUserCode PROC + mov ss, edx ; set new segment selectors + mov ds, edx + mov es, edx + mov fs, edx + mov gs, edx + DB 66h + mov ecx, 0c0000080h + mov cr0, rax ; real mode starts at next instruction + rdmsr + and ah, NOT 1 + wrmsr + mov cr4, rbp + mov ss, esi ; set up 16-bit stack segment + mov sp, bx ; set up 16-bit stack pointer + DB 66h ; make the following call 32-bit + call @Base ; push eip +@Base: + pop bp ; ebp <- address of @Base + push [esp + sizeof (IA32_REGS) + 2] + lea eax, [rsi + (@RealMode - @Base)] ; rsi is "bp" in 16-bit code + push rax + retf ; execution begins at next instruction +@RealMode: + DB 66h, 2eh ; CS and operand size override + lidt fword ptr [rsi + (_16Idtr - @Base)] + DB 66h, 61h ; popad + DB 1fh ; pop ds + DB 07h ; pop es + pop fs + pop gs + popf ; popfd + lea sp, [esp + 4] ; skip high order 32 bits of EFlags + DB 66h ; make the following retf 32-bit + retf ; transfer control to user code +_ToUserCode ENDP + +CODE16 = _16Code - $ +DATA16 = _16Data - $ +DATA32 = _32Data - $ + +_NullSeg DQ 0 +_16Code LABEL QWORD + DW -1 + DW 0 + DB 0 + DB 9bh + DB 8fh ; 16-bit segment, 4GB limit + DB 0 +_16Data LABEL QWORD + DW -1 + DW 0 + DB 0 + DB 93h + DB 8fh ; 16-bit segment, 4GB limit + DB 0 +_32Data LABEL QWORD + DW -1 + DW 0 + DB 0 + DB 93h + DB 0cfh ; 16-bit segment, 4GB limit + DB 0 + +GDT_SIZE = $ - _NullSeg + +;------------------------------------------------------------------------------ +; IA32_REGISTER_SET * +; EFIAPI +; InternalAsmThunk16 ( +; IN IA32_REGISTER_SET *RegisterSet, +; IN OUT VOID *Transition +; ); +;------------------------------------------------------------------------------ +InternalAsmThunk16 PROC USES rbp rbx rsi rdi + mov rbx, ds + push rbx ; Save ds segment register on the stack + mov rbx, es + push rbx ; Save es segment register on the stack + mov rbx, ss + push rbx ; Save ss segment register on the stack + + push fs + push gs + mov rsi, rcx + movzx r8d, (IA32_REGS ptr [rsi])._SS + mov edi, (IA32_REGS ptr [rsi])._ESP + lea rdi, [edi - (sizeof (IA32_REGS) + 4)] + imul eax, r8d, 16 ; eax <- r8d(stack segment) * 16 + mov ebx, edi ; ebx <- stack for 16-bit code + push sizeof (IA32_REGS) / 4 + add edi, eax ; edi <- linear address of 16-bit stack + pop rcx + rep movsd ; copy RegSet + lea ecx, [rdx + (SavedCr4 - m16Start)] + mov eax, edx ; eax <- transition code address + and edx, 0fh + shl eax, 12 ; segment address in high order 16 bits + lea ax, [rdx + (_BackFromUserCode - m16Start)] ; offset address + stosd ; [edi] <- return address of user code + + sgdt fword ptr [rsp + 60h] ; save GDT stack in argument space + movzx r10, word ptr [rsp + 60h] ; r10 <- GDT limit + lea r11, [rcx + (InternalAsmThunk16 - SavedCr4) + 0xf] + and r11, 0xfffffff0 ; r11 <- 16-byte aligned shadowed GDT table in real mode buffer + + mov word ptr [rcx + (SavedGdt - SavedCr4)], r10w ; save the limit of shadowed GDT table + mov qword ptr [rcx + (SavedGdt - SavedCr4) + 2], r11 ; save the base address of shadowed GDT table + + mov rsi, qword ptr [rsp + 62h] ; rsi <- the original GDT base address + xchg rcx, r10 ; save rcx to r10 and initialize rcx to be the limit of GDT table + inc rcx ; rcx <- the size of memory to copy + xchg rdi, r11 ; save rdi to r11 and initialize rdi to the base address of shadowed GDT table + rep movsb ; perform memory copy to shadow GDT table + mov rcx, r10 ; restore the orignal rcx before memory copy + mov rdi, r11 ; restore the original rdi before memory copy + + sidt fword ptr [rsp + 50h] ; save IDT stack in argument space + mov rax, cr0 + mov [rcx + (SavedCr0 - SavedCr4)], eax + and eax, 7ffffffeh ; clear PE, PG bits + mov rbp, cr4 + mov [rcx], ebp ; save CR4 in SavedCr4 + and ebp, 300h ; clear all but PCE and OSFXSR bits + mov esi, r8d ; esi <- 16-bit stack segment + DB 6ah, DATA32 ; push DATA32 + pop rdx ; rdx <- 32-bit data segment selector + lgdt fword ptr [rcx + (_16Gdtr - SavedCr4)] + mov ss, edx + pushfq + lea edx, [rdx + DATA16 - DATA32] + lea r8, @RetFromRealMode + push r8 + mov r8d, cs + mov [rcx + (SavedCs - SavedCr4)], r8w + mov [rcx + (SavedSp - SavedCr4)], esp + jmp fword ptr [rcx + (_EntryPoint - SavedCr4)] +@RetFromRealMode: + popfq + lgdt fword ptr [rsp + 60h] ; restore protected mode GDTR + lidt fword ptr [rsp + 50h] ; restore protected mode IDTR + lea eax, [rbp - sizeof (IA32_REGS)] + pop gs + pop fs + pop rbx + mov ss, rbx + pop rbx + mov es, rbx + pop rbx + mov ds, rbx + ret +InternalAsmThunk16 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/Wbinvd.S b/UnixPkg/Library/UnixBaseLib/X64/Wbinvd.S new file mode 100644 index 0000000000..52702d55ad --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Wbinvd.S @@ -0,0 +1,35 @@ +#------------------------------------------------------------------------------ +# +# Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.
+# This program and the accompanying materials +# are licensed and made available under the terms and conditions of the BSD License +# which accompanies this distribution. The full text of the license may be found at +# http://opensource.org/licenses/bsd-license.php. +# +# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +# +# Module Name: +# +# Wbinvd.S +# +# Abstract: +# +# AsmWbinvd function +# +# Notes: +# +#------------------------------------------------------------------------------ + + +#------------------------------------------------------------------------------ +# VOID +# EFIAPI +# AsmWbinvd ( +# VOID +# ); +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(AsmWbinvd) +ASM_PFX(AsmWbinvd): + wbinvd + ret diff --git a/UnixPkg/Library/UnixBaseLib/X64/Wbinvd.asm b/UnixPkg/Library/UnixBaseLib/X64/Wbinvd.asm new file mode 100644 index 0000000000..b0807e088f --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/Wbinvd.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; Wbinvd.Asm +; +; Abstract: +; +; AsmWbinvd function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWbinvd ( +; VOID +; ); +;------------------------------------------------------------------------------ +AsmWbinvd PROC + wbinvd + ret +AsmWbinvd ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteCr0.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteCr0.asm new file mode 100644 index 0000000000..98fef9cd61 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteCr0.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteCr0.Asm +; +; Abstract: +; +; AsmWriteCr0 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteCr0 ( +; UINTN Cr0 +; ); +;------------------------------------------------------------------------------ +AsmWriteCr0 PROC + mov cr0, rcx + mov rax, rcx + ret +AsmWriteCr0 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteCr2.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteCr2.asm new file mode 100644 index 0000000000..3d77d6aef2 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteCr2.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteCr2.Asm +; +; Abstract: +; +; AsmWriteCr2 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteCr2 ( +; UINTN Cr2 +; ); +;------------------------------------------------------------------------------ +AsmWriteCr2 PROC + mov cr2, rcx + mov rax, rcx + ret +AsmWriteCr2 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteCr3.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteCr3.asm new file mode 100644 index 0000000000..9b39938150 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteCr3.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteCr3.Asm +; +; Abstract: +; +; AsmWriteCr3 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteCr3 ( +; UINTN Cr3 +; ); +;------------------------------------------------------------------------------ +AsmWriteCr3 PROC + mov cr3, rcx + mov rax, rcx + ret +AsmWriteCr3 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteCr4.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteCr4.asm new file mode 100644 index 0000000000..145584257e --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteCr4.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteCr4.Asm +; +; Abstract: +; +; AsmWriteCr4 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteCr4 ( +; UINTN Cr4 +; ); +;------------------------------------------------------------------------------ +AsmWriteCr4 PROC + mov cr4, rcx + mov rax, rcx + ret +AsmWriteCr4 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr0.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr0.asm new file mode 100644 index 0000000000..dafe9ab169 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr0.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr0.Asm +; +; Abstract: +; +; AsmWriteDr0 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr0 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr0 PROC + mov dr0, rcx + mov rax, rcx + ret +AsmWriteDr0 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr1.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr1.asm new file mode 100644 index 0000000000..7167f5e5c2 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr1.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr1.Asm +; +; Abstract: +; +; AsmWriteDr1 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr1 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr1 PROC + mov dr1, rcx + mov rax, rcx + ret +AsmWriteDr1 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr2.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr2.asm new file mode 100644 index 0000000000..c14ba34b15 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr2.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr2.Asm +; +; Abstract: +; +; AsmWriteDr2 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr2 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr2 PROC + mov dr2, rcx + mov rax, rcx + ret +AsmWriteDr2 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr3.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr3.asm new file mode 100644 index 0000000000..8873916c4e --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr3.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr3.Asm +; +; Abstract: +; +; AsmWriteDr3 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr3 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr3 PROC + mov dr3, rcx + mov rax, rcx + ret +AsmWriteDr3 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr4.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr4.asm new file mode 100644 index 0000000000..4803525dd9 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr4.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr4.Asm +; +; Abstract: +; +; AsmWriteDr4 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr4 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr4 PROC + ; + ; There's no obvious reason to access this register, since it's aliased to + ; DR6 when DE=0 or an exception generated when DE=1 + ; + DB 0fh, 23h, 0e1h + mov rax, rcx + ret +AsmWriteDr4 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr5.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr5.asm new file mode 100644 index 0000000000..2cdb328771 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr5.asm @@ -0,0 +1,43 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr5.Asm +; +; Abstract: +; +; AsmWriteDr5 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr5 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr5 PROC + ; + ; There's no obvious reason to access this register, since it's aliased to + ; DR7 when DE=0 or an exception generated when DE=1 + ; + DB 0fh, 23h, 0e9h + mov rax, rcx + ret +AsmWriteDr5 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr6.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr6.asm new file mode 100644 index 0000000000..22c9c871c4 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr6.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr6.Asm +; +; Abstract: +; +; AsmWriteDr6 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr6 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr6 PROC + mov dr6, rcx + mov rax, rcx + ret +AsmWriteDr6 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteDr7.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteDr7.asm new file mode 100644 index 0000000000..b55afd39af --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteDr7.asm @@ -0,0 +1,39 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteDr7.Asm +; +; Abstract: +; +; AsmWriteDr7 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINTN +; EFIAPI +; AsmWriteDr7 ( +; IN UINTN Value +; ); +;------------------------------------------------------------------------------ +AsmWriteDr7 PROC + mov dr7, rcx + mov rax, rcx + ret +AsmWriteDr7 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteGdtr.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteGdtr.asm new file mode 100644 index 0000000000..0cc8b7ad7a --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteGdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteGdtr.Asm +; +; Abstract: +; +; AsmWriteGdtr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86WriteGdtr ( +; IN CONST IA32_DESCRIPTOR *Idtr +; ); +;------------------------------------------------------------------------------ +InternalX86WriteGdtr PROC + lgdt fword ptr [rcx] + ret +InternalX86WriteGdtr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteIdtr.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteIdtr.asm new file mode 100644 index 0000000000..01ca1c0b59 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteIdtr.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteIdtr.Asm +; +; Abstract: +; +; AsmWriteIdtr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; InternalX86WriteIdtr ( +; IN CONST IA32_DESCRIPTOR *Idtr +; ); +;------------------------------------------------------------------------------ +InternalX86WriteIdtr PROC + pushfq + cli + lidt fword ptr [rcx] + popfq + ret +InternalX86WriteIdtr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteLdtr.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteLdtr.asm new file mode 100644 index 0000000000..af6786389b --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteLdtr.asm @@ -0,0 +1,38 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteLdtr.Asm +; +; Abstract: +; +; AsmWriteLdtr function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteLdtr ( +; IN UINT16 Ldtr +; ); +;------------------------------------------------------------------------------ +AsmWriteLdtr PROC + lldt cx + ret +AsmWriteLdtr ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm0.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm0.asm new file mode 100644 index 0000000000..f40db0339d --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm0.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm0.Asm +; +; Abstract: +; +; AsmWriteMm0 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm0 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm0 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0c1h + ret +AsmWriteMm0 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm1.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm1.asm new file mode 100644 index 0000000000..ec17208ec4 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm1.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm1.Asm +; +; Abstract: +; +; AsmWriteMm1 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm1 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm1 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0c9h + ret +AsmWriteMm1 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm2.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm2.asm new file mode 100644 index 0000000000..38c0d5ed26 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm2.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm2.Asm +; +; Abstract: +; +; AsmWriteMm2 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm2 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm2 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0d1h + ret +AsmWriteMm2 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm3.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm3.asm new file mode 100644 index 0000000000..5f5bbdd482 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm3.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm3.Asm +; +; Abstract: +; +; AsmWriteMm3 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm3 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm3 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0d9h + ret +AsmWriteMm3 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm4.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm4.asm new file mode 100644 index 0000000000..7f533137f8 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm4.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm4.Asm +; +; Abstract: +; +; AsmWriteMm4 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm4 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm4 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0e1h + ret +AsmWriteMm4 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm5.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm5.asm new file mode 100644 index 0000000000..ea30bc14a4 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm5.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm5.Asm +; +; Abstract: +; +; AsmWriteMm5 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm5 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm5 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0e9h + ret +AsmWriteMm5 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm6.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm6.asm new file mode 100644 index 0000000000..aa926ae710 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm6.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm6.Asm +; +; Abstract: +; +; AsmWriteMm6 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm6 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm6 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0f1h + ret +AsmWriteMm6 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMm7.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMm7.asm new file mode 100644 index 0000000000..652e041452 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMm7.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMm7.Asm +; +; Abstract: +; +; AsmWriteMm7 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; VOID +; EFIAPI +; AsmWriteMm7 ( +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMm7 PROC + ; + ; 64-bit MASM doesn't support MMX instructions, so use opcode here + ; + DB 48h, 0fh, 6eh, 0f9h + ret +AsmWriteMm7 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.asm b/UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.asm new file mode 100644 index 0000000000..19ef572845 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.asm @@ -0,0 +1,41 @@ +;------------------------------------------------------------------------------ +; +; Copyright (c) 2006, Intel Corporation. All rights reserved.
+; This program and the accompanying materials +; are licensed and made available under the terms and conditions of the BSD License +; which accompanies this distribution. The full text of the license may be found at +; http://opensource.org/licenses/bsd-license.php. +; +; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, +; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. +; +; Module Name: +; +; WriteMsr64.Asm +; +; Abstract: +; +; AsmWriteMsr64 function +; +; Notes: +; +;------------------------------------------------------------------------------ + + .code + +;------------------------------------------------------------------------------ +; UINT64 +; EFIAPI +; AsmWriteMsr64 ( +; IN UINT32 Index, +; IN UINT64 Value +; ); +;------------------------------------------------------------------------------ +AsmWriteMsr64 PROC + mov rax, rdx ; meanwhile, rax <- return value + shr rdx, 20h ; edx:eax contains the value to write + wrmsr + ret +AsmWriteMsr64 ENDP + + END diff --git a/UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.c b/UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.c new file mode 100644 index 0000000000..58f0754246 --- /dev/null +++ b/UnixPkg/Library/UnixBaseLib/X64/WriteMsr64.c @@ -0,0 +1,42 @@ +/** @file + CpuBreakpoint function. + + Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.
+ This program and the accompanying materials + are licensed and made available under the terms and conditions of the BSD License + which accompanies this distribution. The full text of the license may be found at + http://opensource.org/licenses/bsd-license.php. + + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. + +**/ + +/** + Microsoft Visual Studio 7.1 Function Prototypes for I/O Intrinsics. +**/ + +void __writemsr (unsigned long Register, unsigned __int64 Value); + +#pragma intrinsic(__writemsr) + +/** + Write data to MSR. + + @param Index The register index of MSR. + @param Value Data wants to be written. + + @return Value written to MSR. + +**/ +UINT64 +EFIAPI +AsmWriteMsr64 ( + IN UINT32 Index, + IN UINT64 Value + ) +{ + __writemsr (Index, Value); + return Value; +} + -- cgit v1.2.3