# # Copyright (c) 2011 - 2015, ARM Limited. All rights reserved. # # This program and the accompanying materials # are licensed and made available under the terms and conditions of the BSD License # which accompanies this distribution. The full text of the license may be found at # http://opensource.org/licenses/bsd-license.php # # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. # ################################################################################ # # FD Section # The [FD] Section is made up of the definition statements and a # description of what goes into the Flash Device Image. Each FD section # defines one flash "device" image. A flash device image may be one of # the following: Removable media bootable image (like a boot floppy # image,) an Option ROM image (that would be "flashed" into an add-in # card,) a System "Flash" image (that would be burned into a system's # flash) or an Update ("Capsule") image that will be used to update and # existing system flash. # ################################################################################ [FD.FVP_AARCH64_EFI_SEC] BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM. Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB). ErasePolarity = 1 # This one is tricky, it must be: BlockSize * NumBlocks = Size BlockSize = 0x00001000 NumBlocks = 0x4000 ################################################################################ # # Following are lists of FD Region layout which correspond to the locations of different # images within the flash device. # # Regions must be defined in ascending order and may not overlap. # # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by # the pipe "|" character, followed by the size of the region, also in hex with the leading # "0x" characters. Like: # Offset|Size # PcdOffsetCName|PcdSizeCName # RegionType # ################################################################################ 0x00000000|0x00080000 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize FV = FVMAIN_SEC [FD.FVP_AARCH64_EFI] !ifdef ARM_FVP_RUN_NORFLASH BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0. !else BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB. !endif Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB). ErasePolarity = 1 # This one is tricky, it must be: BlockSize * NumBlocks = Size BlockSize = 0x00001000 NumBlocks = 0x4000 0x00000000|0x00280000 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize FV = FVMAIN_COMPACT ################################################################################ # # FV Section # # [FV] section is used to define what components or modules are placed within a flash # device file. This section also defines order the components and modules are positioned # within the image. The [FV] section consists of define statements, set statements and # module statements. # ################################################################################ [FV.FVMAIN_SEC] FvBaseAddress = 0x0 # Secure ROM FvForceRebase = TRUE FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE INF ArmPlatformPkg/Sec/Sec.inf [FV.FvMain] BlockSize = 0x40 NumBlocks = 0 # This FV gets compressed so make it just big enough FvAlignment = 16 # FV alignment and FV attributes setting. ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE FvNameGuid = 87940482-fc81-41c3-87e6-399cf85ac8a0 APRIORI DXE { INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf } INF MdeModulePkg/Core/Dxe/DxeMain.inf INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf # # PI DXE Drivers producing Architectural Protocols (EFI Services) # INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf # # Multiple Console IO support # INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf INF EmbeddedPkg/SerialDxe/SerialDxe.inf INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf !ifndef ARM_FOUNDATION_FVP INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf !endif INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf # # Semi-hosting filesystem # INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf # # FAT filesystem + GPT/MBR partitioning # INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf INF FatBinPkg/EnhancedFatDxe/Fat.inf INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf !ifndef ARM_FOUNDATION_FVP # # Multimedia Card Interface # INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf !endif # # Platform Driver # INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf # # UEFI application (Shell Embedded Boot Loader) # INF ShellBinPkg/UefiShell/UefiShell.inf # # Bds # INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf INF ArmPlatformPkg/Bds/Bds.inf # FV Filesystem INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf # # FDT installation # # The UEFI driver is at the end of the list of the driver to be dispatched # after the device drivers (eg: Ethernet) to ensure we have support for them. INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf !ifdef $(DTB_DIR) # # Embed flattened device tree (FDT) images for all known # variants of this platform # FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2) { $(DTB_DIR)/fvp-base-gicv2-psci.dtb } FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV2Legacy) { $(DTB_DIR)/fvp-base-gicv2legacy-psci.dtb } FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpBaseAEMv8x4GicV3) { $(DTB_DIR)/fvp-base-gicv3-psci.dtb } FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2) { $(DTB_DIR)/fvp-foundation-gicv2-psci.dtb } FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV2Legacy) { $(DTB_DIR)/fvp-foundation-gicv2legacy-psci.dtb } FILE RAW = PCD (gArmVExpressTokenSpaceGuid.PcdFdtFvpFoundationGicV3) { $(DTB_DIR)/fvp-foundation-gicv3-psci.dtb } !endif [FV.FVMAIN_COMPACT] FvAlignment = 16 ERASE_POLARITY = 1 MEMORY_MAPPED = TRUE STICKY_WRITE = TRUE LOCK_CAP = TRUE LOCK_STATUS = TRUE WRITE_DISABLED_CAP = TRUE WRITE_ENABLED_CAP = TRUE WRITE_STATUS = TRUE WRITE_LOCK_CAP = TRUE WRITE_LOCK_STATUS = TRUE READ_DISABLED_CAP = TRUE READ_ENABLED_CAP = TRUE READ_STATUS = TRUE READ_LOCK_CAP = TRUE READ_LOCK_STATUS = TRUE !if $(EDK2_SKIP_PEICORE) == 1 INF ArmPlatformPkg/PrePi/PeiMPCore.inf !else INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf INF MdeModulePkg/Core/Pei/PeiMain.inf INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf INF ArmPkg/Drivers/CpuPei/CpuPei.inf INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf !endif FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 { SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { SECTION FV_IMAGE = FVMAIN } } ################################################################################ # # Rules are use with the [FV] section's module INF type to define # how an FFS file is created for a given INF file. The following Rule are the default # rules for the different module type. User can add the customized rules to define the # content of the FFS file. # ################################################################################ ############################################################################ # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section # ############################################################################ # #[Rule.Common.DXE_DRIVER] # FILE DRIVER = $(NAMED_GUID) { # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex # COMPRESS PI_STD { # GUIDED { # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi # UI STRING="$(MODULE_NAME)" Optional # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) # } # } # } # ############################################################################ [Rule.Common.SEC] FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED { TE TE Align = 4K $(INF_OUTPUT)/$(MODULE_NAME).efi } [Rule.Common.PEI_CORE] FILE PEI_CORE = $(NAMED_GUID) { TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING ="$(MODULE_NAME)" Optional } [Rule.Common.PEIM] FILE PEIM = $(NAMED_GUID) { PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING="$(MODULE_NAME)" Optional } [Rule.Common.PEIM.TIANOCOMPRESSED] FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 { PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING="$(MODULE_NAME)" Optional } } [Rule.Common.DXE_CORE] FILE DXE_CORE = $(NAMED_GUID) { PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING="$(MODULE_NAME)" Optional } [Rule.Common.UEFI_DRIVER] FILE DRIVER = $(NAMED_GUID) { DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING="$(MODULE_NAME)" Optional } [Rule.Common.DXE_DRIVER] FILE DRIVER = $(NAMED_GUID) { DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING="$(MODULE_NAME)" Optional } [Rule.Common.DXE_RUNTIME_DRIVER] FILE DRIVER = $(NAMED_GUID) { DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi UI STRING="$(MODULE_NAME)" Optional } [Rule.Common.UEFI_APPLICATION] FILE APPLICATION = $(NAMED_GUID) { UI STRING ="$(MODULE_NAME)" Optional PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi } [Rule.Common.UEFI_DRIVER.BINARY] FILE DRIVER = $(NAMED_GUID) { DXE_DEPEX DXE_DEPEX Optional |.depex PE32 PE32 |.efi UI STRING="$(MODULE_NAME)" Optional VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) } [Rule.Common.UEFI_APPLICATION.BINARY] FILE APPLICATION = $(NAMED_GUID) { PE32 PE32 |.efi UI STRING="$(MODULE_NAME)" Optional VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER) }