1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
|
;%HEADER%
;/** @file
; Macros to work around lack of Apple support for LDR register, =expr
;
; Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
; Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
;
; This program and the accompanying materials
; are licensed and made available under the terms and conditions of the BSD License
; which accompanies this distribution. The full text of the license may be found at
; http://opensource.org/licenses/bsd-license.php
;
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
;
;**/
MACRO
MmioWrite32Macro $Address, $Data
ldr r1, = ($Address)
ldr r0, = ($Data)
str r0, [r1]
MEND
MACRO
MmioOr32Macro $Address, $OrData
ldr r1, =($Address)
ldr r2, =($OrData)
ldr r0, [r1]
orr r0, r0, r2
str r0, [r1]
MEND
MACRO
MmioAnd32Macro $Address, $AndData
ldr r1, =($Address)
ldr r2, =($AndData)
ldr r0, [r1]
and r0, r0, r2
str r0, [r1]
MEND
MACRO
MmioAndThenOr32Macro $Address, $AndData, $OrData
ldr r1, =($Address)
ldr r0, [r1]
ldr r2, =($AndData)
and r0, r0, r2
ldr r2, =($OrData)
orr r0, r0, r2
str r0, [r1]
MEND
MACRO
MmioWriteFromReg32Macro $Address, $Reg
ldr r1, =($Address)
str $Reg, [r1]
MEND
MACRO
MmioRead32Macro $Address
ldr r1, =($Address)
ldr r0, [r1]
MEND
MACRO
MmioReadToReg32Macro $Address, $Reg
ldr r1, =($Address)
ldr $Reg, [r1]
MEND
MACRO
LoadConstantMacro $Data
ldr r0, =($Data)
MEND
MACRO
LoadConstantToRegMacro $Data, $Reg
ldr $Reg, =($Data)
MEND
MACRO
GetCorePositionFromMpId $Pos, $MpId, $Tmp
;Note: The ARM macro does not support the pre-processing. 0xFF and (0xFF << 8) are the values of
; ARM_CORE_MASK and ARM_CLUSTER_MASK
mov $Tmp, #(0xFF :OR: (0xFF << 8))
and $MpId, $Tmp
lsr $Pos, $MpId, #6
and $Tmp, $MpId, #3
add $Pos, $Pos, $Tmp
MEND
; The reserved place must be 8-bytes aligned for pushing 64-bit variable on the stack
; Note: Global Size will be modified
MACRO
SetPrimaryStack $StackTop, $GlobalSize, $Tmp
and $Tmp, $GlobalSize, #7
rsbne $Tmp, $Tmp, #8
add $GlobalSize, $GlobalSize, $Tmp
sub sp, $StackTop, $GlobalSize
; Set all the global variables to 0
mov $Tmp, sp
mov $GlobalSize, #0x0
_SetPrimaryStackInitGlobals
cmp $Tmp, $StackTop
beq _SetPrimaryStackEnd
str $GlobalSize, [$Tmp], #4
b _SetPrimaryStackInitGlobals
_SetPrimaryStackEnd
MEND
MACRO
InitializePrimaryStack $GlobalSize, $Tmp1
and $Tmp1, $GlobalSize, #7
rsbne $Tmp1, $Tmp1, #8
add $GlobalSize, $GlobalSize, $Tmp1
mov $Tmp1, sp
sub sp, $GlobalSize
; Set all the global variables to 0
mov $GlobalSize, #0x0
_InitializePrimaryStackLoop
cmp $Tmp1, sp
bls _InitializePrimaryStackEnd
str $GlobalSize, [$Tmp1], #-4
b _InitializePrimaryStackLoop
_InitializePrimaryStackEnd
MEND
END
|