1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
|
/** @file
*
* Copyright (c) 2015, Hisilicon Limited. All rights reserved.
* Copyright (c) 2015, Linaro Limited. All rights reserved.
*
* This program and the accompanying materials
* are licensed and made available under the terms and conditions of the BSD License
* which accompanies this distribution. The full text of the license may be found at
* http://opensource.org/licenses/bsd-license.php
*
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
*
**/
#include <Uefi.h>
#include <Library/DebugLib.h>
#include <Library/IoLib.h>
#include <Library/TimerLib.h>
#include <Library/SerialPortLib.h>
#include <Library/OemMiscLib.h>
#include <PlatformArch.h>
#include <Library/PlatformSysCtrlLib.h>
#include <Library/OemAddressMapLib.h>
#include <Library/LpcLib.h>
REPORT_PCIEDIDVID2BMC PcieDeviceToReport[PCIEDEVICE_REPORT_MAX] = {
{67,0,0,0},
{225,0,0,3},
{0xFFFF,0xFFFF,0xFFFF,0xFFFF},
{0xFFFF,0xFFFF,0xFFFF,0xFFFF}
};
// Right now we only support 1P
BOOLEAN OemIsSocketPresent (UINTN Socket)
{
if (0 == Socket)
{
return TRUE;
}
if(1 == Socket)
{
return TRUE;
}
return FALSE;
}
UINTN OemGetSocketNumber (VOID)
{
if(!OemIsMpBoot())
{
return 1;
}
return 2;
}
UINTN OemGetDdrChannel (VOID)
{
return 4;
}
UINTN OemGetDimmSlot(UINTN Socket, UINTN Channel)
{
return 2;
}
// Nothing to do for EVB
VOID OemPostEndIndicator (VOID)
{
DEBUG((EFI_D_ERROR,"M3 release reset CONFIG........."));
MmioWrite32(0xd0002180, 0x3);
MmioWrite32(0xd0002194, 0xa4);
MmioWrite32(0xd0000a54, 0x1);
MicroSecondDelay(10000);
MmioWrite32(0xd0002108, 0x1);
MmioWrite32(0xd0002114, 0x1);
MmioWrite32(0xd0002120, 0x1);
MmioWrite32(0xd0003108, 0x1);
MicroSecondDelay(500000);
DEBUG((EFI_D_ERROR,"Done\n"));
}
VOID CoreSelectBoot(VOID)
{
if (!PcdGet64 (PcdTrustedFirmwareEnable))
{
StartupAp ();
}
return;
}
BOOLEAN OemIsMpBoot()
{
UINT32 Tmp;
Tmp = MmioRead32(0x602E0050);
if ( ((Tmp >> 10) & 0xF) == 0x3)
return TRUE;
else
return FALSE;
}
VOID OemLpcInit(VOID)
{
LpcInit();
return;
}
UINT32 OemIsWarmBoot(VOID)
{
return 0;
}
VOID OemBiosSwitch(UINT32 Master)
{
(VOID)Master;
return;
}
BOOLEAN OemIsNeedDisableExpanderBuffer(VOID)
{
return TRUE;
}
|
