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|
## @file
# Module describe the entire platform configuration.
#
# The DEC files are used by the utilities that parse DSC and
# INF files to generate AutoGen.c and AutoGen.h files
# for the build infrastructure.
#
# Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
#
# This program and the accompanying materials are licensed and made available under
# the terms and conditions of the BSD License which accompanies this distribution.
# The full text of the license may be found at
# http://opensource.org/licenses/bsd-license.php
#
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
#
##
[Defines]
DEC_SPECIFICATION = 0x00010017
PACKAGE_NAME = MinPlatformPkg
PACKAGE_VERSION = 0.1
PACKAGE_GUID = 463B3B00-0D18-4a5f-90C0-D5B851D2574B
[Includes]
Include
[Guids]
gPlatformModuleTokenSpaceGuid = {0x69d13bf0, 0xaf91, 0x4d96, {0xaa, 0x9f, 0x21, 0x84, 0xc5, 0xce, 0x3b, 0xc0}}
gAdapterInfoPlatformTestPointGuid = {0x5381e3ea, 0xb77, 0x4580, {0xad, 0xdf, 0xa9, 0x1c, 0x8, 0x3b, 0xf2, 0x97}}
gBoardDetectGuid = {0x1792429d, 0x9d94, 0x4e08, {0xa0, 0x99, 0x73, 0xa2, 0x86, 0xae, 0xb4, 0x35}}
gBoardPreMemInitGuid = {0x191dcfcf, 0xe16e, 0x43bb, {0x9b, 0xc3, 0x6e, 0xee, 0x6f, 0xab, 0x3a, 0x27}}
gBoardPostMemInitGuid = {0xa0e933ea, 0xa69, 0x47fb, {0xb2, 0xab, 0xa1, 0x6f, 0x71, 0x2d, 0x6f, 0x58}}
gBoardNotificationInitGuid = {0x78dbcabf, 0xc544, 0x4e6f, {0xaf, 0x3a, 0x71, 0x17, 0xd9, 0x42, 0x4e, 0xd1}}
gBoardAcpiTableGuid = {0xd70e9f57, 0x69f, 0x4bef, {0x96, 0xc0, 0x84, 0x74, 0xf4, 0xa2, 0x5f, 0x3a}}
gBoardAcpiEnableGuid = {0x9727b610, 0xf645, 0x4429, {0x89, 0x21, 0x2c, 0x2b, 0x58, 0xdc, 0xbb, 0xa}}
##
## IntelFrameworkPkg
##
gEfiSmmPeiSmramMemoryReserveGuid = {0x6dadf1d1, 0xd4cc, 0x4910, {0xbb, 0x6e, 0x82, 0xb1, 0xfd, 0x80, 0xff, 0x3d}}
gDefaultDataFileGuid = { 0x1ae42876, 0x008f, 0x4161, { 0xb2, 0xb7, 0x1c, 0x0d, 0x15, 0xc5, 0xef, 0x43 }}
gDefaultDataOptSizeFileGuid = { 0x003e7b41, 0x98a2, 0x4be2, { 0xb2, 0x7a, 0x6c, 0x30, 0xc7, 0x65, 0x52, 0x25 }}
[LibraryClasses]
PeiLib|Include/Library/PeiLib.h
AslUpdateLib|Include/Library/AslUpdateLib.h
BoardAcpiEnableLib|Include/Library/BoardAcpiEnableLib.h
BoardAcpiTableLib|Include/Library/BoardAcpiTableLib.h
SiliconPolicyInitLib|Include/Library/SiliconPolicyInitLib.h
SiliconPolicyUpdateLib|Include/Library/SiliconPolicyUpdateLib.h
SpiFlashCommonLib|Include/Library/SpiFlashCommonLib.h
BoardInitLib|Include/Library/BoardInitLib.h
MultiBoardInitSupportLib|Include/Library/MultiBoardInitSupportLib.h
SecBoardInitLib|Include/Library/SecBoardInitLib.h
TestPointLib|Include/Library/TestPointLib.h
TestPointCheckLib|Include/Library/TestPointCheckLib.h
[PcdsFixedAtBuild]
##
## The Flash relevant PCD are ineffective and will be patched basing on FDF definitions during build.
## Set all of them to 0 here to prevent from confusion.
##
gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress|0xFF800000|UINT32|0x10000001
gPlatformModuleTokenSpaceGuid.PcdFlashAreaSize|0x00800000|UINT32|0x10000002
gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeBase|0xFFE60000|UINT32|0x30000004
gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeSize|0x000A0000|UINT32|0x30000005
gPlatformModuleTokenSpaceGuid.PcdFlashFvMicrocodeOffset|0x00660000|UINT32|0x30000006
gPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryBase|0x00000000|UINT32|0x20000004
gPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemorySize|0x00000000|UINT32|0x20000005
gPlatformModuleTokenSpaceGuid.PcdFlashFvPreMemoryOffset|0x00000000|UINT32|0x20000006
gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryBase|0x00000000|UINT32|0x20000007
gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemorySize|0x00000000|UINT32|0x20000008
gPlatformModuleTokenSpaceGuid.PcdFlashFvPostMemoryOffset|0x00000000|UINT32|0x20000009
gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootBase|0x00000000|UINT32|0x2000000A
gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootSize|0x00000000|UINT32|0x2000000B
gPlatformModuleTokenSpaceGuid.PcdFlashFvUefiBootOffset|0x00000000|UINT32|0x2000000C
gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootBase|0x00000000|UINT32|0x2000000D
gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootSize|0x00000000|UINT32|0x2000000E
gPlatformModuleTokenSpaceGuid.PcdFlashFvOsBootOffset|0x00000000|UINT32|0x2000000F
gPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityBase|0x00000000|UINT32|0x20000010
gPlatformModuleTokenSpaceGuid.PcdFlashFvSecuritySize|0x00000000|UINT32|0x20000011
gPlatformModuleTokenSpaceGuid.PcdFlashFvSecurityOffset|0x00000000|UINT32|0x20000012
gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedBase|0x00000000|UINT32|0x20000013
gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedSize|0x00000000|UINT32|0x20000014
gPlatformModuleTokenSpaceGuid.PcdFlashFvAdvancedOffset|0x00000000|UINT32|0x20000015
gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageBase|0x00000000|UINT32|0x20000016
gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageSize|0x00000000|UINT32|0x20000017
gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageOffset|0x00000000|UINT32|0x20000018
gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageVariableOffset|0x00000000|UINT32|0x20000019
gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwSpareOffset|0x00000000|UINT32|0x2000001A
gPlatformModuleTokenSpaceGuid.PcdFlashNvStorageFtwWorkingOffset|0x00000000|UINT32|0x2000001B
gPlatformModuleTokenSpaceGuid.PcdFlashFvFspMTBase|0x00000000|UINT32|0x20000021
gPlatformModuleTokenSpaceGuid.PcdFlashFvFspMTSize|0x00000000|UINT32|0x20000022
gPlatformModuleTokenSpaceGuid.PcdFlashFvFspMTOffset|0x00000000|UINT32|0x20000023
gPlatformModuleTokenSpaceGuid.PcdFlashFvFspSBase|0x00000000|UINT32|0x20000024
gPlatformModuleTokenSpaceGuid.PcdFlashFvFspSSize|0x00000000|UINT32|0x20000025
gPlatformModuleTokenSpaceGuid.PcdFlashFvFspSOffset|0x00000000|UINT32|0x20000026
gPlatformModuleTokenSpaceGuid.PcdFspMaxUpdSize|0x00000000|UINT32|0x80000000
gPlatformModuleTokenSpaceGuid.PcdFspReservedSizeOnStackTop|0x00000040|UINT32|0x80000001
gPlatformModuleTokenSpaceGuid.PcdPeiPhaseStackTop|0x00000000|UINT32|0x80000002
gPlatformModuleTokenSpaceGuid.PcdApicLocalAddress|0xFEE00000|UINT64|0x9000000B
gPlatformModuleTokenSpaceGuid.PcdApicLocalMmioSize|0x1000|UINT32|0x9000000C
gPlatformModuleTokenSpaceGuid.PcdApicIoAddress|0xFEC00000|UINT64|0x9000000D
gPlatformModuleTokenSpaceGuid.PcdApicIoMmioSize|0x1000|UINT32|0x9000000E
gPlatformModuleTokenSpaceGuid.PcdAcpiEnableSwSmi|0xF0|UINT8|0x90000012
gPlatformModuleTokenSpaceGuid.PcdAcpiDisableSwSmi|0xF1|UINT8|0x90000013
gPlatformModuleTokenSpaceGuid.PcdApicIoIdPch|0x02|UINT8|0x9000001E
gPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiReclaimMemorySize|0x65|UINT32|0x20000500
gPlatformModuleTokenSpaceGuid.PcdPlatformEfiAcpiNvsMemorySize|0x30|UINT32|0x20000501
gPlatformModuleTokenSpaceGuid.PcdPlatformEfiReservedMemorySize|0x402|UINT32|0x20000502
gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtDataMemorySize|0x4b|UINT32|0x20000503
gPlatformModuleTokenSpaceGuid.PcdPlatformEfiRtCodeMemorySize|0x25|UINT32|0x20000504
gPlatformModuleTokenSpaceGuid.PcdFspTemporaryRamSize|0x1000|UINT32|0x10001003
#
# The PCDs are used to control the Windows SMM Security Mitigations Table - Protection Flags
#
# BIT0: If set, expresses that for all synchronous SMM entries,SMM will validate that input and output buffers lie entirely within the expected fixed memory regions.
# BIT1: If set, expresses that for all synchronous SMM entries, SMM will validate that input and output pointers embedded within the fixed communication buffer only refer to address ranges \
# that lie entirely within the expected fixed memory regions.
# BIT2: Firmware setting this bit is an indication that it will not allow reconfiguration of system resources via non-architectural mechanisms.
# BIT3-31: Reserved
#
gPlatformModuleTokenSpaceGuid.PcdWsmtProtectionFlags|0|UINT32|0x10001006
gPlatformModuleTokenSpaceGuid.PcdPreferredPmProfile|0x0|UINT8|0x00100205
#
# See HstiIbvFeatureBit.h for the definition
#
# #define HSTI_BYTE<X>_<AAA> BIT<Y>
#
# It means BYTE<X> BIT<Y> is for feature <AAA>.
#
gPlatformModuleTokenSpaceGuid.PcdHstiIbvPlatformFeature|{0x00, 0x00, 0x00}|VOID*|0x00100301
#
# See TestPointCheckLib.h for the definition
#
# #define TEST_POINT_BYTE<X>_<AAA> BIT<Y>
#
# It means BYTE<X> BIT<Y> is for feature <AAA>.
#
gPlatformModuleTokenSpaceGuid.PcdTestPointIbvPlatformFeature|{0x00, 0x07, 0x0F, 0x03}|VOID*|0x00100302
[PcdsDynamic]
[PcdsFixedAtBuild, PcdsPatchableInModule, PcdsDynamic, PcdsDynamicEx]
##
## Allocate 56 KB [0x2000..0xFFFF] of I/O space for Pci Devices
## If PcdPciReservedMemLimit =0 Pci Reserved default MMIO Limit is PciExpressBase else use PcdPciReservedMemLimit .
##
gPlatformModuleTokenSpaceGuid.PcdPciReservedIobase |0x2000 |UINT16|0x40010041
gPlatformModuleTokenSpaceGuid.PcdPciReservedIoLimit |0xFFFF |UINT16|0x40010042
gPlatformModuleTokenSpaceGuid.PcdPciReservedMemBase |0x90000000 |UINT32|0x40010043
gPlatformModuleTokenSpaceGuid.PcdPciReservedMemLimit |0x00000000 |UINT32|0x40010044
gPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010045
gPlatformModuleTokenSpaceGuid.PcdPciReservedMemAbove4GBLimit |0x0000000000000000 |UINT64|0x40010046
gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemBase |0xFFFFFFFF |UINT32|0x40010047
gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemLimit |0x00000000 |UINT32|0x40010048
gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBBase |0xFFFFFFFFFFFFFFFF |UINT64|0x40010049
gPlatformModuleTokenSpaceGuid.PcdPciReservedPMemAbove4GBLimit|0x0000000000000000 |UINT64|0x4001004A
gPlatformModuleTokenSpaceGuid.PcdPciDmaAbove4G |FALSE|BOOLEAN|0x4001004B
gPlatformModuleTokenSpaceGuid.PcdPciNoExtendedConfigSpace |FALSE|BOOLEAN|0x4001004C
gPlatformModuleTokenSpaceGuid.PcdPciResourceAssigned |FALSE|BOOLEAN|0x4001004D
gPlatformModuleTokenSpaceGuid.PcdLowPowerS0Idle|0|UINT8|0x40000006
gPlatformModuleTokenSpaceGuid.PcdTenSecondPowerButtonEnable|0|UINT8|0x40000008
gPlatformModuleTokenSpaceGuid.PcdPciExpNative|0|UINT8|0x40000004
gPlatformModuleTokenSpaceGuid.PcdNativeAspmEnable|1|UINT8|0x40000005
gPlatformModuleTokenSpaceGuid.PcdAcpiPm1AEventBlockAddress|0x1800|UINT16|0x00010035
gPlatformModuleTokenSpaceGuid.PcdAcpiPm1BEventBlockAddress|0x0000|UINT16|0x00010036
gPlatformModuleTokenSpaceGuid.PcdAcpiPm1AControlBlockAddress|0x1804|UINT16|0x0001037
gPlatformModuleTokenSpaceGuid.PcdAcpiPm1BControlBlockAddress|0x0000|UINT16|0x00010038
gPlatformModuleTokenSpaceGuid.PcdAcpiPm2ControlBlockAddress|0x1850|UINT16|0x00010039
gPlatformModuleTokenSpaceGuid.PcdAcpiPmTimerBlockAddress|0x1808|UINT16|0x0001003A
gPlatformModuleTokenSpaceGuid.PcdAcpiGpe0BlockAddress|0x1880|UINT16|0x0001003B
gPlatformModuleTokenSpaceGuid.PcdAcpiGpe1BlockAddress|0x0000|UINT16|0x0001003C
gPlatformModuleTokenSpaceGuid.PcdPciExpressRegionLength|0x10000000|UINT32|0x0010004
gPlatformModuleTokenSpaceGuid.PcdFspCpuPeiApWakeupBufferAddr|0x9f000|UINT32|0x30000008
[PcdsFeatureFlag]
#
# Stage 1 - enable debug (system deadloop after debug init)
# Stage 2 - mem init (system deadloop after mem init)
# Stage 3 - boot to shell only
# Stage 4 - boot to OS
# Stage 5 - boot to OS with security boot enabled
#
gPlatformModuleTokenSpaceGuid.PcdBootStage|4|UINT8|0xF00000A0
gPlatformModuleTokenSpaceGuid.PcdStopAfterDebugInit |FALSE|BOOLEAN|0xF00000A1
gPlatformModuleTokenSpaceGuid.PcdStopAfterMemInit |FALSE|BOOLEAN|0xF00000A2
gPlatformModuleTokenSpaceGuid.PcdBootToShellOnly |FALSE|BOOLEAN|0xF00000A3
gPlatformModuleTokenSpaceGuid.PcdUefiSecureBootEnable|FALSE|BOOLEAN|0xF00000A4
gPlatformModuleTokenSpaceGuid.PcdTpm2Enable |FALSE|BOOLEAN|0xF00000A5
gPlatformModuleTokenSpaceGuid.PcdPerformanceEnable |FALSE|BOOLEAN|0xF00000A6
|
