1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
|
/** @file
Copyright (c) 2018, Intel Corporation. All rights reserved.<BR>
This program and the accompanying materials are licensed and made available under
the terms and conditions of the BSD License that accompanies this distribution.
The full text of the license may be found at
http://opensource.org/licenses/bsd-license.php.
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
**/
#ifndef __SETUP_VARIABLE_H__
#define __SETUP_VARIABLE_H__
#include "UncoreCommonIncludes.h"
// ---------------------------------------------------------------------------
//
// Driver Configuration
//
// ---------------------------------------------------------------------------
//
#define MAX_PCH_PCI_EXPRESS_ROOT_PORTS 8
#define PASSWORD_MAX_SIZE 16
#define SHA256_DIGEST_LENGTH 32
#define EFI_VARIABLE_BOOTSERVICE_ACCESS 0x00000002
#pragma pack(1)
typedef struct {
UINT8 UserPassword[SHA256_DIGEST_LENGTH];
UINT8 AdminPassword[SHA256_DIGEST_LENGTH];
UINT8 Access;
//
// Keyboard
//
UINT8 Numlock;
UINT8 Ps2PortSwap;
//
// TPM
//
UINT8 TpmEnable;
UINT8 TpmState;
UINT8 MorState;
//
// Breakpoints
//
UINT8 ValidationBreakpointType;
UINT16 bsdBreakpoint;
//
// Power State
//
UINT8 PowerState;
//
// Wake On Lan
//
UINT8 WakeOnLanS5;
//
// Boot from Network
//
UINT8 BootNetwork;
//
// Video
//
UINT8 VideoSelect;
UINT8 EfiWindowsInt10Workaround;
UINT8 UefiOptimizedBootToggle;
//
// Fan PWM Offset
//
UINT8 FanPwmOffset;
//
// PCI Minimum Secondary Bus Number
//
UINT8 PCIe_MultiSeg_Support;
//
UINT8 WakeOnLanSupport;
//
// Enable/disable for PCIe LOM by using GPO44/45
// NOT PCH LAN
//
UINT8 LomDisableByGpio;
UINT8 FpkPortConfig[4];
UINT8 FpkPortConfigPrev[4];
UINT8 FpkPortPresent[4];
// RTC WAKE
//
UINT8 WakeOnRTCS4S5;
UINT8 RTCWakeupTimeHour;
UINT8 RTCWakeupTimeMinute;
UINT8 RTCWakeupTimeSecond;
// PCI_EXPRESS_CONFIG, ROOT PORTS
//
// AJW: these cross the line, but depend on Platform Info
UINT8 PcieClockGating;
UINT8 PcieDmiAspm;
UINT8 PcieSBDE;
UINT8 GbePciePortNum;
UINT8 PciePortConfig1;
UINT8 PciePortConfig2;
UINT8 PciePortConfig3;
UINT8 PciePortConfig4;
UINT8 PciePortConfig5;
// GBE
UINT8 GbeEnabled;
// PCH Stepping
UINT8 PchStepping;
//
// XHCI Wake On USB
//
UINT8 XhciWakeOnUsbEnabled;
//
// EventLog
//
//
// SKX_TODO: add these for RAS, may be best to find new home for them in a new setup variable and setup page
//
UINT8 SystemErrorEn;
//Viral, and IoMca are not supported in EP. Will need to wrap in an EX flag
//UINT8 ViralEn;
UINT8 PoisonEn;
UINT8 ViralEn;
UINT8 ClearViralStatus;
UINT8 CloakingEn;
UINT8 UboxToPcuMcaEn;
UINT8 FatalErrSpinLoopEn;
UINT8 EmcaEn;
UINT8 EmcaIgnOptin;
UINT8 EmcaCsmiEn;
UINT8 EmcaMsmiEn;
UINT8 ElogCorrErrEn;
UINT8 ElogMemErrEn;
UINT8 ElogProcErrEn;
UINT8 LmceEn;
UINT8 WheaSupportEn;
UINT8 WheaLogMemoryEn;
UINT8 WheaLogProcEn;
UINT8 WheaLogPciEn;
UINT8 WheaErrorInjSupportEn;
UINT8 McaBankErrInjEn;
UINT8 WheaErrInjEn;
UINT8 WheaPcieErrInjEn;
UINT8 MeSegErrorInjEn;
UINT8 PcieErrInjActionTable;
UINT8 ParityCheckEn;
UINT8 MemErrEn;
UINT8 CorrMemErrEn;
UINT32 LeakyBktHiLeakyBktLo;
UINT8 SpareIntSelect;
UINT8 FnvErrorEn;
UINT8 FnvErrorLowPrioritySignal; // 0 - No Log, 1 - SMI, 2 - ERR0#, 3 - BOTH
UINT8 FnvErrorHighPrioritySignal; // 0 - No Log, 1 - SMI, 2 - ERR0#, 3 - BOTH
UINT8 Reserved_1;
UINT8 Reserved_2;
UINT8 Reserved_3;
UINT8 IioErrorEn;
UINT8 IoMcaEn;
UINT8 IioErrRegistersClearEn;
UINT8 IioErrorPinEn;
UINT8 LerEn;
UINT8 DisableMAerrorLoggingDueToLER;
UINT8 IioIrpErrorEn;
UINT8 IioMiscErrorEn;
UINT8 IioVtdErrorEn;
UINT8 IioDmaErrorEn;
UINT8 IioDmiErrorEn;
UINT8 IioPcieAddCorrErrorEn;
UINT8 IioPcieAddUnCorrEn;
UINT8 IioPcieAerSpecCompEn;
UINT8 PcieErrEn;
UINT8 PcieCorrErrEn;
UINT8 PcieUncorrErrEn;
UINT8 PcieFatalErrEn;
UINT8 PcieCorErrCntr;
UINT8 PcieCorErrMaskBitMap;
UINT16 PcieCorErrThres;
UINT8 PcieAerCorrErrEn;
UINT8 PcieAerAdNfatErrEn;
UINT8 PcieAerNfatErrEn;
UINT8 PcieAerFatErrEn;
UINT8 SerrPropEn;
UINT8 PerrPropEn;
UINT8 OsSigOnSerrEn;
UINT8 OsSigOnPerrEn;
UINT8 CaterrGpioSmiEn;
// Endof RAS add
//Viral, and IoMca are not supported in EP. Will need to wrap in an EX flag
//UINT8 IoMcaEn;
UINT8 McBankWarmBootClearError;
UINT8 KTIFailoverSmiEn;
UINT8 irpp0_parityError;
UINT8 irpp0_qtOverflow;
UINT8 irpp0_unexprsp;
UINT8 irpp0_csraccunaligned;
UINT8 irpp0_unceccCs1;
UINT8 irpp0_unceccCs0;
UINT8 irpp0_rcvdpoison;
UINT8 irpp0_crreccCs1;
UINT8 irpp0_crreccCs0;
UINT8 PropagateSerr;
UINT8 PropagatePerr;
//
// Boot Options
//
UINT8 serialDebugMsgLvl;
UINT8 serialDebugTrace;
UINT8 serialDebugMsgLvlTrainResults;
UINT8 ResetOnMemMapChange;
UINT8 ForceSetup;
UINT8 BiosGuardEnabled;
UINT8 BiosGuardPlatformSupported;
UINT8 EnableAntiFlashWearout;
UINT8 AntiFlashWearoutSupported;
UINT8 RtoPopulateBGDirectory;
UINT8 Use1GPageTable;
//
// UINT8 QuietBoot;
//
UINT8 FastBoot;
//
// Reserve Memory that is hidden from the OS.
//
UINT8 ReserveMem;
UINT64 ReserveStartAddr;
//
// Reserve TAGEC Memory
//
UINT8 TagecMem;
//Usb Configdata
UINT8 UsbMassDevNum;
UINT8 UsbLegacySupport;
UINT8 UsbEmul6064;
UINT8 UsbMassResetDelay;
UINT8 UsbNonBoot;
UINT8 UsbEmu1;
UINT8 UsbEmu2;
UINT8 UsbEmu3;
UINT8 UsbEmu4;
UINT8 UsbEmu5;
UINT8 UsbEmu6;
UINT8 UsbEmu7;
UINT8 UsbEmu8;
UINT8 UsbEmu9;
UINT8 UsbEmu10;
UINT8 UsbEmu11;
UINT8 UsbEmu12;
UINT8 UsbEmu13;
UINT8 UsbEmu14;
UINT8 UsbEmu15;
UINT8 UsbEmu16;
UINT8 UsbStackSupport;
// Console Redirection
UINT8 ConsoleRedirection;
UINT8 FlowControl;
UINT64 BaudRate;
UINT8 TerminalType;
UINT8 LegacyOsRedirection;
UINT8 TerminalResolution;
UINT8 DataBits;
UINT8 Parity;
UINT8 StopBits;
#ifdef EFI_PCI_IOV_SUPPORT
UINT8 SystemPageSize;
UINT8 ARIEnable;
UINT8 ARIForward;
UINT8 SRIOVEnable;
UINT8 MRIOVEnable;
#endif
//
// RAS
//
//
// Network setup entries - start here <><><><><>
//
UINT8 LegacyPxeRom;
UINT8 EfiNetworkSupport;
//
// Network setup entries - end here <><><><><>
//
//
// SERIALPORT BAUD RATE: Begin
//
UINT32 SerialBaudRate;
//
// SERIALPORT BAUD RATE: END
//
UINT8 BootAllOptions;
UINT8 SetShellFirst;
//
// Overclocking related setup variables
//
UINT8 PlatformOCSupport;
UINT8 FilterPll;
UINT8 OverclockingSupport;
UINT8 CoreMaxOcRatio;
UINT8 CoreVoltageMode;
UINT16 CoreVoltageOverride;
UINT16 CoreVoltageOffset;
UINT8 CoreVoltageOffsetPrefix;
UINT16 CoreExtraTurboVoltage;
//
// OC related
//
UINT8 MemoryVoltage;
UINT8 MemoryVoltageDefault;
UINT8 tCL;
//
// CLR Related
//
UINT8 ClrMaxOcRatio;
UINT8 ClrVoltageMode;
UINT16 ClrVoltageOverride;
UINT16 ClrVoltageOffset;
UINT8 ClrVoltageOffsetPrefix;
UINT16 ClrExtraTurboVoltage;
//
// Uncore Related
//
UINT16 UncoreVoltageOffset;
UINT8 UncoreVoltageOffsetPrefix;
UINT16 IoaVoltageOffset;
UINT8 IoaVoltageOffsetPrefix;
UINT16 IodVoltageOffset;
UINT8 IodVoltageOffsetPrefix;
//
// SVID and FIVR Related
//
UINT8 SvidEnable;
UINT16 SvidVoltageOverride;
UINT8 FivrFaultsEnable;
UINT8 FivrEfficiencyEnable;
UINT8 SataInterfaceRAIDMode;
UINT8 sSataInterfaceRAIDMode;
UINT16 C01MemoryVoltage;
UINT16 C23MemoryVoltage;
UINT16 CpuVccInVoltage;
UINT8 VccIoVoltage;
UINT8 CloudProfile;
UINT16 VariablePlatId;
//XTU 3.0
UINT8 FlexRatioOverrideDefault;
UINT8 RatioLimit1Default;
UINT8 RatioLimit2Default;
UINT8 RatioLimit3Default;
UINT8 RatioLimit4Default;
UINT8 OverclockingLockDefault;
UINT8 DdrRefClkDefault;
UINT8 DdrRatioDefault;
UINT8 tCLDefault;
UINT8 tCWLDefault;
UINT16 tFAWDefault;
UINT16 tRASDefault;
UINT16 tRCDefault;
UINT8 tRCDDefault;
UINT16 tREFIDefault;
UINT16 tRFCDefault;
UINT8 tRPDefault;
UINT8 tRPabDefault;
UINT8 tRRDDefault;
UINT8 tRTPDefault;
UINT8 tWRDefault;
UINT8 tWTRDefault;
UINT8 NModeDefault;
UINT8 CoreMaxOcRatioDefault;
UINT8 CoreVoltageModeDefault;
UINT16 CoreVoltageOverrideDefault;
UINT16 CoreVoltageOffsetDefault;
UINT8 CoreVoltageOffsetPrefixDefault;
UINT16 CoreExtraTurboVoltageDefault;
UINT8 GtOcSupportDefault;
UINT8 GtOcFrequencyDefault;
UINT16 GtExtraTurboVoltageDefault;
UINT16 GtOcVoltageDefault;
UINT8 GtVoltageModeDefault;
UINT16 GtVoltageOverrideDefault;
UINT16 GtVoltageOffsetDefault;
UINT8 GtVoltageOffsetPrefixDefault;
UINT8 ClrMaxOcRatioDefault;
UINT8 ClrVoltageModeDefault;
UINT16 ClrVoltageOverrideDefault;
UINT16 ClrVoltageOffsetDefault;
UINT8 ClrVoltageOffsetPrefixDefault;
UINT16 ClrExtraTurboVoltageDefault;
UINT16 UncoreVoltageOffsetDefault;
UINT8 UncoreVoltageOffsetPrefixDefault;
UINT16 IoaVoltageOffsetDefault;
UINT8 IoaVoltageOffsetPrefixDefault;
UINT16 IodVoltageOffsetDefault;
UINT8 IodVoltageOffsetPrefixDefault;
UINT8 SvidEnableDefault;
UINT16 SvidVoltageOverrideDefault;
UINT8 FivrFaultsEnableDefault;
UINT8 FivrEfficiencyEnableDefault;
UINT16 VrCurrentLimitDefault;
UINT8 EnableGvDefault;
UINT8 TurboModeDefault;
UINT8 PowerLimit1TimeDefault;
UINT16 PowerLimit1Default;
UINT16 PowerLimit2Default;
UINT8 RatioLimit1; //ratiolimit handling has changed in SKX. knobs might need to change too. Will have to revisit again.
UINT8 RatioLimit2;
UINT8 RatioLimit3;
UINT8 RatioLimit4;
UINT8 CpuRatio; // need to understand what is the difference between maxnonturboratio and cpuratio. if cpuratiooverride is 0, then cpuratio is same as maxnonturboratio. add this to platform cpu policy or socketsetup.
UINT8 CpuRatioOverride;
UINT8 IsTurboRatioDefaultsInitalized; // related to initializing all the vardefault. is this flow needed for HEDT/intended only for clients? no need for set up creation.
UINT8 DdrRefClk; //cant find any in purley. new one?
UINT8 PcieRatioDisabled;//need to check if this is applicable to HEDT. also no need to create a setup variable.
UINT8 NMode ;
UINT8 Pmtt;
UINT16 GtVoltageOffset; //existing but no set up option
UINT16 VrCurrentLimit;//done
//UINT8 SpdProfileSelected; same as XMPMode
UINT8 NModeSupport;
UINT8 WDTSupportforNextOSBoot; // no setup option needed
UINT16 TimeforNextOSBoot; // no setup optiom needed
UINT8 PlatformUnstable; // no set up option needed. this decides if all the vardefaults are needed.
UINT8 GtVoltageMode; //existing but no set up option
UINT8 DdrRatio;
UINT8 GtOcFrequency;
UINT16 GtExtraTurboVoltage; //existing but no set up option
UINT16 GtVoltageOverride; //existing but no set up option
UINT8 GtVoltageOffsetPrefix;
UINT8 GtOcSupport;
//
// CPU releated
//
UINT8 FlexOverrideEnable;
UINT8 FlexRatioOverride;
UINT8 PowerLimit3Override;
UINT32 PowerLimit3;
UINT8 PowerLimit3Time;
UINT8 PowerLimit3DutyCycle;
UINT8 PowerLimit3Lock;
UINT8 MemoryVoltageOverride;
//
// ICC Related
//
UINT8 BClkOverride;
UINT8 BclkAdjustable;
UINT8 DmiPegRatio;
UINT8 SkipXmlComprs;
UINT8 DfxAdvDebugJumper;
UINT8 DfxAltPostCode;
//
// Validation Related
//
UINT8 ValidationResetType;
UINT16 ValidationCountOuter;
UINT16 ValidationCountInner;
UINT8 ValidationStopOnError;
UINT8 ValidationBootWhenDone;
UINT8 ValidationSkxPciError;
UINT8 ValidationSkxPciLinkError;
UINT8 ValidationPchPciError;
UINT8 ValidationSkxPciLinkRecoveryCountError;
UINT16 ValidationSkxPciLinkRecoveryCountThreshold;
UINT8 ValidationKtiError;
UINT8 TraceHubDebugInterface;
UINT8 RamDebugInterface;
UINT8 StorageOpROMSuppression;
//
// PC_SIO_END
//
UINT8 RsaSupport;
} SYSTEM_CONFIGURATION;
#pragma pack()
#define EFI_HDD_PRESENT 0x01
#define EFI_HDD_NOT_PRESENT 0x00
#define EFI_CD_PRESENT 0x02
#define EFI_CD_NOT_PRESENT 0x00
#define EFI_HDD_WARNING_ON 0x01
#define EFI_CD_WARNING_ON 0x02
#define EFI_SMART_WARNING_ON 0x04
#define EFI_HDD_WARNING_OFF 0x00
#define EFI_CD_WARNING_OFF 0x00
#define EFI_SMART_WARNING_OFF 0x00
#endif // #ifndef _SETUP_VARIABLE
|
